This series corrects SPR access, cache configuration and instruction availability in the Freescale Book E CPU models. It also adds system TCG tests for e500mc, e5500 and e6500.
The patches are grouped as follows: - patch #1-#4, bug fixes to PIR write access, the MAS5 SPR number and cache block/line sizes (qemu-stable cc'ed) - patch #5-#6, complete e500mc/e5500 L1 cache configuration and remove redundant e6500 cache geometry bits - patch #7-#11, register the missing cache, MMU-assist and sevearl control SPRs - patch #12-#14, split the PowerISA 2.05 instructions to several sub-flags controlled groups, due to differences seen on the e500 series cores - patch #15-#17: Add TCG tests for illegal-instruction exceptions, byte comparison and parity results, and FPSCR field-mask handling Bin Meng (17): target/ppc: Correct PIR write access on e500 cores target/ppc: Correct the MAS5 SPR number target/ppc: Correct the e500mc and e5500 cache block size fields target/ppc: Correct cache line size for e6500 target/ppc: Complete e500mc and e5500 L1 cache configuration target/ppc: Drop redundant e6500 L1 cache geometry bits target/ppc: Register L1CSR2 on e500mc/e5500/e6500 cores target/ppc: Register L2CFG0 and L2CSR1 on e500mc and e5500 target/ppc: Register MAS5 and MAS8 on e500mc/e5500/e6500 target/ppc: Register PWRMGTCR0 on e6500 target/ppc: Register IVOR42 on e6500 target/ppc: Split the ISA 2.05 instruction feature group target/ppc: Enable byte comparison and parity on e5500 and e6500 target/ppc: Ignore FPSCR W/L fields on e500mc, e5500 and e6500 tests/tcg/ppc: Add Book E illegal instruction tests tests/tcg/ppc: Test byte comparison and parity on e5500/e6500 tests/tcg/ppc: Test FPSCR W/L handling on e500mc/e5500/e6500 target/ppc/cpu.h | 31 ++++++-- target/ppc/cpu_init.h | 5 +- target/ppc/cpu_init.c | 72 +++++++++++++---- target/ppc/translate.c | 10 ++- target/ppc/translate/fixedpoint-impl.c.inc | 6 +- target/ppc/translate/fp-impl.c.inc | 14 +++- target/ppc/translate/fp-ops.c.inc | 9 ++- meson_options.txt | 4 + scripts/meson-buildoptions.sh | 2 + tests/tcg/meson.build | 1 + tests/tcg/ppc/meson.build | 5 ++ tests/tcg/ppc/system/README | 22 ++++++ tests/tcg/ppc/system/boot.S | 92 ++++++++++++++++++++++ tests/tcg/ppc/system/byte-parity.S | 33 ++++++++ tests/tcg/ppc/system/fpscr.S | 75 ++++++++++++++++++ tests/tcg/ppc/system/isa.out | 1 + tests/tcg/ppc/system/kernel.ld | 18 +++++ tests/tcg/ppc/system/macros.inc | 56 +++++++++++++ tests/tcg/ppc/system/meson.build | 39 +++++++++ tests/tcg/ppc/system/unsupported.S | 31 ++++++++ tests/tcg/ppc64/meson.build | 2 + tests/tcg/ppc64/system/meson.build | 33 ++++++++ 22 files changed, 525 insertions(+), 36 deletions(-) create mode 100644 tests/tcg/ppc/meson.build create mode 100644 tests/tcg/ppc/system/README create mode 100644 tests/tcg/ppc/system/boot.S create mode 100644 tests/tcg/ppc/system/byte-parity.S create mode 100644 tests/tcg/ppc/system/fpscr.S create mode 100644 tests/tcg/ppc/system/isa.out create mode 100644 tests/tcg/ppc/system/kernel.ld create mode 100644 tests/tcg/ppc/system/macros.inc create mode 100644 tests/tcg/ppc/system/meson.build create mode 100644 tests/tcg/ppc/system/unsupported.S create mode 100644 tests/tcg/ppc64/system/meson.build --- base-commit: 2a0ac9c8ac2d303ca515dc819043409aef18cab5 branch: ppc-fsl-booke -- 2.53.0
