The shared L1CFG0 and L1CFG1 initializers already set 0x3820 for eight ways and 32 KiB. The e6500 masks repeat those same bits. Keep only the e6500-specific upper fields in the masks.
Reference: E6500RM (Rev.0), section 2.11.4 and 2.11.5 https://www.nxp.com/docs/en/reference-manual/E6500RM.pdf Signed-off-by: Bin Meng <[email protected]> --- target/ppc/cpu_init.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index fec672a8a6..23f25a56c0 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -2893,8 +2893,8 @@ static void init_proc_e500(CPUPPCState *env, int version) case fsl_e6500: env->dcache_line_size = 64; env->icache_line_size = 64; - l1cfg0 |= 0x0F83820; - l1cfg1 |= 0x0B83820; + l1cfg0 |= 0x00F80000; + l1cfg1 |= 0x00B80000; break; default: cpu_abort(env_cpu(env), "Unknown CPU: " TARGET_FMT_lx "\n", -- 2.53.0
