The APIs between the IRS and the cpuif for the IRS to tell the CPU that it has a new HPPI candidate and for the CPU to ask the IRS what its current HPPI candidate is do not currently allow for virtualization. Extend them to allow the IRS to tell the CPU about the candidate virtual HPPI and for the CPU to ask about the candidate virtual HPPI, using an extra 'virtual' parameter.
This commit implements the CPU side of this interface, where a new virtual HPPI candidate makes us reevaluate our VIRQ/VFIQ status. As the IRS does not yet implement virtualization, it will always respond "no interrupt" when asked about the current virtual HPPI candidate. Signed-off-by: Peter Maydell <[email protected]> --- hw/intc/arm_gicv5.c | 14 +++++++++++--- include/hw/intc/arm_gicv5_stream.h | 6 ++++-- target/arm/tcg/gicv5-cpuif.c | 11 ++++++++--- 3 files changed, 23 insertions(+), 8 deletions(-) diff --git a/hw/intc/arm_gicv5.c b/hw/intc/arm_gicv5.c index a362349e5ed..f714add1406 100644 --- a/hw/intc/arm_gicv5.c +++ b/hw/intc/arm_gicv5.c @@ -495,7 +495,7 @@ static void irs_recalc_hppi(GICv5 *s, GICv5Domain domain, uint32_t iaffid) * the cpuif asks for the current HPPI when it needs it * - the cpuif does not cache the HPPI on its end */ - gicv5_forward_interrupt(cpu, domain); + gicv5_forward_interrupt(cpu, domain, false); } static void irs_recalc_hppi_all_cpus(GICv5 *s, GICv5Domain domain) @@ -526,16 +526,24 @@ static void irs_recall_hppis(GICv5 *s, GICv5Domain domain) for (int i = 0; i < cs->num_cpus; i++) { s->hppi[domain][i] = GICV5_PENDING_IRQ_NONE; - gicv5_forward_interrupt(cs->cpus[i], domain); + gicv5_forward_interrupt(cs->cpus[i], domain, false); } } GICv5PendingIrq gicv5_get_hppi(GICv5Common *cs, GICv5Domain domain, - uint32_t cpuidx) + bool virtual, uint32_t cpuidx) { GICv5 *s = ARM_GICV5(cs); assert(cpuidx < cs->num_cpus); + + if (virtual) { + /* + * Until we implement virtualization there is never + * an available virtual HPPI candidate. + */ + return GICV5_PENDING_IRQ_NONE; + } return s->hppi[domain][cpuidx]; } diff --git a/include/hw/intc/arm_gicv5_stream.h b/include/hw/intc/arm_gicv5_stream.h index 641f3d0f499..21be859a233 100644 --- a/include/hw/intc/arm_gicv5_stream.h +++ b/include/hw/intc/arm_gicv5_stream.h @@ -180,6 +180,7 @@ void gicv5_activate(GICv5Common *cs, uint32_t id, GICv5Domain domain, * gicv5_forward_interrupt * @cpu: CPU interface to forward interrupt to * @domain: domain this interrupt is for + * @virtual: true if this is a virtual interrupt for the resident VPE * * Tell the CPU interface that the highest priority pending interrupt * that the IRS has available for it has changed. This is the @@ -198,12 +199,13 @@ void gicv5_activate(GICv5Common *cs, uint32_t id, GICv5Domain domain, * HPPI info via a function call, so we do not need to pass it across * here. */ -void gicv5_forward_interrupt(ARMCPU *cpu, GICv5Domain domain); +void gicv5_forward_interrupt(ARMCPU *cpu, GICv5Domain domain, bool virtual); /** * gicv5_get_hppi * @cs: GIC IRS to query * @domain: interrupt domain to act on + * @virtual: true to ask for the virtual HPPI for the resident VPE * @cpuidx: IRS CPU index of this CPU interface * * Ask the IRS for the highest priority pending interrupt that it has @@ -211,7 +213,7 @@ void gicv5_forward_interrupt(ARMCPU *cpu, GICv5Domain domain); * protocol is the outstanding interrupt sent with a Forward packet. */ GICv5PendingIrq gicv5_get_hppi(GICv5Common *cs, GICv5Domain domain, - uint32_t cpuidx); + bool virtual, uint32_t cpuidx); /** * gicv5_deactivate diff --git a/target/arm/tcg/gicv5-cpuif.c b/target/arm/tcg/gicv5-cpuif.c index 0d38ed7b15b..5d0d599ddd5 100644 --- a/target/arm/tcg/gicv5-cpuif.c +++ b/target/arm/tcg/gicv5-cpuif.c @@ -170,7 +170,7 @@ static GICv5PendingIrq gic_hppi(CPUARMState *env, GICv5Domain domain) return GICV5_PENDING_IRQ_NONE; } - irs_hppi = gicv5_get_hppi(gic, domain, env->gicv5.cpuidx); + irs_hppi = gicv5_get_hppi(gic, domain, false, env->gicv5.cpuidx); /* * If the best PPI and the best interrupt from the IRS have the @@ -337,13 +337,18 @@ static void gic_recalc_virt_ppi_hppi(CPUARMState *env) env->gicv5_cpuif.virt_ppi_hppi.prio); } -void gicv5_forward_interrupt(ARMCPU *cpu, GICv5Domain domain) +void gicv5_forward_interrupt(ARMCPU *cpu, GICv5Domain domain, bool virtual) { /* * IRS HPPI has changed: recalculate the IRQ/FIQ levels by * combining the IRS HPPI with the PPI HPPI. + * If this is a virtual interrupt, do similarly for VIRQ/VFIQ. */ - gicv5_update_irq_fiq(&cpu->env); + if (virtual) { + /* Here we will eventually update the VIRQ/VFIQ state */ + } else { + gicv5_update_irq_fiq(&cpu->env); + } } void gicv5_update_ppi_state(CPUARMState *env, int ppi, bool level) -- 2.43.0
