From: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
---
Since v3:
- Rebased on top of CRC32 support
- plus_1() no longer declared inline
---
target/mips/tcg/msa.decode | 3 ++-
target/mips/tcg/rel6.decode | 5 +++--
target/mips/tcg/msa_translate.c | 4 ++--
target/mips/tcg/rel6_translate.c | 9 +++++++--
4 files changed, 14 insertions(+), 7 deletions(-)
diff --git a/target/mips/tcg/msa.decode b/target/mips/tcg/msa.decode
index 4410e2a02e16..798e8c401aba 100644
--- a/target/mips/tcg/msa.decode
+++ b/target/mips/tcg/msa.decode
@@ -21,6 +21,7 @@
&msa_elm_df df wd ws n
&msa_elm wd ws
+%lsa_sa 6:2 !function=plus_1
%elm_df 16:6 !function=elm_df
%elm_n 16:6 !function=elm_n
%bit_df 16:7 !function=bit_df
@@ -29,7 +30,7 @@
%3r_df_h 21:1 !function=plus_1
%3r_df_w 21:1 !function=plus_2
-@lsa ...... rs:5 rt:5 rd:5 ... sa:2 ...... &r
+@lsa ...... rs:5 rt:5 rd:5 ... .. ...... &r sa=%lsa_sa
@ldst ...... sa:s10 ws:5 wd:5 .... df:2 &msa_i
@bz_v ...... ... .. wt:5 sa:s16 &msa_bz df=3
@bz ...... ... df:2 wt:5 sa:s16 &msa_bz
diff --git a/target/mips/tcg/rel6.decode b/target/mips/tcg/rel6.decode
index 7fbcb109b4e5..aa22a7e7b266 100644
--- a/target/mips/tcg/rel6.decode
+++ b/target/mips/tcg/rel6.decode
@@ -15,11 +15,12 @@
# (Document Number: MD00087-2B-MIPS64BIS-AFP-6.06)
&r rs rt rd sa
-
&special3_crc rs rt c sz
-@lsa ...... rs:5 rt:5 rd:5 ... sa:2 ...... &r
+%lsa_sa 6:2 !function=plus_1
+
@crc32 ...... rs:5 rt:5 ..... c:3 sz:2 ...... &special3_crc
+@lsa ...... rs:5 rt:5 rd:5 ... .. ...... &r sa=%lsa_sa
LSA 000000 ..... ..... ..... 000 .. 000101 @lsa
DLSA 000000 ..... ..... ..... 000 .. 010101 @lsa
diff --git a/target/mips/tcg/msa_translate.c b/target/mips/tcg/msa_translate.c
index 82b149922fa1..75cf80a20ed4 100644
--- a/target/mips/tcg/msa_translate.c
+++ b/target/mips/tcg/msa_translate.c
@@ -780,7 +780,7 @@ TRANS_DF_iv(ST, trans_msa_ldst, gen_helper_msa_st);
static bool trans_LSA(DisasContext *ctx, arg_r *a)
{
- return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa + 1);
+ return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa);
}
static bool trans_DLSA(DisasContext *ctx, arg_r *a)
@@ -788,5 +788,5 @@ static bool trans_DLSA(DisasContext *ctx, arg_r *a)
if (TARGET_LONG_BITS != 64) {
return false;
}
- return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa + 1);
+ return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa);
}
diff --git a/target/mips/tcg/rel6_translate.c b/target/mips/tcg/rel6_translate.c
index 4c056621c977..ba7dc45b6354 100644
--- a/target/mips/tcg/rel6_translate.c
+++ b/target/mips/tcg/rel6_translate.c
@@ -11,6 +11,11 @@
#include "qemu/osdep.h"
#include "translate.h"
+static int plus_1(DisasContext *ctx, int x)
+{
+ return x + 1;
+}
+
/* Include the auto-generated decoders. */
#include "decode-rel6.c.inc"
@@ -23,7 +28,7 @@ bool trans_REMOVED(DisasContext *ctx, arg_REMOVED *a)
static bool trans_LSA(DisasContext *ctx, arg_r *a)
{
- return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa + 1);
+ return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa);
}
static bool trans_DLSA(DisasContext *ctx, arg_r *a)
@@ -31,7 +36,7 @@ static bool trans_DLSA(DisasContext *ctx, arg_r *a)
if (TARGET_LONG_BITS != 64) {
return false;
}
- return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa + 1);
+ return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa);
}
static bool trans_CRC32(DisasContext *ctx, arg_special3_crc *a)
--
2.55.0
