From: Philippe Mathieu-Daudé <[email protected]>

Add gen_li() to load an immediate into a GPR, ignoring
writes to $zero.  It will be shared by the microMIPS,
MIPS16e and nanoMIPS LI decodetree conversions.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
---
 target/mips/tcg/translate.h        |  1 +
 target/mips/tcg/comput_translate.c | 21 +++++++++++++++++++++
 target/mips/tcg/meson.build        |  1 +
 3 files changed, 23 insertions(+)
 create mode 100644 target/mips/tcg/comput_translate.c

diff --git a/target/mips/tcg/translate.h b/target/mips/tcg/translate.h
index 50b62b9dfd28..71370f336dc1 100644
--- a/target/mips/tcg/translate.h
+++ b/target/mips/tcg/translate.h
@@ -169,6 +169,7 @@ void gen_store_fpr32(DisasContext *ctx, TCGv_i32 t, int 
reg);
 void gen_store_fpr64(DisasContext *ctx, TCGv_i64 t, int reg);
 int get_fp_bit(int cc);
 
+void gen_li(DisasContext *ctx, int rd, int imm);
 void gen_lx(DisasContext *ctx, int rd, int base, int index, MemOp mop);
 void gen_ldxs(DisasContext *ctx, int base, int index, int rd);
 void gen_align(DisasContext *ctx, int wordsz, int rd, int rs, int rt, int bp);
diff --git a/target/mips/tcg/comput_translate.c 
b/target/mips/tcg/comput_translate.c
new file mode 100644
index 000000000000..9e809d613dc3
--- /dev/null
+++ b/target/mips/tcg/comput_translate.c
@@ -0,0 +1,21 @@
+/*
+ * MIPS emulation for QEMU - computational translation routines
+ *
+ * Copyright (c) 2021 Philippe Mathieu-Daudé <[email protected]>
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "translate.h"
+
+/* logical instructions */
+
+void gen_li(DisasContext *ctx, int rd, int imm)
+{
+    if (rd == 0) {
+        /* Treat as NOP. */
+        return;
+    }
+    tcg_gen_movi_tl(cpu_gpr[rd], imm);
+}
diff --git a/target/mips/tcg/meson.build b/target/mips/tcg/meson.build
index 644ca85f6390..833bf51ad0d5 100644
--- a/target/mips/tcg/meson.build
+++ b/target/mips/tcg/meson.build
@@ -19,6 +19,7 @@ gen = [
 
 mips_ss.add(gen)
 mips_ss.add(files(
+  'comput_translate.c',
   'dsp_helper.c',
   'exception.c',
   'fpu_helper.c',
-- 
2.55.0


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