Re: Problems with Ficon Director

[R.S.]

W dniu 2012-03-07 01:41, Natasa Savinc pisze:

Hello,
We are having trouble with our M48 FD, all channels to host have status 
'invalid attach failure'. Any similar experiences, any ideas how to check what 
is killing the director? We have open case and IBM support working on this, but 
any additional help would be appreciated.


Did you change anything?
What is shown by director mgmt interface?


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Re: Good source for relationship of opcodes, models, MACHINE() and ARCH()

[Timothy Sipples]

A suggestion: if there are some volunteers to collect and organize the
information, how about putting it on Wikipedia where it can be maintained
and publicly accessed easily going forward, together with links to other
references? Wikipedia is available here:

http://en.wikipedia.org

Perhaps the article should be entitled something like "IBM mainframe
models" with appropriate redirect aliases and links from existing, related
articles.


Timothy Sipples
Resident Enterprise Architect (Based in Singapore)
E-Mail: timothy.sipp...@us.ibm.com

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O/T (but interesting) Quantum computers: IBM on verge of creating machine faster than any supercomputer | Mail Online

[Ed Gould]

http://www.dailymail.co.uk/sciencetech/article-2108160/Quantum- 
computers-IBM-verge-creating-machine-faster-supercomputer.html?ITO=1490



No speed limit: IBM scientists on verge of creating 'quantum  
computers' faster than any supercomputer on Earth


Breakthroughs move technology on 'up to 1000 times'
Scientists believe working quantum computer will happen within their  
lifetimes

Described as 'Holy Grail' of computing
Quantum computer could crack any encryption


Read more: http://www.dailymail.co.uk/sciencetech/article-2108160/ 
Quantum-computers-IBM-verge-creating-machine-faster- 
supercomputer.html#ixzz1oPHJJgsF


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Re: IBM Announcement Letters

[Ed Finnell]

This is what I got
 
---Edited quote---
IBM United States Announcement  Letters

Hardware


IBM  zEnterprise and Unified Resource
Manager enhancements

_http://www.ibm.com/vrm/newsletter_10577_9940_222190_email_DYN_1IN/FDxyzabc1
06848702_ 
(http://www.ibm.com/vrm/newsletter_10577_9940_222190_email_DYN_1IN/FDxyzabc106848702)
 


Software


IBM  Informix Genero V2.40 brings
a wealth of enhancements to accelerate delivery  of media rich applications

_http://www.ibm.com/vrm/newsletter_10577_9940_99_email_DYN_1IN/FDxyzabc1
06848702_ 
(http://www.ibm.com/vrm/newsletter_10577_9940_99_email_DYN_1IN/FDxyzabc106848702)
 


Summary  of all IBM announcements for  today


Announcement Summary -  March 6, 2012

_http://www.ibm.com/vrm/newsletter_10577_9940_223376_email_DYN_1IN/FDxyzabc1
06848702_ 
(http://www.ibm.com/vrm/newsletter_10577_9940_223376_email_DYN_1IN/FDxyzabc106848702)
 

End  quote



In a message dated 3/6/2012 3:12:38 P.M. Central Standard Time,  
linda.lst...@comcast.net writes:

Guess  you'll have to trust me on that!  




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Re: LAE instruction

[Ngafei Huang]

Chaining these control blocks requires supporting environment and setups as 
follow:

AR register basing ASNALET needs to be setup.

AR register basing ASXBFTCB needs to be setup.

Instead of "LAE R4,TCBRBP", it should be "L R4,TCBRBP".

Target address space needs to be on your access-list.

Target address space must be non-swappable.


Raymond Wong



-Original Message-
From: Micheal Butz 
To: IBM-MAIN 
Sent: Tue, Mar 6, 2012 8:30 pm
Subject: Re: LAE instruction


Or a more practical use of LAE

s chaing thru control blocks from another address space 
AC. 512
AM   R3,R3,ASNALET
.   R3,ASXBFTCB
SING TCB,R3
AE.   R4,TCBRBP
SING R4,RB


ent from my iPhone
On Mar 6, 2012, at 5:53 PM, Rob Scott  wrote:
> Micheal, 
 
 Putting a bit of "meat on the bones" to create an example piece of code with 
omments and notes :
 
 (o) We are going to process a linked list of "FOO" elements in a dataspace and 
alculate some random hash value based on a subset of bytes in the FOO_NAME 
ield.
 (o) This code has been just typed into my e-mail - they may be typos/errors
 (o) "WA" is the working storage structure/DSECT
 
 
 DO,
ALESERV ADD,STOKEN=WA_FOO_STOKEN,  Add dataspace containing linked list 
f FOOs
ALET=WA_FOO_ALET,  
AL=WORKUNIT,
   MF=(E,WA_ALESERV_LIST)
DOEXIT (LTR,R15,R15,NZ)Failed - quick exit
SAC512AR-Mode (1)
SYSSTATE ASCENV=ARInform assembler of AR-mode
LR6,WA_FOO_HEADGet head of list
LAMAR6,AR6,WA_FOO_ALETGet dataspace ALET (2) 
USING FOO,R6
DO UNTIL=(ICM,R6,B'',FOO_NEXT,Z)Traverse list (3)
LAER7,FOO_NAMEPoint to FOO_NAME (4)
LAER1,8(,R7)Use R1 for temp pointer (5)
XCWA_HASH,WA_HASHZero hash value
DO FROM=(R14,=AL4(L'FOO_NAME-8))
XRR0,R0
ICR0,0(,R1)Get 1-byte (6)
ALR0,WA_HASHAdd to hash value
STR0,WA_HASHStore new value
LAER1,1(,R1)Next byte of name (6)
ENDDO
NCWA_HASH,=X'00FF'0-255 range for hash
ENDDO
SAC0Inform assembler (7)
SYSSTATE ASCENV=P
 ENDDO(8)
 
 rest of code (9)
 
 Notes :
 
 (1) I think it is always worth having a macro to do both the SAC and the 
YSSTATE for you in one hit (not shown)- stops you forgetting the SYSSTATE and 
hat can confuse any macros that follow.
 (2) Loading the ALET in to the AR for the first time - R6 will be able to 
ddress data in the dataspace
 (3) AR-mode makes traversing data structures in dataspaces easy as you can 
ust use normal instructions (if you play by the rules)
 (4) Because LAE used and FOO dsect covers R6+AR6 - AR7 will contain ALET for 
ataspace after instruction executed
 (5) This time we are using R1 to point at 8 bytes into FOO_NAME (for whatever 
eason) - note that AR1 will get the dataspace ALET
 (6) Loading and using a byte from the dataspace 
 (7) See (1) 
 (8) Assuming all ARs are zero before we start, if the code goes thru 
uccessfully, then AR1, AR6 and AR7 will contain the ALET of the dataspace here 
 you may wish to consider zeroing the ARs at this point if they are no longer 
eeded.
 (9) Prudent use of "LAM   AR14,AR1,=4A(0)" will protect you from unintentional 
R values in "working" regs after calling certain system services - you can 
ever be sure how in-house macros expand.  
 
 Hope this helps

 
 Rob Scott
 Lead Developer
 Rocket Software
 275 Grove Street * Newton, MA 02466-2272 * USA
 Tel: +1.781.684.2305
 Email: rsc...@rs.com
 Web: www.rocketsoftware.com
 
 
 -Original Message-
 From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of 
icheal Butz
 Sent: 06 March 2012 21:53
 To: IBM-MAIN@bama.ua.edu
 Subject: Re: LAE instruction
 
 So  SAC 512
LAE R3,0(,R4)
 
 R3 is CPYA from access R4  right 
 
 -Original Message-
 From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of 
cKown, John
 Sent: Tuesday, March 06, 2012 4:22 PM
 To: IBM-MAIN@bama.ua.edu
 Subject: Re: LAE instruction
 
 Yes, from the LAE instruction text:
 
 
 The address specified by the X2, B2, and D2 fields is placed in general 
egister R1. Access register R1 is loaded with a value that depends on the 
urrent value of the address-space-control bits, bits 16 and
 17 of the PSW. If the address-space-control bits are
 01 binary, the value placed in the access register also depends on whether the 
2 field is zero or non- zero.
 
 ...
 
 PSW Bits
 16 and 17
 Value Placed in Access Register R1
 00  hex (zeros in bit positions 0-31)
 
 10 0001 hex (zeros in bit positions 0-30 and one in bit position 31)
 
 01 If B2 field is zero:  hex (zeros in bit posit

Re: LAE instruction

[Micheal Butz]

Or a more practical use of LAE


Is chaing thru control blocks from another address space 
SAC. 512
LAM   R3,R3,ASNALET
L.   R3,ASXBFTCB
USING TCB,R3
LAE.   R4,TCBRBP
USING R4,RB




Sent from my iPhone

On Mar 6, 2012, at 5:53 PM, Rob Scott  wrote:

> Micheal, 
> 
> Putting a bit of "meat on the bones" to create an example piece of code with 
> comments and notes :
> 
> (o) We are going to process a linked list of "FOO" elements in a dataspace 
> and calculate some random hash value based on a subset of bytes in the 
> FOO_NAME field.
> (o) This code has been just typed into my e-mail - they may be typos/errors
> (o) "WA" is the working storage structure/DSECT
> 
> 
> DO,
>ALESERV ADD,STOKEN=WA_FOO_STOKEN,  Add dataspace containing linked 
> list of FOOs
>ALET=WA_FOO_ALET,  
>AL=WORKUNIT,
>   MF=(E,WA_ALESERV_LIST)
>DOEXIT (LTR,R15,R15,NZ)Failed - quick exit
>SAC512AR-Mode (1)
>SYSSTATE ASCENV=ARInform assembler of AR-mode
>LR6,WA_FOO_HEADGet head of list
>LAMAR6,AR6,WA_FOO_ALETGet dataspace ALET (2) 
>USING FOO,R6
>DO UNTIL=(ICM,R6,B'',FOO_NEXT,Z)Traverse list (3)
>LAER7,FOO_NAMEPoint to FOO_NAME (4)
>LAER1,8(,R7)Use R1 for temp pointer (5)
>XCWA_HASH,WA_HASHZero hash value
>DO FROM=(R14,=AL4(L'FOO_NAME-8))
>XRR0,R0
>ICR0,0(,R1)Get 1-byte (6)
>ALR0,WA_HASHAdd to hash value
>STR0,WA_HASHStore new value
>LAER1,1(,R1)Next byte of name (6)
>ENDDO
>NCWA_HASH,=X'00FF'0-255 range for hash
>ENDDO
>SAC0Inform assembler (7)
>SYSSTATE ASCENV=P
> ENDDO(8)
> 
> rest of code (9)
> 
> Notes :
> 
> (1) I think it is always worth having a macro to do both the SAC and the 
> SYSSTATE for you in one hit (not shown)- stops you forgetting the SYSSTATE 
> and that can confuse any macros that follow.
> (2) Loading the ALET in to the AR for the first time - R6 will be able to 
> address data in the dataspace
> (3) AR-mode makes traversing data structures in dataspaces easy as you can 
> just use normal instructions (if you play by the rules)
> (4) Because LAE used and FOO dsect covers R6+AR6 - AR7 will contain ALET for 
> dataspace after instruction executed
> (5) This time we are using R1 to point at 8 bytes into FOO_NAME (for whatever 
> reason) - note that AR1 will get the dataspace ALET
> (6) Loading and using a byte from the dataspace 
> (7) See (1) 
> (8) Assuming all ARs are zero before we start, if the code goes thru 
> successfully, then AR1, AR6 and AR7 will contain the ALET of the dataspace 
> here - you may wish to consider zeroing the ARs at this point if they are no 
> longer needed.
> (9) Prudent use of "LAM   AR14,AR1,=4A(0)" will protect you from 
> unintentional AR values in "working" regs after calling certain system 
> services - you can never be sure how in-house macros expand.  
> 
> Hope this helps
>
> 
> Rob Scott
> Lead Developer
> Rocket Software
> 275 Grove Street * Newton, MA 02466-2272 * USA
> Tel: +1.781.684.2305
> Email: rsc...@rs.com
> Web: www.rocketsoftware.com
> 
> 
> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf 
> Of Micheal Butz
> Sent: 06 March 2012 21:53
> To: IBM-MAIN@bama.ua.edu
> Subject: Re: LAE instruction
> 
> So  SAC 512
>LAE R3,0(,R4)
> 
> R3 is CPYA from access R4  right 
> 
> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf 
> Of McKown, John
> Sent: Tuesday, March 06, 2012 4:22 PM
> To: IBM-MAIN@bama.ua.edu
> Subject: Re: LAE instruction
> 
> Yes, from the LAE instruction text:
> 
> 
> The address specified by the X2, B2, and D2 fields is placed in general 
> register R1. Access register R1 is loaded with a value that depends on the 
> current value of the address-space-control bits, bits 16 and
> 17 of the PSW. If the address-space-control bits are
> 01 binary, the value placed in the access register also depends on whether 
> the B2 field is zero or non- zero.
> 
> ...
> 
> PSW Bits
> 16 and 17
> Value Placed in Access Register R1
> 00  hex (zeros in bit positions 0-31)
> 
> 10 0001 hex (zeros in bit positions 0-30 and one in bit position 31)
> 
> 01 If B2 field is zero:  hex (zeros in bit positions 0-31) If B2 
> field is nonzero: Contents of access register B2
> 
> 11 0002 hex (zeros in bit positions 0-29 and 31, and one in bit position 
> 30)
> 
> From the SAC instruction 
> 
> CodeName of ModeResult in PSW Bits 16 & 17
> Primary space00
> 0001Secondary space 

Re: TINC?

[Anne & Lynn Wheeler]

edgould1...@comcast.net (Ed Gould) writes:
> We used to run MFT and everyday we changed the partition sizes without
> an IPL.
> Now if you are saying to change from MFT to MVT then indeed an IPL was
> needed,
> as well PCP to MFT (or for that matter MVT)?
>
> The OS is the "key" issue and indeed VM you can "ipl" an OS and it
> probably does not require an IPL(machine wise) a virtual machine
> needs to be brought in .
>
> Maybe I am missing some distinction here.

recent post about vm370 handshaking being done at univ. for MVT
http://www.garlic.com/~lynn/2012c.html#16 5 Byte Device Addresses?

vm370 has function to save an virtual memory image from virtual machine
and then restore it using IPL command (using ipl-by-name function)
 sort like checkpoint/restart ... but for system. they identified
place in MVT where everything was quiesced and could jump back in
... provided for hot-restart significantly cutting MVT IPL elapsed time
startup.

note that one of the customers that had been sold 360/67 was boeing
huntsville to run tss/360 ... tss/360 was never fully realize ...  and
many customers ran machine as 360/65 with os/360. boeing huntsville had
360/67 two-processor multiprocessor configurated to run as two
independent single processor processors ... with MVT supporting several
2250M1s and long-running graphic applications. The problem was that MVT
had a horrible storage fragmentation with long running applications.  As
a result, Boeing Hunstsville had modified release 13 MVT to run in
virtual memory mode but w/o paging. The virtual memory hardware was used
to re-order storage addresses as compensation for significant MVT
storage fragmentation associated with long running applications.

This is similar ... but different to the justification for adding
virtual memory as standard to all 370s ... and move from MVT to SVS
... discussed in this past post:
http://www.garlic.com/~lynn/2011d.html#73 Multiple Virtual Mmeory

 part of quote in above:

Evans around. For reasons unknown to me, the TSO group had the flip
charts and wallboard z used. The clincher was the ability to run 16
initiators simultaneously on a 1 megabyte system, taking advantage of
the fact that MVT normally used only 25% of the memory in a
partition. The resulting throughput gain (compared to real hardware) was
substantial enough to convince Bob. It helped that Tom Simpson and Bob
Crabtree had hosted an MFT II system TSS-Style and shown similar
performance gains. Of course, since CP67 was a pickup group they weren't
considered and we had the OS/VS adventure instead.

... snip ...

Simpson and Crabtree had done HASP ... and then Simpson went on to do
modified MFT-II implementation using TSS-Style paged-mapped filesystem
paradigm called RASP (significant performance advantage over the
approach taken by SVS&MVS preseving the OS/360 disk paradigm).

This wasn't picked up and Simpson left for Amdahl where he there was
"clean-room" do-over. There was legal action about theft of code (even
tho there was no intention of ever using RASP) ... and the resulting
court audits only found a couple accidental incidents examples of
identical code. a couple old email mentioning RASP do-over:
http://www.garlic.com/~lynn/2011e.html#email810408
http://www.garlic.com/~lynn/2011e.html#email820907
http://www.garlic.com/~lynn/2011e.htmL#email870302

a few past posts mentioning RASP:
http://www.garlic.com/~lynn/2000f.html#68 TSS ancient history, was X86 ultimate 
CISC? designs)
http://www.garlic.com/~lynn/2000f.html#69 TSS ancient history, was X86 ultimate 
CISC? designs)
http://www.garlic.com/~lynn/2000f.html#70 TSS ancient history, was X86 ultimate 
CISC? designs)
http://www.garlic.com/~lynn/2001b.html#73 7090 vs. 7094 etc.
http://www.garlic.com/~lynn/2002g.html#0 Blade architectures
http://www.garlic.com/~lynn/2002i.html#63 Hercules and System/390 - do we need 
it?
http://www.garlic.com/~lynn/2002j.html#75 30th b'day
http://www.garlic.com/~lynn/2002q.html#31 Collating on the S/360-2540 card 
reader?
http://www.garlic.com/~lynn/2003e.html#65 801 (was Re: Reviving Multics
http://www.garlic.com/~lynn/2005p.html#44 hasp, jes, rasp, aspen, gold
http://www.garlic.com/~lynn/2006f.html#19 Over my head in a JES exit
http://www.garlic.com/~lynn/2006w.html#24 IBM sues maker of Intel-based 
Mainframe clones
http://www.garlic.com/~lynn/2006w.html#28 IBM sues maker of Intel-based 
Mainframe clones
http://www.garlic.com/~lynn/2007m.html#69 Operating systems are old and busted
http://www.garlic.com/~lynn/2010i.html#44 someone smarter than Dave Cutler
http://www.garlic.com/~lynn/2010o.html#0 Hashing for DISTINCT or GROUP BY in SQL
http://www.garlic.com/~lynn/2010p.html#42 Which non-IBM software products (from 
ISVs) have been most significant to the mainframe's success?
http://www.garlic.com/~lynn/2011.html#85 Two terrific writers .. are going to 
write a book
http://www.garlic.com/~lynn/2011e.html#26 Multiple Virtual Memory
http://www.garlic.com/~lynn/2011e.html#47 junk

Problems with Ficon Director

[Natasa Savinc]

Hello,
We are having trouble with our M48 FD, all channels to host have status 
'invalid attach failure'. Any similar experiences, any ideas how to check what 
is killing the director? We have open case and IBM support working on this, but 
any additional help would be appreciated.
Regards,
Natasa

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Re: LAE instruction

[Sam Siegel]

On Tue, Mar 6, 2012 at 4:07 PM, Bill Fairchild <
bfairch...@rocketsoftware.com> wrote:

> Sobre-pequeño?  Izquierdo medio?  Alto medio?  Gordo-pequeño?  No sé.
>
> I have never had to use only the high half of a grande, only the low half
> or the entire grande.  So I haven't yet named the high half.
>
> I think that would be the left-hand-high-grande. :-)


> Bill Fairchild
>
> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On
> Behalf Of Edward Jaffe
> Sent: Tuesday, March 06, 2012 4:53 PM
> To: IBM-MAIN@bama.ua.edu
> Subject: Re: LAE instruction
>
> On 3/6/2012 1:35 PM, Bill Fairchild wrote:
> > I use GRx to mean the 64-bit Register x (aka "Grande") and Rx to mean
> the 32-bit Register x (aka "pequec").
>
> If the low halves are called the "pequeño registers" then what are the
> high halves called?
>
> --
> Edward E Jaffe
> Phoenix Software International, Inc
> 831 Parkview Drive North
> El Segundo, CA 90245
> 310-338-0400 x318
> edja...@phoenixsoftware.com
> http://www.phoenixsoftware.com/
>
> --
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>
> --
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>

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Re: LAE instruction

[Bill Fairchild]

Sobre-pequeño?  Izquierdo medio?  Alto medio?  Gordo-pequeño?  No sé.

I have never had to use only the high half of a grande, only the low half or 
the entire grande.  So I haven't yet named the high half.

Bill Fairchild

-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of 
Edward Jaffe
Sent: Tuesday, March 06, 2012 4:53 PM
To: IBM-MAIN@bama.ua.edu
Subject: Re: LAE instruction

On 3/6/2012 1:35 PM, Bill Fairchild wrote:
> I use GRx to mean the 64-bit Register x (aka "Grande") and Rx to mean the 
> 32-bit Register x (aka "pequec").

If the low halves are called the "pequeño registers" then what are the high 
halves called?

--
Edward E Jaffe
Phoenix Software International, Inc
831 Parkview Drive North
El Segundo, CA 90245
310-338-0400 x318
edja...@phoenixsoftware.com
http://www.phoenixsoftware.com/

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Re: TINC?

[Ed Gould]

Randy:

We used to run MFT and everyday we changed the partition sizes  
without an IPL.
Now if you are saying to change from MFT to MVT then indeed an IPL  
was needed,

as well PCP to MFT (or for that matter MVT)?

The OS is the "key" issue and indeed VM you can "ipl" an OS and it  
probably does not require an IPL(machine wise) a virtual machine  
needs to be brought in .


Maybe I am missing some distinction here.

Ed


On Mar 5, 2012, at 9:06 AM, Gross, Randall [GCG-PFS] wrote:


In college, we had a 360/40 running PCP (Primary Control Program) in
64K; iirc, PCP could not be patrtitioned.

I worked one summer for a company that had a 256k 360/40 running MFT
with (typically) 4  partitions.  Iirc, it took an IPL to reconfigure
MFT. (M = multimple, F = fixed)

I belive MVT (V = variable) was the first OS360 operating system that
suppored dynamic repartitioning, but I could be wrong.  I never
experienced MVT - just went from MFT to SVS to MVS.

Randy



-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On
Behalf Of Lloyd Fuller
Sent: Friday, March 02, 2012 8:32 AM
To: IBM-MAIN@bama.ua.edu
Subject: Re: TINC?

It could be that the spooler was really a resident writer.  I was  
just a
newby programmer, and know that we were told that requiring more  
than a

certain amount of memory required a major operations change and was
frowned on.

It was definitely not DOS/360.  It was OS/360 and used JCL with DCBs,
etc, not the DOS/360 stuff.

Lloyd



- Original Message 
From: John Gilmore 
To: IBM-MAIN@bama.ua.edu
Sent: Thu, March 1, 2012 4:09:02 PM
Subject: Re: TINC?

Shmuel/Seymour wrote:


NFW. There was only a single partition on PCP. Based on the model I'd
guess that you were running DOS/360.


and it is correct, albeit in a Pickwickian sense, that OS/PCP "had  
only

a single partition"; but it did support both transient and resident
readers and writers; there were even some very primitive to-2311-DASD
RYO spoolers in use; and at this remove Lloyd Fuller's confusion  
may be

only a terminological one.  Still, I too guess that he may have been
using DOS.

--jg


On 3/1/12, Shmuel Metz (Seymour J.)   
wrote:

In <1330520469.27305.yahoomai...@web180907.mail.ne1.yahoo.com>, on
02/29/2012
   at 05:01 AM, Lloyd Fuller  said:


No.  When we used PCP on the Model 40 with 64K.  We had a single job
partition  and, most of the time, a spool partition.


NFW. There was only a single partition on PCP. Based on the model I'd
guess that you were running DOS/360.


It was a very simple partition (like 10K or so) that ran the 1401


What are you trying to say? The 1401 was a computer, not a  
program. If



you meant that you ran the 1401 Emulator program, that confirms that
it was DOS.

If we needed more memory for a specific purpose, we would reipl  
from a



different pack and bring up OS360 with just the program partition.


Another sign that you were not running OS/360; on an OS/360 system
with multiple partitions you can amalgamated partitions with the
DEFINE command; you don't need to re-IPL.

--
 Shmuel (Seymour J.) Metz, SysProg and JOAT
 ISO position; see 
We don't care. We don't have to care, we're Congress.
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Re: LAE instruction

[Micheal Butz]

I see thanks the displacement used calculating Gr.   If not for LAE

You would have to use L RX,8(,RY)
Then CPYA. RX,RY. Rob
Thanks for explanation of practical
Use of LAE













Sent from my iPhone

On Mar 6, 2012, at 5:53 PM, Rob Scott  wrote:

> Micheal, 
> 
> Putting a bit of "meat on the bones" to create an example piece of code with 
> comments and notes :
> 
> (o) We are going to process a linked list of "FOO" elements in a dataspace 
> and calculate some random hash value based on a subset of bytes in the 
> FOO_NAME field.
> (o) This code has been just typed into my e-mail - they may be typos/errors
> (o) "WA" is the working storage structure/DSECT
> 
> 
> DO,
>ALESERV ADD,STOKEN=WA_FOO_STOKEN,  Add dataspace containing linked 
> list of FOOs
>ALET=WA_FOO_ALET,  
>AL=WORKUNIT,
>   MF=(E,WA_ALESERV_LIST)
>DOEXIT (LTR,R15,R15,NZ)Failed - quick exit
>SAC512AR-Mode (1)
>SYSSTATE ASCENV=ARInform assembler of AR-mode
>LR6,WA_FOO_HEADGet head of list
>LAMAR6,AR6,WA_FOO_ALETGet dataspace ALET (2) 
>USING FOO,R6
>DO UNTIL=(ICM,R6,B'',FOO_NEXT,Z)Traverse list (3)
>LAER7,FOO_NAMEPoint to FOO_NAME (4)
>LAER1,8(,R7)Use R1 for temp pointer (5)
>XCWA_HASH,WA_HASHZero hash value
>DO FROM=(R14,=AL4(L'FOO_NAME-8))
>XRR0,R0
>ICR0,0(,R1)Get 1-byte (6)
>ALR0,WA_HASHAdd to hash value
>STR0,WA_HASHStore new value
>LAER1,1(,R1)Next byte of name (6)
>ENDDO
>NCWA_HASH,=X'00FF'0-255 range for hash
>ENDDO
>SAC0Inform assembler (7)
>SYSSTATE ASCENV=P
> ENDDO(8)
> 
> rest of code (9)
> 
> Notes :
> 
> (1) I think it is always worth having a macro to do both the SAC and the 
> SYSSTATE for you in one hit (not shown)- stops you forgetting the SYSSTATE 
> and that can confuse any macros that follow.
> (2) Loading the ALET in to the AR for the first time - R6 will be able to 
> address data in the dataspace
> (3) AR-mode makes traversing data structures in dataspaces easy as you can 
> just use normal instructions (if you play by the rules)
> (4) Because LAE used and FOO dsect covers R6+AR6 - AR7 will contain ALET for 
> dataspace after instruction executed
> (5) This time we are using R1 to point at 8 bytes into FOO_NAME (for whatever 
> reason) - note that AR1 will get the dataspace ALET
> (6) Loading and using a byte from the dataspace 
> (7) See (1) 
> (8) Assuming all ARs are zero before we start, if the code goes thru 
> successfully, then AR1, AR6 and AR7 will contain the ALET of the dataspace 
> here - you may wish to consider zeroing the ARs at this point if they are no 
> longer needed.
> (9) Prudent use of "LAM   AR14,AR1,=4A(0)" will protect you from 
> unintentional AR values in "working" regs after calling certain system 
> services - you can never be sure how in-house macros expand.  
> 
> Hope this helps
>
> 
> Rob Scott
> Lead Developer
> Rocket Software
> 275 Grove Street * Newton, MA 02466-2272 * USA
> Tel: +1.781.684.2305
> Email: rsc...@rs.com
> Web: www.rocketsoftware.com
> 
> 
> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf 
> Of Micheal Butz
> Sent: 06 March 2012 21:53
> To: IBM-MAIN@bama.ua.edu
> Subject: Re: LAE instruction
> 
> So  SAC 512
>LAE R3,0(,R4)
> 
> R3 is CPYA from access R4  right 
> 
> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf 
> Of McKown, John
> Sent: Tuesday, March 06, 2012 4:22 PM
> To: IBM-MAIN@bama.ua.edu
> Subject: Re: LAE instruction
> 
> Yes, from the LAE instruction text:
> 
> 
> The address specified by the X2, B2, and D2 fields is placed in general 
> register R1. Access register R1 is loaded with a value that depends on the 
> current value of the address-space-control bits, bits 16 and
> 17 of the PSW. If the address-space-control bits are
> 01 binary, the value placed in the access register also depends on whether 
> the B2 field is zero or non- zero.
> 
> ...
> 
> PSW Bits
> 16 and 17
> Value Placed in Access Register R1
> 00  hex (zeros in bit positions 0-31)
> 
> 10 0001 hex (zeros in bit positions 0-30 and one in bit position 31)
> 
> 01 If B2 field is zero:  hex (zeros in bit positions 0-31) If B2 
> field is nonzero: Contents of access register B2
> 
> 11 0002 hex (zeros in bit positions 0-29 and 31, and one in bit position 
> 30)
> 
> From the SAC instruction 
> 
> CodeName of ModeResult in PSW Bits 16 & 17
> Primary space00
> 0001Secondary space   

Re: LAE instruction

[Gord Tomlin]

On 2012-03-06 17:53, Edward Jaffe wrote:

If the low halves are called the "pequeño registers" then what are the
high halves called?



Jerry Garcia.

--

Regards, Gord Tomlin
Action Software International
(a division of Mazda Computer Corporation)
Tel: (905) 470-7113, Fax: (905) 470-6507

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Re: LAE instruction

[John Gilmore]

I was glad to see Allen Gainsford's mention of the Copy Access, CPYA,
instruction.  It is too little known and used, as this thread makes
clear.

John Gilmore, Ashland, MA 01721 - USA

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Re: LAE instruction

[Rob Scott]

Micheal, 

Putting a bit of "meat on the bones" to create an example piece of code with 
comments and notes :

(o) We are going to process a linked list of "FOO" elements in a dataspace and 
calculate some random hash value based on a subset of bytes in the FOO_NAME 
field.
(o) This code has been just typed into my e-mail - they may be typos/errors
(o) "WA" is the working storage structure/DSECT


DO,
ALESERV ADD,STOKEN=WA_FOO_STOKEN,   Add dataspace containing linked 
list of FOOs
ALET=WA_FOO_ALET,  
AL=WORKUNIT,
MF=(E,WA_ALESERV_LIST)
DOEXIT (LTR,R15,R15,NZ) Failed - quick exit
SAC 512 AR-Mode (1)
SYSSTATE ASCENV=AR  Inform assembler of 
AR-mode
L   R6,WA_FOO_HEAD  Get head of list
LAM AR6,AR6,WA_FOO_ALET Get dataspace ALET (2) 
USING FOO,R6
DO UNTIL=(ICM,R6,B'',FOO_NEXT,Z)Traverse list (3)
LAE R7,FOO_NAME Point to FOO_NAME (4)
LAE R1,8(,R7)   Use R1 for temp pointer 
(5)
XC  WA_HASH,WA_HASH Zero hash value
DO FROM=(R14,=AL4(L'FOO_NAME-8))
XR  R0,R0   
IC  R0,0(,R1)   Get 1-byte (6)
AL  R0,WA_HASH  Add to hash value
ST  R0,WA_HASH  Store new value
LAE R1,1(,R1)   Next byte of name (6)
ENDDO
NC  WA_HASH,=X'00FF'0-255 range for hash
ENDDO
SAC 0   Inform assembler (7)
SYSSTATE ASCENV=P
ENDDO   (8) 

rest of code (9)

Notes :

(1) I think it is always worth having a macro to do both the SAC and the 
SYSSTATE for you in one hit (not shown)- stops you forgetting the SYSSTATE and 
that can confuse any macros that follow.
(2) Loading the ALET in to the AR for the first time - R6 will be able to 
address data in the dataspace
(3) AR-mode makes traversing data structures in dataspaces easy as you can just 
use normal instructions (if you play by the rules)
(4) Because LAE used and FOO dsect covers R6+AR6 - AR7 will contain ALET for 
dataspace after instruction executed
(5) This time we are using R1 to point at 8 bytes into FOO_NAME (for whatever 
reason) - note that AR1 will get the dataspace ALET
(6) Loading and using a byte from the dataspace 
(7) See (1) 
(8) Assuming all ARs are zero before we start, if the code goes thru 
successfully, then AR1, AR6 and AR7 will contain the ALET of the dataspace here 
- you may wish to consider zeroing the ARs at this point if they are no longer 
needed.
(9) Prudent use of "LAM   AR14,AR1,=4A(0)" will protect you from unintentional 
AR values in "working" regs after calling certain system services - you can 
never be sure how in-house macros expand.  

Hope this helps


Rob Scott
Lead Developer
Rocket Software
275 Grove Street * Newton, MA 02466-2272 * USA
Tel: +1.781.684.2305
Email: rsc...@rs.com
Web: www.rocketsoftware.com


-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of 
Micheal Butz
Sent: 06 March 2012 21:53
To: IBM-MAIN@bama.ua.edu
Subject: Re: LAE instruction

So  SAC 512
LAE R3,0(,R4)

 R3 is CPYA from access R4  right 

-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of 
McKown, John
Sent: Tuesday, March 06, 2012 4:22 PM
To: IBM-MAIN@bama.ua.edu
Subject: Re: LAE instruction

Yes, from the LAE instruction text:


The address specified by the X2, B2, and D2 fields is placed in general 
register R1. Access register R1 is loaded with a value that depends on the 
current value of the address-space-control bits, bits 16 and
17 of the PSW. If the address-space-control bits are
01 binary, the value placed in the access register also depends on whether the 
B2 field is zero or non- zero.

...

PSW Bits
16 and 17
Value Placed in Access Register R1
00  hex (zeros in bit positions 0-31)

10 0001 hex (zeros in bit positions 0-30 and one in bit position 31)

01 If B2 field is zero:  hex (zeros in bit positions 0-31) If B2 field 
is nonzero: Contents of access register B2

11 0002 hex (zeros in bit positions 0-29 and 31, and one in bit position 30)

>From the SAC instruction 

CodeName of ModeResult in PSW Bits 16 & 17
Primary space   00
0001Secondary space 10
0010Access register 01
0011Home space  11
All others Invalid



SAC 512 has is '0010' from

Re: LAE instruction

[Micheal Butz]

But plays no role as far as access register value

Sent from my iPhone

On Mar 6, 2012, at 3:48 PM, "Shmuel Metz (Seymour J.)" 
 wrote:

> In <02fb01ccfbcb$fca77eb0$f5f67c10$@net>, on 03/06/2012
>   at 02:04 PM, Micheal Butz  said:
> 
>> . What would the sac value e.g. 256,512,768 have to be that
>> when using the LAE instructions with the following operands LAE 
>> 3,0(R4) would AR3 get loaded with AR4 
> 
> None; try LAE R3,0(,R4)
> 
>> Second what value does the displacement play in the instruction
> 
> It's added to the base and index registers.
> 
> -- 
> Shmuel (Seymour J.) Metz, SysProg and JOAT
> ISO position; see  
> We don't care. We don't have to care, we're Congress.
> (S877: The Shut up and Eat Your spam act of 2003)
> 
> --
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Re: LAE instruction

[Edward Jaffe]

On 3/6/2012 1:35 PM, Bill Fairchild wrote:

I use GRx to mean the 64-bit Register x (aka "Grande") and Rx to mean the 32-bit Register 
x (aka "pequeño").


If the low halves are called the "pequeño registers" then what are the high 
halves called?


--
Edward E Jaffe
Phoenix Software International, Inc
831 Parkview Drive North
El Segundo, CA 90245
310-338-0400 x318
edja...@phoenixsoftware.com
http://www.phoenixsoftware.com/

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Re: TAPEMAP generator

[McKown, John]

For a "one off", I rather liked the simple JCL with a PROC and the volser as a 
symbol. Then, one volser, one EXEC PROC statement. 

If I were going to do this for an ongoing project, then I would consider ISPF 
file tailoring, but mainly if the input is from a user at a terminal. If the 
volser list is computer generated into a dataset, then I'd probably use REXX in 
batch to create the job(s) and write them to SYSOUT=(*,INTRDR).

I could probably write an awk program to do it as well. But that seems to be 
"overkill", to me.

--
John McKown 
Systems Engineer IV
IT

Administrative Services Group

HealthMarkets(r)

9151 Boulevard 26 * N. Richland Hills * TX 76010
(817) 255-3225 phone * 
john.mck...@healthmarkets.com * www.HealthMarkets.com

Confidentiality Notice: This e-mail message may contain confidential or 
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the sender by reply e-mail and destroy all copies of the original message. 
HealthMarkets(r) is the brand name for products underwritten and issued by the 
insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance 
Company(r), Mid-West National Life Insurance Company of TennesseeSM and The 
MEGA Life and Health Insurance Company.SM

 

> -Original Message-
> From: IBM Mainframe Discussion List 
> [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of Shmuel Metz (Seymour J.)
> Sent: Tuesday, March 06, 2012 2:54 PM
> To: IBM-MAIN@bama.ua.edu
> Subject: Re: TAPEMAP generator
> 
> In <7952198520721379.wa.paulgboulderaim@bama.ua.edu>, on
> 03/06/2012
>at 10:43 AM, Paul Gilmartin  said:
> 
> >The best way is a POSIX shell script,
> 
> Why? It looks like a perfect application for ISPF File Tailoring.
>  
> -- 
>  Shmuel (Seymour J.) Metz, SysProg and JOAT
>  ISO position; see  
> We don't care. We don't have to care, we're Congress.
> (S877: The Shut up and Eat Your spam act of 2003)
> 
> --
> For IBM-MAIN subscribe / signoff / archive access instructions,
> send email to lists...@bama.ua.edu with the message: INFO IBM-MAIN
> 
> 

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Re: Program FLIH backdoor - This is a criminal breach of security!

[Shmuel Metz (Seymour J.)]

In <4f5638d5.6050...@phoenixsoftware.com>, on 03/06/2012
   at 08:18 AM, Edward Jaffe  said:

>Suffice to say that it does.

Perhaps; I'd have to examine the code to confirm that. Of course, if I
examined the code and found a hole, I wouldn't give the details to
anybody but IBM.
 
-- 
 Shmuel (Seymour J.) Metz, SysProg and JOAT
 ISO position; see  
We don't care. We don't have to care, we're Congress.
(S877: The Shut up and Eat Your spam act of 2003)

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Re: TAPEMAP generator

[Shmuel Metz (Seymour J.)]

In <7952198520721379.wa.paulgboulderaim@bama.ua.edu>, on
03/06/2012
   at 10:43 AM, Paul Gilmartin  said:

>The best way is a POSIX shell script,

Why? It looks like a perfect application for ISPF File Tailoring.
 
-- 
 Shmuel (Seymour J.) Metz, SysProg and JOAT
 ISO position; see  
We don't care. We don't have to care, we're Congress.
(S877: The Shut up and Eat Your spam act of 2003)

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Re: TAPEMAP generator

[Shmuel Metz (Seymour J.)]

In <5805879972290486.wa.elardus.engelbrechtsita.co...@bama.ua.edu>, on
03/06/2012
   at 01:19 PM, Elardus Engelbrecht 
said:

>Hehe... :-D   Variable names can be anything.

Anything? 'Çhár-(' would certainly not be a valid variable name.
 
-- 
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 ISO position; see  
We don't care. We don't have to care, we're Congress.
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Re: LAE instruction

[Shmuel Metz (Seymour J.)]

In <02fb01ccfbcb$fca77eb0$f5f67c10$@net>, on 03/06/2012
   at 02:04 PM, Micheal Butz  said:

>. What would the sac value e.g. 256,512,768 have to be that
>when using the LAE instructions with the following operands LAE 
>3,0(R4) would AR3 get loaded with AR4 

None; try LAE R3,0(,R4)

>Second what value does the displacement play in the instruction

It's added to the base and index registers.
 
-- 
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 ISO position; see  
We don't care. We don't have to care, we're Congress.
(S877: The Shut up and Eat Your spam act of 2003)

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Re: LAE instruction

[McKown, John]

I think that is what you are wanting. Now, if you don't really want to be in AR 
mode, I would probably use:

 CPYA 3,4 COPY ACCESS REG 4 INTO ACCRESS REG 4
 LA   3,0(,4) LOAD ADDRESS PORTION OF GPR 4 INTO GPR3

or maybe
  CPYA 3,4
  LR 3,4

or perhaps even
  CPYA 3,4
  LGR 3,4

As Perl people say: "There's more than one way to do it."

--
John McKown 
Systems Engineer IV
IT

Administrative Services Group

HealthMarkets(r)

9151 Boulevard 26 * N. Richland Hills * TX 76010
(817) 255-3225 phone * 
john.mck...@healthmarkets.com * www.HealthMarkets.com

Confidentiality Notice: This e-mail message may contain confidential or 
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the sender by reply e-mail and destroy all copies of the original message. 
HealthMarkets(r) is the brand name for products underwritten and issued by the 
insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance 
Company(r), Mid-West National Life Insurance Company of TennesseeSM and The 
MEGA Life and Health Insurance Company.SM

 

> -Original Message-
> From: IBM Mainframe Discussion List 
> [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of Micheal Butz
> Sent: Tuesday, March 06, 2012 3:53 PM
> To: IBM-MAIN@bama.ua.edu
> Subject: Re: LAE instruction
> 
> So  SAC 512
> LAE R3,0(,R4)
> 
>  R3 is CPYA from access R4  right 
> 
> -Original Message-
> From: IBM Mainframe Discussion List 
> [mailto:IBM-MAIN@bama.ua.edu] On Behalf
> Of McKown, John
> Sent: Tuesday, March 06, 2012 4:22 PM
> To: IBM-MAIN@bama.ua.edu
> Subject: Re: LAE instruction
> 
> Yes, from the LAE instruction text:
> 
> 
> The address specified by the X2, B2, and D2 fields is
> placed in general register R1. Access register R1 is
> loaded with a value that depends on the current
> value of the address-space-control bits, bits 16 and
> 17 of the PSW. If the address-space-control bits are
> 01 binary, the value placed in the access register
> also depends on whether the B2 field is zero or non-
> zero.
> 
> ...
> 
> PSW Bits
> 16 and 17
> Value Placed in Access Register R1
> 00  hex (zeros in bit positions 0-31)
> 
> 10 0001 hex (zeros in bit positions 0-30
> and one in bit position 31)
> 
> 01 If B2 field is zero:  hex (zeros in
> bit positions 0-31)
> If B2 field is nonzero: Contents of access
> register B2
> 
> 11 0002 hex (zeros in bit positions 0-29
> and 31, and one in bit position 30)
> 
> From the SAC instruction 
> 
> Code  Name of ModeResult in PSW Bits 16 & 17
>   Primary space   00
> 0001  Secondary space 10
> 0010  Access register 01
> 0011  Home space  11
> All others Invalid
> 
> 
> 
> SAC 512 has is '0010' from the above and results in b'01' or 
> AR mode in the
> PSW bits 16 & 17. Which is what is required for the LAE 
> instruction to set
> the access register of the result access register from the base access
> register (when not b'').
> 
> 
> 
> John McKown 
> 
> Systems Engineer IV
> 
> IT
> 
>  
> 
> Administrative Services Group
> 
>  
> 
> HealthMarkets(r)
> 
>  
> 
> 9151 Boulevard 26 * N. Richland Hills * TX 76010
> 
> (817) 255-3225 phone * 
> 
> john.mck...@healthmarkets.com * www.HealthMarkets.com
> 
>  
> 
> Confidentiality Notice: This e-mail message may contain 
> confidential or
> proprietary information. If you are not the intended recipient, please
> contact the sender by reply e-mail and destroy all copies of 
> the original
> message. HealthMarkets(r) is the brand name for products 
> underwritten and
> issued by the insurance subsidiaries of HealthMarkets, Inc. 
> -The Chesapeake
> Life Insurance Company(r), Mid-West National Life Insurance Company of
> TennesseeSM and The MEGA Life and Health Insurance Company.SM
> 
>  
> 
> > -Original Message-
> > From: IBM Mainframe Discussion List 
> > [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of Micheal Butz
> > Sent: Tuesday, March 06, 2012 3:00 PM
> > To: IBM-MAIN@bama.ua.edu
> > Subject: Re: LAE instruction
> > 
> > John Mckiwns reply was a explanation of the SAC inst.
> > Which I am aware of
> > 
> > The Doc for LAE says the inst the functionality is dependent 
> > on PSW bits
> > 
> > 16 17 address space control bits these are set by the SAC inst
> > 
> > 
> > So my original question remains does
> > 
> > Should address space control buts be set via the sac before 
> > executing the LAE 
> > 
> > 
> > Sent from my iPhone
> > 
> > On Mar 6, 2012, at 3:37 PM, Rob Scott 
> >  wrote:
> > 
> > > John McKown's reply covered these points very well
> > > 
> > > Rob Scott
> > > Lead Developer
> > > Rocket Software
> > > 275 Grove Street * Newton, MA 02466-2272 * USA
> > > Tel: +1.781.684.2305
> > > Email: rsc...@rs.com
> > > Web: www.rocketsoftware.com
> > > 
> > > 
> > > -Original Message-
> > > From: IBM Mainframe Discussion List 
> > [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of Micheal Butz
> > > Sent: 06 March 2012 19:59
> > > To: IBM-MAIN@bama.ua.edu

Re: LAE instruction

[Micheal Butz]

I Know in access register mode  B2 ALWAYS implies corresponding AR

thanks 

-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf
Of Blaicher, Christopher Y.
Sent: Tuesday, March 06, 2012 4:27 PM
To: IBM-MAIN@bama.ua.edu
Subject: Re: LAE instruction

Yes, set the SAC bits first, otherwise the access register is set with
zeros.

The other point that others are making is that when in access register mode,
the instruction format is VERY important.

LAE  R3,(R4)  - loads the value from the location pointed to by R4 in the
home address space into R3 and sets the AR3 register with 0, regardless of
the SAC values at the time.

LAE  R3,0(0,R4)   - loads the value from the location pointed to by R4 in
the address space indicated by access register AR4, if the SAC value is
other than b'00', and loads AR3 with the SAC appropriate value.

Even if you never write access register sensitive code, it is far better to
use the correct instruction format.  A) It gets you in the habit; and B) You
never know when a piece of code may become access register sensitive.

Chris Blaicher
Senior Software Engineer, Software Services
Syncsort Incorporated
50 Tice Boulevard, Woodcliff Lake, NJ 07677
P: 201-930-8260  |  M: 512-627-3803    
E: cblaic...@syncsort.com

www.syncsort.com

Check out our Knowledge Base at www.syncsort.com/support

Syncsort aims for the best product and service experience. 
We welcome your feedback.


-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf
Of Micheal Butz
Sent: Tuesday, March 06, 2012 3:07 PM
To: MVS List Server 1
Subject: Re: LAE instruction

Sorry misspelled the name John McKown. Excuse me

Sent from my iPhone

On Mar 6, 2012, at 4:00 PM, Micheal Butz  wrote:

> John Mckiwns reply was a explanation of the SAC inst.Which I am aware
of
> 
> The Doc for LAE says the inst the functionality is dependent on PSW bits
> 
> 16 17 address space control bits these are set by the SAC inst
> 
> 
> So my original question remains does
> 
> Should address space control buts be set via the sac before executing the
LAE 
> 
> 
> Sent from my iPhone
> 
> On Mar 6, 2012, at 3:37 PM, Rob Scott  wrote:
> 
>> John McKown's reply covered these points very well
>> 
>> Rob Scott
>> Lead Developer
>> Rocket Software
>> 275 Grove Street * Newton, MA 02466-2272 * USA
>> Tel: +1.781.684.2305
>> Email: rsc...@rs.com
>> Web: www.rocketsoftware.com
>> 
>> 
>> -Original Message-
>> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On
Behalf Of Micheal Butz
>> Sent: 06 March 2012 19:59
>> To: IBM-MAIN@bama.ua.edu
>> Subject: Re: LAE instruction
>> 
>> Thanks
>> 
>> Regarding my questions
>> 
>> The doc says the inst is dependent
>> On address space control bits which is set by the SAC inst. 
>> 
>> Secondly seems like the displacement doesn't play a role in the inst
>> 
>> Sent from my iPhone
>> 
>> On Mar 6, 2012, at 2:49 PM, Rob Scott  wrote:
>> 
 You have coded "LAE   R3,0(R4)" - which is the same as "LAE
R3,(R4,R0)"
>>> 
>>> Should read :
>>> 
>>> You have coded "LAE   R3,0(R4)" - which is the same as "LAE
R3,0(R4,R0)"
>>> 
>>> Rob Scott
>>> Lead Developer
>>> Rocket Software
>>> 275 Grove Street * Newton, MA 02466-2272 * USA
>>> Tel: +1.781.684.2305
>>> Email: rsc...@rs.com
>>> Web: www.rocketsoftware.com
>>> 
>>> 
>>> -Original Message-
>>> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On 
>>> Behalf Of Rob Scott
>>> Sent: 06 March 2012 19:47
>>> To: IBM-MAIN@bama.ua.edu
>>> Subject: Re: LAE instruction
>>> 
>>> Commas are *very* important in AR-mode
>>> 
>>> You have coded "LAE   R3,0(R4)" - which is the same as "LAE
R3,(R4,R0)"
>>> 
>>> Coded that way there is no automatic way that AR3 is going to inherit
the AR4 value.
>>> 
>>> You need : "LAE   R3,0(,R4)"
>>> 
>>> This will ensure that AR3 is populated from the AR for the referenced
base register R4.
>>> 
>>> 
>>> Rob Scott
>>> Lead Developer
>>> Rocket Software
>>> 275 Grove Street * Newton, MA 02466-2272 * USA
>>> Tel: +1.781.684.2305
>>> Email: rsc...@rs.com
>>> Web: www.rocketsoftware.com
>>> 
>>> 
>>> -Original Message-
>>> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On 
>>> Behalf Of Micheal Butz
>>> Sent: 06 March 2012 19:05
>>> To: IBM-MAIN@bama.ua.edu
>>> Subject: LAE instruction
>>> 
>>> Hi,
>>> 
>>> 
>>> 
>>> I have two part question regarding the LAE instruction
>>> 
>>> 
>>> 
>>> . What would the sac value e.g. 256,512,768 have to be that when
>>> using the LAE instructions with the following operands LAE  3,0(R4) 
>>> would
>>> AR3 get loaded with AR4
>>> 
>>> 
>>> 
>>> . Second what value does the displacement play in the
instruction
>>> 
>>> 
>>> 
>>> 
>>> 
>>> 
>>> 
>>> 
>>> 
>>> 
>>> 
>>>   Thanks 
>>> 
>>> 
>>> --
>>> For IBM-MAIN subscribe / signoff / archive access 

Re: LAE instruction

[Micheal Butz]

So  SAC 512
LAE R3,0(,R4)

 R3 is CPYA from access R4  right 

-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf
Of McKown, John
Sent: Tuesday, March 06, 2012 4:22 PM
To: IBM-MAIN@bama.ua.edu
Subject: Re: LAE instruction

Yes, from the LAE instruction text:


The address specified by the X2, B2, and D2 fields is
placed in general register R1. Access register R1 is
loaded with a value that depends on the current
value of the address-space-control bits, bits 16 and
17 of the PSW. If the address-space-control bits are
01 binary, the value placed in the access register
also depends on whether the B2 field is zero or non-
zero.

...

PSW Bits
16 and 17
Value Placed in Access Register R1
00  hex (zeros in bit positions 0-31)

10 0001 hex (zeros in bit positions 0-30
and one in bit position 31)

01 If B2 field is zero:  hex (zeros in
bit positions 0-31)
If B2 field is nonzero: Contents of access
register B2

11 0002 hex (zeros in bit positions 0-29
and 31, and one in bit position 30)

>From the SAC instruction 

CodeName of ModeResult in PSW Bits 16 & 17
Primary space   00
0001Secondary space 10
0010Access register 01
0011Home space  11
All others Invalid



SAC 512 has is '0010' from the above and results in b'01' or AR mode in the
PSW bits 16 & 17. Which is what is required for the LAE instruction to set
the access register of the result access register from the base access
register (when not b'').



John McKown 

Systems Engineer IV

IT

 

Administrative Services Group

 

HealthMarkets(r)

 

9151 Boulevard 26 * N. Richland Hills * TX 76010

(817) 255-3225 phone * 

john.mck...@healthmarkets.com * www.HealthMarkets.com

 

Confidentiality Notice: This e-mail message may contain confidential or
proprietary information. If you are not the intended recipient, please
contact the sender by reply e-mail and destroy all copies of the original
message. HealthMarkets(r) is the brand name for products underwritten and
issued by the insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake
Life Insurance Company(r), Mid-West National Life Insurance Company of
TennesseeSM and The MEGA Life and Health Insurance Company.SM

 

> -Original Message-
> From: IBM Mainframe Discussion List 
> [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of Micheal Butz
> Sent: Tuesday, March 06, 2012 3:00 PM
> To: IBM-MAIN@bama.ua.edu
> Subject: Re: LAE instruction
> 
> John Mckiwns reply was a explanation of the SAC inst.
> Which I am aware of
> 
> The Doc for LAE says the inst the functionality is dependent 
> on PSW bits
> 
> 16 17 address space control bits these are set by the SAC inst
> 
> 
> So my original question remains does
> 
> Should address space control buts be set via the sac before 
> executing the LAE 
> 
> 
> Sent from my iPhone
> 
> On Mar 6, 2012, at 3:37 PM, Rob Scott 
>  wrote:
> 
> > John McKown's reply covered these points very well
> > 
> > Rob Scott
> > Lead Developer
> > Rocket Software
> > 275 Grove Street * Newton, MA 02466-2272 * USA
> > Tel: +1.781.684.2305
> > Email: rsc...@rs.com
> > Web: www.rocketsoftware.com
> > 
> > 
> > -Original Message-
> > From: IBM Mainframe Discussion List 
> [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of Micheal Butz
> > Sent: 06 March 2012 19:59
> > To: IBM-MAIN@bama.ua.edu
> > Subject: Re: LAE instruction
> > 
> > Thanks
> > 
> > Regarding my questions
> > 
> > The doc says the inst is dependent
> > On address space control bits which is set by the SAC inst. 
> > 
> > Secondly seems like the displacement doesn't play a role in the inst
> > 
> > Sent from my iPhone
> > 
> > On Mar 6, 2012, at 2:49 PM, Rob Scott 
>  wrote:
> > 
> >>> You have coded "LAE   R3,0(R4)" - which is the same as 
> "LAE   R3,(R4,R0)"
> >> 
> >> Should read :
> >> 
> >> You have coded "LAE   R3,0(R4)" - which is the same as 
> "LAE   R3,0(R4,R0)"
> >> 
> >> Rob Scott
> >> Lead Developer
> >> Rocket Software
> >> 275 Grove Street * Newton, MA 02466-2272 * USA
> >> Tel: +1.781.684.2305
> >> Email: rsc...@rs.com
> >> Web: www.rocketsoftware.com
> >> 
> >> 
> >> -Original Message-
> >> From: IBM Mainframe Discussion List 
> [mailto:IBM-MAIN@bama.ua.edu] On 
> >> Behalf Of Rob Scott
> >> Sent: 06 March 2012 19:47
> >> To: IBM-MAIN@bama.ua.edu
> >> Subject: Re: LAE instruction
> >> 
> >> Commas are *very* important in AR-mode
> >> 
> >> You have coded "LAE   R3,0(R4)" - which is the same as 
> "LAE   R3,(R4,R0)"
> >> 
> >> Coded that way there is no automatic way that AR3 is going 
> to inherit the AR4 value.
> >> 
> >> You need : "LAE   R3,0(,R4)"
> >> 
> >> This will ensure that AR3 is populated from the AR for the 
> referenced base register R4.
> >> 
> >> 
> >> Rob Scott
> >> Lead Developer
> >> Rocket Software
> >> 275 Grove Street * Newton, MA 02466-2272 * USA
> >> Tel: +1.781.684.2305
> >> Email: rsc...@rs.com
> >> Web: www.rocketsoftwar

Re: IBM-MAIN Digest - 4 Mar 2012 to 5 Mar 2012 (#2012-65)

[Tom Marchant]

On Tue, 6 Mar 2012 20:39:02 +, Pate, Gene wrote:

>By PCFLIH backdoor I mean a routine whose address 
>replaced the address of the IBM supplied PCFLIH.

That would be a hook or an intercept.
"Backdoor" means something else entirely.

>The backdoor routine received control every time a 
>PC interrupt

ITYM a program interruption.

>occurred and, based on the reason for the PC 
>interrupt it either emulated the failing instruction 
>using available instructions and returned control to 
>the next sequential instruction or passed control to
>the IBM supplied PCFLIH routine for it to process 
>the PC interrupt. I believe that this is also what 
>the vendor routine being discussed did.

That is certainly not what the vendor routine being 
discussed is alleged to have done.  It is alleged to 
return to the program that was interrupted in supervisor 
state.  It is further alleged that it is relatively easy for 
any program to exploit this and to get put into 
supervisor state.

-- 
Tom Marchant

--
For IBM-MAIN subscribe / signoff / archive access instructions,
send email to lists...@bama.ua.edu with the message: INFO IBM-MAIN

Re: LAE instruction

[Bill Fairchild]

STAM ARx,ARx,FULLWORD
L  Ry,FULLWORD
will also copy the contents of Access Register x into General Purpose Register 
y.

I use GRx to mean the 64-bit Register x (aka "Grande") and Rx to mean the 
32-bit Register x (aka "pequeño").

Bill Fairchild

-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of 
McKown, John
Sent: Tuesday, March 06, 2012 2:23 PM
To: IBM-MAIN@bama.ua.edu
Subject: Re: LAE instruction

The displacement does play a part. It is added into the other values to get the 
resultant value in the register. The fact that +0 does not affect the resultant 
value is not, theoritically, relevant. If the displacement were other than 
zero, the effect on the result would be obvious.  So the displacement value of 
0 in the current instruction does not affect the resultant value in the results 
register. But that can't be generalized to say that the displacement "doesn't 
play a role".

BTW, if you want to load the contents of GPR3 with AR4, then you can use the 
EAR register. EAR R3,R4 will do it. If you want to copy the contents of AR4 
into AR3, you can do it if you have a "free" register with two instructions: 
EAR R?,R4; SAR R3,R? . Unlike LAE, this will work in any AR mode and any AMODE. 
I generally use R0 for this sort of thing due to its general uselessness for 
much of anything other than some parameter passing. 

I normally use register equates, so I use AR4 instead of R4. I also tend to use 
something like R1_32 or R1_64 instead of R1 and use HLASM's TYPECHECK(REGISTER) 
so that I get messages if I don't use the proper version of the equate with the 
specific instruction. I'm a bit OCD on that.

--
John McKown
Systems Engineer IV
IT

Administrative Services Group

HealthMarkets(r)

9151 Boulevard 26 * N. Richland Hills * TX 76010
(817) 255-3225 phone *
john.mck...@healthmarkets.com * www.HealthMarkets.com

Confidentiality Notice: This e-mail message may contain confidential or 
proprietary information. If you are not the intended recipient, please contact 
the sender by reply e-mail and destroy all copies of the original message. 
HealthMarkets(r) is the brand name for products underwritten and issued by the 
insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance 
Company(r), Mid-West National Life Insurance Company of TennesseeSM and The 
MEGA Life and Health Insurance Company.SM

 

> -Original Message-
> From: IBM Mainframe Discussion List
> [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of Micheal Butz
> Sent: Tuesday, March 06, 2012 1:59 PM
> To: IBM-MAIN@bama.ua.edu
> Subject: Re: LAE instruction
> 
> Thanks
>  
> Regarding my questions
> 
> The doc says the inst is dependent
> On address space control bits which is set by the SAC inst. 
> 
> Secondly seems like the displacement doesn't play a role in the inst
> 
> Sent from my iPhone
> 
> On Mar 6, 2012, at 2:49 PM, Rob Scott  
> wrote:
> 
> >> You have coded "LAE   R3,0(R4)" - which is the same as 
> "LAE   R3,(R4,R0)"
> > 
> > Should read :
> > 
> > You have coded "LAE   R3,0(R4)" - which is the same as "LAE 
>   R3,0(R4,R0)"
> > 
> > Rob Scott
> > Lead Developer
> > Rocket Software
> > 275 Grove Street * Newton, MA 02466-2272 * USA
> > Tel: +1.781.684.2305
> > Email: rsc...@rs.com
> > Web: www.rocketsoftware.com
> > 
> > 
> > -Original Message-
> > From: IBM Mainframe Discussion List
> [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of Rob Scott
> > Sent: 06 March 2012 19:47
> > To: IBM-MAIN@bama.ua.edu
> > Subject: Re: LAE instruction
> > 
> > Commas are *very* important in AR-mode
> > 
> > You have coded "LAE   R3,0(R4)" - which is the same as "LAE 
>   R3,(R4,R0)"
> > 
> > Coded that way there is no automatic way that AR3 is going
> to inherit the AR4 value.
> > 
> > You need : "LAE   R3,0(,R4)"
> > 
> > This will ensure that AR3 is populated from the AR for the
> referenced base register R4.
> > 
> > 
> > Rob Scott
> > Lead Developer
> > Rocket Software
> > 275 Grove Street * Newton, MA 02466-2272 * USA
> > Tel: +1.781.684.2305
> > Email: rsc...@rs.com
> > Web: www.rocketsoftware.com
> > 
> > 
> > -Original Message-
> > From: IBM Mainframe Discussion List
> [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of Micheal Butz
> > Sent: 06 March 2012 19:05
> > To: IBM-MAIN@bama.ua.edu
> > Subject: LAE instruction
> > 
> > Hi,
> > 
> > 
> > 
> > I have two part question regarding the LAE instruction
> > 
> > 
> > 
> > . What would the sac value e.g. 256,512,768 have to 
> be that when
> > using the LAE instructions with the following operands LAE
> 3,0(R4) would
> > AR3 get loaded with AR4
> > 
> > 
> > 
> > . Second what value does the displacement play in 
> the instruction
> > 
> > 
> > 
> > 
> > 
> > 
> > 
> > 
> > 
> > 
> > 
> > Thanks 
> > 
> > 
> > 
> --
> > For IBM-MAIN subscribe / signoff / archive access
> instructions, send email to lists...@

Re: Why _TZ put times 7 minutes off?

[Jon Butler]

Linux guests will get the time from the LPAR in which they run.  In most cases 
Linux guests running on the same CEC will have synchronized clocks unless some 
sort of clock synch event occurred in between IPLs of various LPARs on the same 
CEC.  You should consider NTP when Linux guests need to stay in synch across 
CECs.

--
For IBM-MAIN subscribe / signoff / archive access instructions,
send email to lists...@bama.ua.edu with the message: INFO IBM-MAIN

Re: LAE instruction

[Blaicher, Christopher Y.]

Yes, set the SAC bits first, otherwise the access register is set with zeros.

The other point that others are making is that when in access register mode, 
the instruction format is VERY important.

LAE  R3,(R4)  - loads the value from the location pointed to by R4 in the home 
address space into R3 and sets the AR3 register with 0, regardless of the SAC 
values at the time.

LAE  R3,0(0,R4)   - loads the value from the location pointed to by R4 in the 
address space indicated by access register AR4, if the SAC value is other than 
b'00', and loads AR3 with the SAC appropriate value.

Even if you never write access register sensitive code, it is far better to use 
the correct instruction format.  A) It gets you in the habit; and B) You never 
know when a piece of code may become access register sensitive.

Chris Blaicher
Senior Software Engineer, Software Services
Syncsort Incorporated
50 Tice Boulevard, Woodcliff Lake, NJ 07677
P: 201-930-8260  |  M: 512-627-3803    
E: cblaic...@syncsort.com

www.syncsort.com

Check out our Knowledge Base at www.syncsort.com/support

Syncsort aims for the best product and service experience. 
We welcome your feedback.


-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of 
Micheal Butz
Sent: Tuesday, March 06, 2012 3:07 PM
To: MVS List Server 1
Subject: Re: LAE instruction

Sorry misspelled the name John McKown. Excuse me

Sent from my iPhone

On Mar 6, 2012, at 4:00 PM, Micheal Butz  wrote:

> John Mckiwns reply was a explanation of the SAC inst.Which I am aware of
> 
> The Doc for LAE says the inst the functionality is dependent on PSW bits
> 
> 16 17 address space control bits these are set by the SAC inst
> 
> 
> So my original question remains does
> 
> Should address space control buts be set via the sac before executing the LAE 
> 
> 
> Sent from my iPhone
> 
> On Mar 6, 2012, at 3:37 PM, Rob Scott  wrote:
> 
>> John McKown's reply covered these points very well
>> 
>> Rob Scott
>> Lead Developer
>> Rocket Software
>> 275 Grove Street * Newton, MA 02466-2272 * USA
>> Tel: +1.781.684.2305
>> Email: rsc...@rs.com
>> Web: www.rocketsoftware.com
>> 
>> 
>> -Original Message-
>> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf 
>> Of Micheal Butz
>> Sent: 06 March 2012 19:59
>> To: IBM-MAIN@bama.ua.edu
>> Subject: Re: LAE instruction
>> 
>> Thanks
>> 
>> Regarding my questions
>> 
>> The doc says the inst is dependent
>> On address space control bits which is set by the SAC inst. 
>> 
>> Secondly seems like the displacement doesn't play a role in the inst
>> 
>> Sent from my iPhone
>> 
>> On Mar 6, 2012, at 2:49 PM, Rob Scott  wrote:
>> 
 You have coded "LAE   R3,0(R4)" - which is the same as "LAE   R3,(R4,R0)"
>>> 
>>> Should read :
>>> 
>>> You have coded "LAE   R3,0(R4)" - which is the same as "LAE   R3,0(R4,R0)"
>>> 
>>> Rob Scott
>>> Lead Developer
>>> Rocket Software
>>> 275 Grove Street * Newton, MA 02466-2272 * USA
>>> Tel: +1.781.684.2305
>>> Email: rsc...@rs.com
>>> Web: www.rocketsoftware.com
>>> 
>>> 
>>> -Original Message-
>>> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On 
>>> Behalf Of Rob Scott
>>> Sent: 06 March 2012 19:47
>>> To: IBM-MAIN@bama.ua.edu
>>> Subject: Re: LAE instruction
>>> 
>>> Commas are *very* important in AR-mode
>>> 
>>> You have coded "LAE   R3,0(R4)" - which is the same as "LAE   R3,(R4,R0)"
>>> 
>>> Coded that way there is no automatic way that AR3 is going to inherit the 
>>> AR4 value.
>>> 
>>> You need : "LAE   R3,0(,R4)"
>>> 
>>> This will ensure that AR3 is populated from the AR for the referenced base 
>>> register R4.
>>> 
>>> 
>>> Rob Scott
>>> Lead Developer
>>> Rocket Software
>>> 275 Grove Street * Newton, MA 02466-2272 * USA
>>> Tel: +1.781.684.2305
>>> Email: rsc...@rs.com
>>> Web: www.rocketsoftware.com
>>> 
>>> 
>>> -Original Message-
>>> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On 
>>> Behalf Of Micheal Butz
>>> Sent: 06 March 2012 19:05
>>> To: IBM-MAIN@bama.ua.edu
>>> Subject: LAE instruction
>>> 
>>> Hi,
>>> 
>>> 
>>> 
>>> I have two part question regarding the LAE instruction
>>> 
>>> 
>>> 
>>> . What would the sac value e.g. 256,512,768 have to be that when
>>> using the LAE instructions with the following operands LAE  3,0(R4) 
>>> would
>>> AR3 get loaded with AR4
>>> 
>>> 
>>> 
>>> . Second what value does the displacement play in the instruction
>>> 
>>> 
>>> 
>>> 
>>> 
>>> 
>>> 
>>> 
>>> 
>>> 
>>> 
>>>   Thanks 
>>> 
>>> 
>>> --
>>> For IBM-MAIN subscribe / signoff / archive access instructions, send 
>>> email to lists...@bama.ua.edu with the message: INFO IBM-MAIN
>>> 
>>> --
>>> For IBM-MAIN subscribe / signoff / archive access instructions, send 
>>> email to lists...@bama.ua.edu

Re: LAE instruction

[McKown, John]

Yes, from the LAE instruction text:


The address specified by the X2, B2, and D2 fields is
placed in general register R1. Access register R1 is
loaded with a value that depends on the current
value of the address-space-control bits, bits 16 and
17 of the PSW. If the address-space-control bits are
01 binary, the value placed in the access register
also depends on whether the B2 field is zero or non-
zero.

...

PSW Bits
16 and 17
Value Placed in Access Register R1
00  hex (zeros in bit positions 0-31)

10 0001 hex (zeros in bit positions 0-30
and one in bit position 31)

01 If B2 field is zero:  hex (zeros in
bit positions 0-31)
If B2 field is nonzero: Contents of access
register B2

11 0002 hex (zeros in bit positions 0-29
and 31, and one in bit position 30)

>From the SAC instruction 

CodeName of ModeResult in PSW Bits 16 & 17
Primary space   00
0001Secondary space 10
0010Access register 01
0011Home space  11
All others Invalid



SAC 512 has is '0010' from the above and results in b'01' or AR mode in the PSW 
bits 16 & 17. Which is what is required for the LAE instruction to set the 
access register of the result access register from the base access register 
(when not b'').



John McKown 

Systems Engineer IV

IT

 

Administrative Services Group

 

HealthMarkets(r)

 

9151 Boulevard 26 * N. Richland Hills * TX 76010

(817) 255-3225 phone * 

john.mck...@healthmarkets.com * www.HealthMarkets.com

 

Confidentiality Notice: This e-mail message may contain confidential or 
proprietary information. If you are not the intended recipient, please contact 
the sender by reply e-mail and destroy all copies of the original message. 
HealthMarkets(r) is the brand name for products underwritten and issued by the 
insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance 
Company(r), Mid-West National Life Insurance Company of TennesseeSM and The 
MEGA Life and Health Insurance Company.SM

 

> -Original Message-
> From: IBM Mainframe Discussion List 
> [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of Micheal Butz
> Sent: Tuesday, March 06, 2012 3:00 PM
> To: IBM-MAIN@bama.ua.edu
> Subject: Re: LAE instruction
> 
> John Mckiwns reply was a explanation of the SAC inst.
> Which I am aware of
> 
> The Doc for LAE says the inst the functionality is dependent 
> on PSW bits
> 
> 16 17 address space control bits these are set by the SAC inst
> 
> 
> So my original question remains does
> 
> Should address space control buts be set via the sac before 
> executing the LAE 
> 
> 
> Sent from my iPhone
> 
> On Mar 6, 2012, at 3:37 PM, Rob Scott 
>  wrote:
> 
> > John McKown's reply covered these points very well
> > 
> > Rob Scott
> > Lead Developer
> > Rocket Software
> > 275 Grove Street * Newton, MA 02466-2272 * USA
> > Tel: +1.781.684.2305
> > Email: rsc...@rs.com
> > Web: www.rocketsoftware.com
> > 
> > 
> > -Original Message-
> > From: IBM Mainframe Discussion List 
> [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of Micheal Butz
> > Sent: 06 March 2012 19:59
> > To: IBM-MAIN@bama.ua.edu
> > Subject: Re: LAE instruction
> > 
> > Thanks
> > 
> > Regarding my questions
> > 
> > The doc says the inst is dependent
> > On address space control bits which is set by the SAC inst. 
> > 
> > Secondly seems like the displacement doesn't play a role in the inst
> > 
> > Sent from my iPhone
> > 
> > On Mar 6, 2012, at 2:49 PM, Rob Scott 
>  wrote:
> > 
> >>> You have coded "LAE   R3,0(R4)" - which is the same as 
> "LAE   R3,(R4,R0)"
> >> 
> >> Should read :
> >> 
> >> You have coded "LAE   R3,0(R4)" - which is the same as 
> "LAE   R3,0(R4,R0)"
> >> 
> >> Rob Scott
> >> Lead Developer
> >> Rocket Software
> >> 275 Grove Street * Newton, MA 02466-2272 * USA
> >> Tel: +1.781.684.2305
> >> Email: rsc...@rs.com
> >> Web: www.rocketsoftware.com
> >> 
> >> 
> >> -Original Message-
> >> From: IBM Mainframe Discussion List 
> [mailto:IBM-MAIN@bama.ua.edu] On 
> >> Behalf Of Rob Scott
> >> Sent: 06 March 2012 19:47
> >> To: IBM-MAIN@bama.ua.edu
> >> Subject: Re: LAE instruction
> >> 
> >> Commas are *very* important in AR-mode
> >> 
> >> You have coded "LAE   R3,0(R4)" - which is the same as 
> "LAE   R3,(R4,R0)"
> >> 
> >> Coded that way there is no automatic way that AR3 is going 
> to inherit the AR4 value.
> >> 
> >> You need : "LAE   R3,0(,R4)"
> >> 
> >> This will ensure that AR3 is populated from the AR for the 
> referenced base register R4.
> >> 
> >> 
> >> Rob Scott
> >> Lead Developer
> >> Rocket Software
> >> 275 Grove Street * Newton, MA 02466-2272 * USA
> >> Tel: +1.781.684.2305
> >> Email: rsc...@rs.com
> >> Web: www.rocketsoftware.com
> >> 
> >> 
> >> -Original Message-
> >> From: IBM Mainframe Discussion List 
> [mailto:IBM-MAIN@bama.ua.edu] On 
> >> Behalf Of Micheal Butz
> >> Sent: 06 March 2012 19:05
> >> To: IBM-MAIN@bama.ua.edu
> >> Subject: LAE instruction
> >> 
> >> Hi,
> >> 
> 

Re: FICON channel ulitization

[Mike Schwab]

No.  You are dealing with one device and no intermediate device to
buffer the transmission rates.  Transmission rate is negotiated to the
fastest rate that both ends support.

Both ends are transmitting at that same rate, and are busy for the
same amount of time.

In contrast, say you were downloading over the internet through
several devices.  The source could send the file at full speed, but is
buffered by a device in the middle.  It is relaying the data at a
slower rate over a slower link to you.

On Tue, Mar 6, 2012 at 3:12 PM, R.S.  wrote:
> W dniu 2012-03-06 21:33, Mike Schwab pisze: > If the receiving switch is 4G,
> that is the maximum transmission rate > from the 8G channel. > It was busy
> 100% at 4G. I think I understand it now. So, chpid connected to 8G sfp on
> the  switch, then to 4G CU would show 50% utilization? Radoslaw Skorupka
> Lodz, Poland
-- 
Mike A Schwab, Springfield IL USA
Where do Forest Rangers go to get away from it all?

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Re: LAE instruction

[Tony Harminc]

On 6 March 2012 16:00, Micheal Butz  wrote:

> The Doc for LAE says the inst the functionality is dependent on PSW bits 16 
> 17 address space control bits these are set by the SAC inst
>
> So my original question remains does
>
> Should address space control buts be set via the sac before executing the LAE

It depends on what you are trying to accomplish, and you really
haven't said much about that.

The LAE instruction is designed so as to set the target general and
access registers to values that meet the reasonable expectations for
the translation mode you are executing with. If you subsequently
continue in or change to AR mode, the target registers will have been
be set so as to address the same data as the source of the LAE
instruction, had it been a storage referencing instruction such as
load (L). If you continue in or change to something other than AR
mode, the access register will play no part in data addressing, but
the general register will have been loaded appropriately regardless.

Tony H.

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Re: LAE instruction

[Jim Thomas]

Micheal, 

Only if you also want the corresponding Access Register to be loaded. 

Kind Regards.

Jim Thomas

-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf
Of Micheal Butz
Sent: Tuesday, March 06, 2012 3:00 PM
To: IBM-MAIN@bama.ua.edu
Subject: Re: LAE instruction

John Mckiwns reply was a explanation of the SAC inst.Which I am aware of

The Doc for LAE says the inst the functionality is dependent on PSW bits

16 17 address space control bits these are set by the SAC inst


So my original question remains does

Should address space control buts be set via the sac before executing the
LAE 


Sent from my iPhone

On Mar 6, 2012, at 3:37 PM, Rob Scott  wrote:

> John McKown's reply covered these points very well
> 
> Rob Scott
> Lead Developer
> Rocket Software
> 275 Grove Street * Newton, MA 02466-2272 * USA
> Tel: +1.781.684.2305
> Email: rsc...@rs.com
> Web: www.rocketsoftware.com
> 
> 
> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On 
> Behalf Of Micheal Butz
> Sent: 06 March 2012 19:59
> To: IBM-MAIN@bama.ua.edu
> Subject: Re: LAE instruction
> 
> Thanks
> 
> Regarding my questions
> 
> The doc says the inst is dependent
> On address space control bits which is set by the SAC inst. 
> 
> Secondly seems like the displacement doesn't play a role in the inst
> 
> Sent from my iPhone
> 
> On Mar 6, 2012, at 2:49 PM, Rob Scott  wrote:
> 
>>> You have coded "LAE   R3,0(R4)" - which is the same as "LAE
R3,(R4,R0)"
>> 
>> Should read :
>> 
>> You have coded "LAE   R3,0(R4)" - which is the same as "LAE
R3,0(R4,R0)"
>> 
>> Rob Scott
>> Lead Developer
>> Rocket Software
>> 275 Grove Street * Newton, MA 02466-2272 * USA
>> Tel: +1.781.684.2305
>> Email: rsc...@rs.com
>> Web: www.rocketsoftware.com
>> 
>> 
>> -Original Message-
>> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On 
>> Behalf Of Rob Scott
>> Sent: 06 March 2012 19:47
>> To: IBM-MAIN@bama.ua.edu
>> Subject: Re: LAE instruction
>> 
>> Commas are *very* important in AR-mode
>> 
>> You have coded "LAE   R3,0(R4)" - which is the same as "LAE   R3,(R4,R0)"
>> 
>> Coded that way there is no automatic way that AR3 is going to inherit the
AR4 value.
>> 
>> You need : "LAE   R3,0(,R4)"
>> 
>> This will ensure that AR3 is populated from the AR for the referenced
base register R4.
>> 
>> 
>> Rob Scott
>> Lead Developer
>> Rocket Software
>> 275 Grove Street * Newton, MA 02466-2272 * USA
>> Tel: +1.781.684.2305
>> Email: rsc...@rs.com
>> Web: www.rocketsoftware.com
>> 
>> 
>> -Original Message-
>> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On 
>> Behalf Of Micheal Butz
>> Sent: 06 March 2012 19:05
>> To: IBM-MAIN@bama.ua.edu
>> Subject: LAE instruction
>> 
>> Hi,
>> 
>> 
>> 
>> I have two part question regarding the LAE instruction
>> 
>> 
>> 
>> . What would the sac value e.g. 256,512,768 have to be that when
>> using the LAE instructions with the following operands LAE  3,0(R4) 
>> would
>> AR3 get loaded with AR4
>> 
>> 
>> 
>> . Second what value does the displacement play in the instruction
>> 
>> 
>> 
>> 
>> 
>> 
>> 
>> 
>> 
>> 
>> 
>>Thanks 
>> 
>> 
>> -
>> - For IBM-MAIN subscribe / signoff / archive access instructions, 
>> send email to lists...@bama.ua.edu with the message: INFO IBM-MAIN
>> 
>> -
>> - For IBM-MAIN subscribe / signoff / archive access instructions, 
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-
No virus found in this message.
Checked by AVG - www.avg.com
Version: 2012.0.1913 / Virus Database: 2114/4853 - Release Date: 03/05/12

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Re: IBM Announcement Letters

[Linda Mooney]

OOPS!!  These are NOT blank in my sent mail folder.  Guess you'll have to trust 
me on that! 


Linda 


- Original Message -


From: "Linda Mooney"  
To: IBM-MAIN@bama.ua.edu 
Sent: Tuesday, March 6, 2012 12:50:30 PM 
Subject: Re: IBM Announcement Letters 

Hi Bob, 



What kind of A nnouncements?  Depending on that, I have seen it happen on rare 
occasion, that there just weren't any of the  particular kind.  There were lots 
of entires in my Notifications this morning. 



This morning, I got just this for content in Announcements  - 



 Hardware 





  



* 

 

IBM zEnterprise and Unified Resource Manager enhancements 





  



* 

 

IBM System x3500 M4 tower servers feature fast 4C, 6C, and 8C Intel Xeon 
processors with QPI and 10 MB, 15 MB, or 20 MB cache for enhanced performance 
and scalability 





  



* 

 

New IBM System x 2.5-inch and 3.5-inch SATA and SAS drives offer highest 
performance options for optimizing storage and data management with 
effectiveness for IBM System x 





  



 Summary of all IBM announcements for today 





  



* 

 

Announcement Summary - March 6, 2012 

  

HTH, 



Linda 

- Original Message - 


From: "Bob Shannon"  
To: IBM-MAIN@bama.ua.edu 
Sent: Tuesday, March 6, 2012 4:56:50 AM 
Subject: Re: IBM Announcement Letters 

I received an announcement letter this morning, but it was almost content free. 

Bob Shannon 
Rocket Software 

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Re: FICON channel ulitization

[R.S.]

W dniu 2012-03-06 21:33, Mike Schwab pisze:

If the receiving switch is 4G, that is the maximum transmission rate
from the 8G channel.
It was busy 100% at 4G.


I think I understand it now. So, chpid connected to 8G sfp on the 
switch, then to 4G CU would show 50% utilization?



--
Radoslaw Skorupka
Lodz, Poland


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Re: LAE instruction

[Micheal Butz]

Sorry misspelled the name John McKown. Excuse me

Sent from my iPhone

On Mar 6, 2012, at 4:00 PM, Micheal Butz  wrote:

> John Mckiwns reply was a explanation of the SAC inst.Which I am aware of
> 
> The Doc for LAE says the inst the functionality is dependent on PSW bits
> 
> 16 17 address space control bits these are set by the SAC inst
> 
> 
> So my original question remains does
> 
> Should address space control buts be set via the sac before executing the LAE 
> 
> 
> Sent from my iPhone
> 
> On Mar 6, 2012, at 3:37 PM, Rob Scott  wrote:
> 
>> John McKown's reply covered these points very well
>> 
>> Rob Scott
>> Lead Developer
>> Rocket Software
>> 275 Grove Street * Newton, MA 02466-2272 * USA
>> Tel: +1.781.684.2305
>> Email: rsc...@rs.com
>> Web: www.rocketsoftware.com
>> 
>> 
>> -Original Message-
>> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf 
>> Of Micheal Butz
>> Sent: 06 March 2012 19:59
>> To: IBM-MAIN@bama.ua.edu
>> Subject: Re: LAE instruction
>> 
>> Thanks
>> 
>> Regarding my questions
>> 
>> The doc says the inst is dependent
>> On address space control bits which is set by the SAC inst. 
>> 
>> Secondly seems like the displacement doesn't play a role in the inst
>> 
>> Sent from my iPhone
>> 
>> On Mar 6, 2012, at 2:49 PM, Rob Scott  wrote:
>> 
 You have coded "LAE   R3,0(R4)" - which is the same as "LAE   R3,(R4,R0)"
>>> 
>>> Should read :
>>> 
>>> You have coded "LAE   R3,0(R4)" - which is the same as "LAE   R3,0(R4,R0)"
>>> 
>>> Rob Scott
>>> Lead Developer
>>> Rocket Software
>>> 275 Grove Street * Newton, MA 02466-2272 * USA
>>> Tel: +1.781.684.2305
>>> Email: rsc...@rs.com
>>> Web: www.rocketsoftware.com
>>> 
>>> 
>>> -Original Message-
>>> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On 
>>> Behalf Of Rob Scott
>>> Sent: 06 March 2012 19:47
>>> To: IBM-MAIN@bama.ua.edu
>>> Subject: Re: LAE instruction
>>> 
>>> Commas are *very* important in AR-mode
>>> 
>>> You have coded "LAE   R3,0(R4)" - which is the same as "LAE   R3,(R4,R0)"
>>> 
>>> Coded that way there is no automatic way that AR3 is going to inherit the 
>>> AR4 value.
>>> 
>>> You need : "LAE   R3,0(,R4)"
>>> 
>>> This will ensure that AR3 is populated from the AR for the referenced base 
>>> register R4.
>>> 
>>> 
>>> Rob Scott
>>> Lead Developer
>>> Rocket Software
>>> 275 Grove Street * Newton, MA 02466-2272 * USA
>>> Tel: +1.781.684.2305
>>> Email: rsc...@rs.com
>>> Web: www.rocketsoftware.com
>>> 
>>> 
>>> -Original Message-
>>> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On 
>>> Behalf Of Micheal Butz
>>> Sent: 06 March 2012 19:05
>>> To: IBM-MAIN@bama.ua.edu
>>> Subject: LAE instruction
>>> 
>>> Hi,
>>> 
>>> 
>>> 
>>> I have two part question regarding the LAE instruction
>>> 
>>> 
>>> 
>>> . What would the sac value e.g. 256,512,768 have to be that when
>>> using the LAE instructions with the following operands LAE  3,0(R4) 
>>> would
>>> AR3 get loaded with AR4
>>> 
>>> 
>>> 
>>> . Second what value does the displacement play in the instruction
>>> 
>>> 
>>> 
>>> 
>>> 
>>> 
>>> 
>>> 
>>> 
>>> 
>>> 
>>>   Thanks 
>>> 
>>> 
>>> --
>>> For IBM-MAIN subscribe / signoff / archive access instructions, send 
>>> email to lists...@bama.ua.edu with the message: INFO IBM-MAIN
>>> 
>>> --
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>>> 
>>> --
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>>> email to lists...@bama.ua.edu with the message: INFO IBM-MAIN
>> 
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Re: LAE instruction

[Micheal Butz]

John Mckiwns reply was a explanation of the SAC inst.Which I am aware of

The Doc for LAE says the inst the functionality is dependent on PSW bits

16 17 address space control bits these are set by the SAC inst


So my original question remains does

Should address space control buts be set via the sac before executing the LAE 


Sent from my iPhone

On Mar 6, 2012, at 3:37 PM, Rob Scott  wrote:

> John McKown's reply covered these points very well
> 
> Rob Scott
> Lead Developer
> Rocket Software
> 275 Grove Street * Newton, MA 02466-2272 * USA
> Tel: +1.781.684.2305
> Email: rsc...@rs.com
> Web: www.rocketsoftware.com
> 
> 
> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf 
> Of Micheal Butz
> Sent: 06 March 2012 19:59
> To: IBM-MAIN@bama.ua.edu
> Subject: Re: LAE instruction
> 
> Thanks
> 
> Regarding my questions
> 
> The doc says the inst is dependent
> On address space control bits which is set by the SAC inst. 
> 
> Secondly seems like the displacement doesn't play a role in the inst
> 
> Sent from my iPhone
> 
> On Mar 6, 2012, at 2:49 PM, Rob Scott  wrote:
> 
>>> You have coded "LAE   R3,0(R4)" - which is the same as "LAE   R3,(R4,R0)"
>> 
>> Should read :
>> 
>> You have coded "LAE   R3,0(R4)" - which is the same as "LAE   R3,0(R4,R0)"
>> 
>> Rob Scott
>> Lead Developer
>> Rocket Software
>> 275 Grove Street * Newton, MA 02466-2272 * USA
>> Tel: +1.781.684.2305
>> Email: rsc...@rs.com
>> Web: www.rocketsoftware.com
>> 
>> 
>> -Original Message-
>> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On 
>> Behalf Of Rob Scott
>> Sent: 06 March 2012 19:47
>> To: IBM-MAIN@bama.ua.edu
>> Subject: Re: LAE instruction
>> 
>> Commas are *very* important in AR-mode
>> 
>> You have coded "LAE   R3,0(R4)" - which is the same as "LAE   R3,(R4,R0)"
>> 
>> Coded that way there is no automatic way that AR3 is going to inherit the 
>> AR4 value.
>> 
>> You need : "LAE   R3,0(,R4)"
>> 
>> This will ensure that AR3 is populated from the AR for the referenced base 
>> register R4.
>> 
>> 
>> Rob Scott
>> Lead Developer
>> Rocket Software
>> 275 Grove Street * Newton, MA 02466-2272 * USA
>> Tel: +1.781.684.2305
>> Email: rsc...@rs.com
>> Web: www.rocketsoftware.com
>> 
>> 
>> -Original Message-
>> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On 
>> Behalf Of Micheal Butz
>> Sent: 06 March 2012 19:05
>> To: IBM-MAIN@bama.ua.edu
>> Subject: LAE instruction
>> 
>> Hi,
>> 
>> 
>> 
>> I have two part question regarding the LAE instruction
>> 
>> 
>> 
>> . What would the sac value e.g. 256,512,768 have to be that when
>> using the LAE instructions with the following operands LAE  3,0(R4) 
>> would
>> AR3 get loaded with AR4
>> 
>> 
>> 
>> . Second what value does the displacement play in the instruction
>> 
>> 
>> 
>> 
>> 
>> 
>> 
>> 
>> 
>> 
>> 
>>Thanks 
>> 
>> 
>> --
>> For IBM-MAIN subscribe / signoff / archive access instructions, send 
>> email to lists...@bama.ua.edu with the message: INFO IBM-MAIN
>> 
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> 
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Re: IBM Announcement Letters

[Linda Mooney]

Hi Bob, 



What kind of A nnouncements?  Depending on that, I have seen it happen on rare 
occasion, that there just weren't any of the  particular kind.  There were lots 
of entires in my Notifications this morning. 



This morning, I got just this for content in Announcements  - 



 Hardware 





  



*



IBM zEnterprise and Unified Resource Manager enhancements 





  



*



IBM System x3500 M4 tower servers feature fast 4C, 6C, and 8C Intel Xeon 
processors with QPI and 10 MB, 15 MB, or 20 MB cache for enhanced performance 
and scalability 





  



*



New IBM System x 2.5-inch and 3.5-inch SATA and SAS drives offer highest 
performance options for optimizing storage and data management with 
effectiveness for IBM System x 





  



 Summary of all IBM announcements for today 





  



*



Announcement Summary - March 6, 2012 

  

HTH, 



Linda 

- Original Message -


From: "Bob Shannon"  
To: IBM-MAIN@bama.ua.edu 
Sent: Tuesday, March 6, 2012 4:56:50 AM 
Subject: Re: IBM Announcement Letters 

I received an announcement letter this morning, but it was almost content free. 

Bob Shannon 
Rocket Software 

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Re: LAE instruction

[McKown, John]

I thought there was one to do that, but just couldn't spot it. Thanks.

--
John McKown 
Systems Engineer IV
IT

Administrative Services Group

HealthMarkets(r)

9151 Boulevard 26 * N. Richland Hills * TX 76010
(817) 255-3225 phone * 
john.mck...@healthmarkets.com * www.HealthMarkets.com

Confidentiality Notice: This e-mail message may contain confidential or 
proprietary information. If you are not the intended recipient, please contact 
the sender by reply e-mail and destroy all copies of the original message. 
HealthMarkets(r) is the brand name for products underwritten and issued by the 
insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance 
Company(r), Mid-West National Life Insurance Company of TennesseeSM and The 
MEGA Life and Health Insurance Company.SM

 

> -Original Message-
> From: IBM Mainframe Discussion List 
> [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of Gainsford, Allen
> Sent: Tuesday, March 06, 2012 2:28 PM
> To: IBM-MAIN@bama.ua.edu
> Subject: Re: LAE instruction
> 
> John McKown wrote:
> 
> > If you want to copy the contents of AR4 into AR3, you can 
> do it if you have a "free" register with two instructions: 
> EAR R?,R4; SAR R3,R? .
> 
> Or you could just use CPYA AR3,AR4.  No "free" register required.
> 
> Regards,
> 
> Allen Gainsford
> Info Developer, Banking Shared Services
> HP Enterprise Services (South Pacific)
> Office +64-4-819-5236  |  Fax +64-4-819-5955  |  Email 
> allen.gainsf...@hp.com
> 
> --
> For IBM-MAIN subscribe / signoff / archive access instructions,
> send email to lists...@bama.ua.edu with the message: INFO IBM-MAIN
> 
> 

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Re: Customer Service, the good and the bad...

[Mike Schwab]

Abbreviate F*** THIS or F***DISK to FDISK to clear up the installed
but uninstallable crapware they give you.  Even the uninstalled stuff
usually makes your machine run slow, so start fresh.  Usually used
right out of the box.  And if it runs with the windows stuff, the add
on stuff probably does not work as well.

And why was your BIOS and other software not patched with all latest fixes?

On Tue, Mar 6, 2012 at 1:55 PM, Dale Miller  wrote:
> When my wife's windoze machine neared end-of-life, we bought her a new HP
> laptop. I had to spend a lot of time fixing problems my wife encountered
> because of HP's tactic of pasting HP-specific crud on top of windoze, but
> eventually, we got things working in an understandable way. But then ...  On
> the day after the warranty expired, the internet connection through my
> wireless router would not come up. I pursued all the help pages and Google
> and eventually discovered that the light (on the F12 key) signifying power
> status to the wireless adapter was amber rather than blue. HP FAQ's and
> Google hits indicated that I should just press the F12 key, but to no avail.
> When I contacted HP, I was told that I would have to pay for support on a
> time-used basis or get a contract for $59. I paid the $59 and was connected
> to a lady for whom English was a second language. She knew immediately what
> the problem was and instructed me to delete and rebuild one of the programs
> that was part of the afore-mentioned overlay of HP crud, and then to
> download an updated BIOS from HP's site.
> What really bothers me about this is:
> 1) The problem's emergence on the first day of non-warranty status.
> 2) The fact that the problem is obviously with HP software (or perhaps
> manufacturing processes related to software).
> 3) The fact that support knew all about the problem, but it was not in the
> FAQ's, or at least not recognizable by the symptoms I experienced.
> 4) That I had to pay to discover HP's defect.
>
> Dale Miller

-- 
Mike A Schwab, Springfield IL USA
Where do Forest Rangers go to get away from it all?

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Re: IBM-MAIN Digest - 4 Mar 2012 to 5 Mar 2012 (#2012-65)

[Pate, Gene]

on 03/05/2012 at 20:54:38, "Shmuel Metz (Seymour J.)" 
 said:

> What do you mean by backdoor? I don't believe that it is what others
were referring to.

By PCFLIH backdoor I mean a routine whose address replaced the address of the 
IBM supplied PCFLIH. The backdoor routine received control every time a PC 
interrupt occurred and, based on the reason for the PC interrupt it either 
emulated the failing instruction using available instructions and returned 
control to the next sequential instruction or passed control to the IBM 
supplied PCFLIH routine for it to process the PC interrupt. I believe that this 
is also what the vendor routine being discussed did. 

As I said, the PCFLIH backdoor is just a technique and if it is not the 
appropriate technique to use then the vendor should be beat about the head and 
shoulders and made to use whatever technique is appropriate for what their 
product needs to accomplish. 

Gene Pate
CSX Technology
Enterprise Architecture



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Re: LAE instruction

[Rob Scott]

John McKown's reply covered these points very well

Rob Scott
Lead Developer
Rocket Software
275 Grove Street * Newton, MA 02466-2272 * USA
Tel: +1.781.684.2305
Email: rsc...@rs.com
Web: www.rocketsoftware.com


-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of 
Micheal Butz
Sent: 06 March 2012 19:59
To: IBM-MAIN@bama.ua.edu
Subject: Re: LAE instruction

Thanks
 
Regarding my questions

The doc says the inst is dependent
On address space control bits which is set by the SAC inst. 

Secondly seems like the displacement doesn't play a role in the inst

Sent from my iPhone

On Mar 6, 2012, at 2:49 PM, Rob Scott  wrote:

>> You have coded "LAE   R3,0(R4)" - which is the same as "LAE   R3,(R4,R0)"
> 
> Should read :
> 
> You have coded "LAE   R3,0(R4)" - which is the same as "LAE   R3,0(R4,R0)"
> 
> Rob Scott
> Lead Developer
> Rocket Software
> 275 Grove Street * Newton, MA 02466-2272 * USA
> Tel: +1.781.684.2305
> Email: rsc...@rs.com
> Web: www.rocketsoftware.com
> 
> 
> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On 
> Behalf Of Rob Scott
> Sent: 06 March 2012 19:47
> To: IBM-MAIN@bama.ua.edu
> Subject: Re: LAE instruction
> 
> Commas are *very* important in AR-mode
> 
> You have coded "LAE   R3,0(R4)" - which is the same as "LAE   R3,(R4,R0)"
> 
> Coded that way there is no automatic way that AR3 is going to inherit the AR4 
> value.
> 
> You need : "LAE   R3,0(,R4)"
> 
> This will ensure that AR3 is populated from the AR for the referenced base 
> register R4.
> 
> 
> Rob Scott
> Lead Developer
> Rocket Software
> 275 Grove Street * Newton, MA 02466-2272 * USA
> Tel: +1.781.684.2305
> Email: rsc...@rs.com
> Web: www.rocketsoftware.com
> 
> 
> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On 
> Behalf Of Micheal Butz
> Sent: 06 March 2012 19:05
> To: IBM-MAIN@bama.ua.edu
> Subject: LAE instruction
> 
> Hi,
> 
> 
> 
> I have two part question regarding the LAE instruction
> 
> 
> 
> . What would the sac value e.g. 256,512,768 have to be that when
> using the LAE instructions with the following operands LAE  3,0(R4) 
> would
> AR3 get loaded with AR4
> 
> 
> 
> . Second what value does the displacement play in the instruction
> 
> 
> 
> 
> 
> 
> 
> 
> 
> 
> 
> Thanks 
> 
> 
> --
> For IBM-MAIN subscribe / signoff / archive access instructions, send 
> email to lists...@bama.ua.edu with the message: INFO IBM-MAIN
> 
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Re: FICON channel ulitization

[Mike Schwab]

If the receiving switch is 4G, that is the maximum transmission rate
from the 8G channel.
It was busy 100% at 4G.

On Tue, Mar 6, 2012 at 1:29 PM, R.S.  wrote:
> The following scenario:
> z196 with FICON Express8S interfaces. Single (only one) channel attached to
> EMC DMX3 CU via 4Gbps switch.
> Some test jobs submitted (ADRDSSU).
> During the test 100% channel utilization was observed.
>
> Q: How it's possible? Neither switch, nor CU would allow more than 50% of
> bandwidth utilisation, since both are 4Gbps rated.
>
> --
> Radoslaw Skorupka
> Lodz, Poland

-- 
Mike A Schwab, Springfield IL USA
Where do Forest Rangers go to get away from it all?

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Re: LAE instruction

[Gainsford, Allen]

John McKown wrote:

> If you want to copy the contents of AR4 into AR3, you can do it if you have a 
> "free" register with two instructions: EAR R?,R4; SAR R3,R? .

Or you could just use CPYA AR3,AR4.  No "free" register required.

Regards,

Allen Gainsford
Info Developer, Banking Shared Services
HP Enterprise Services (South Pacific)
Office +64-4-819-5236  |  Fax +64-4-819-5955  |  Email allen.gainsf...@hp.com

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Re: LAE instruction

[McKown, John]

The displacement does play a part. It is added into the other values to get the 
resultant value in the register. The fact that +0 does not affect the resultant 
value is not, theoritically, relevant. If the displacement were other than 
zero, the effect on the result would be obvious.  So the displacement value of 
0 in the current instruction does not affect the resultant value in the results 
register. But that can't be generalized to say that the displacement "doesn't 
play a role".

BTW, if you want to load the contents of GPR3 with AR4, then you can use the 
EAR register. EAR R3,R4 will do it. If you want to copy the contents of AR4 
into AR3, you can do it if you have a "free" register with two instructions: 
EAR R?,R4; SAR R3,R? . Unlike LAE, this will work in any AR mode and any AMODE. 
I generally use R0 for this sort of thing due to its general uselessness for 
much of anything other than some parameter passing. 

I normally use register equates, so I use AR4 instead of R4. I also tend to use 
something like R1_32 or R1_64 instead of R1 and use HLASM's TYPECHECK(REGISTER) 
so that I get messages if I don't use the proper version of the equate with the 
specific instruction. I'm a bit OCD on that.

--
John McKown 
Systems Engineer IV
IT

Administrative Services Group

HealthMarkets(r)

9151 Boulevard 26 * N. Richland Hills * TX 76010
(817) 255-3225 phone * 
john.mck...@healthmarkets.com * www.HealthMarkets.com

Confidentiality Notice: This e-mail message may contain confidential or 
proprietary information. If you are not the intended recipient, please contact 
the sender by reply e-mail and destroy all copies of the original message. 
HealthMarkets(r) is the brand name for products underwritten and issued by the 
insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance 
Company(r), Mid-West National Life Insurance Company of TennesseeSM and The 
MEGA Life and Health Insurance Company.SM

 

> -Original Message-
> From: IBM Mainframe Discussion List 
> [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of Micheal Butz
> Sent: Tuesday, March 06, 2012 1:59 PM
> To: IBM-MAIN@bama.ua.edu
> Subject: Re: LAE instruction
> 
> Thanks
>  
> Regarding my questions
> 
> The doc says the inst is dependent
> On address space control bits which is set by the SAC inst. 
> 
> Secondly seems like the displacement doesn't play a role in the inst
> 
> Sent from my iPhone
> 
> On Mar 6, 2012, at 2:49 PM, Rob Scott 
>  wrote:
> 
> >> You have coded "LAE   R3,0(R4)" - which is the same as 
> "LAE   R3,(R4,R0)"
> > 
> > Should read :
> > 
> > You have coded "LAE   R3,0(R4)" - which is the same as "LAE 
>   R3,0(R4,R0)"
> > 
> > Rob Scott
> > Lead Developer
> > Rocket Software
> > 275 Grove Street * Newton, MA 02466-2272 * USA
> > Tel: +1.781.684.2305
> > Email: rsc...@rs.com
> > Web: www.rocketsoftware.com
> > 
> > 
> > -Original Message-
> > From: IBM Mainframe Discussion List 
> [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of Rob Scott
> > Sent: 06 March 2012 19:47
> > To: IBM-MAIN@bama.ua.edu
> > Subject: Re: LAE instruction
> > 
> > Commas are *very* important in AR-mode
> > 
> > You have coded "LAE   R3,0(R4)" - which is the same as "LAE 
>   R3,(R4,R0)"
> > 
> > Coded that way there is no automatic way that AR3 is going 
> to inherit the AR4 value.
> > 
> > You need : "LAE   R3,0(,R4)"
> > 
> > This will ensure that AR3 is populated from the AR for the 
> referenced base register R4.
> > 
> > 
> > Rob Scott
> > Lead Developer
> > Rocket Software
> > 275 Grove Street * Newton, MA 02466-2272 * USA
> > Tel: +1.781.684.2305
> > Email: rsc...@rs.com
> > Web: www.rocketsoftware.com
> > 
> > 
> > -Original Message-
> > From: IBM Mainframe Discussion List 
> [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of Micheal Butz
> > Sent: 06 March 2012 19:05
> > To: IBM-MAIN@bama.ua.edu
> > Subject: LAE instruction
> > 
> > Hi,
> > 
> > 
> > 
> > I have two part question regarding the LAE instruction 
> > 
> > 
> > 
> > . What would the sac value e.g. 256,512,768 have to 
> be that when
> > using the LAE instructions with the following operands LAE  
> 3,0(R4) would
> > AR3 get loaded with AR4 
> > 
> > 
> > 
> > . Second what value does the displacement play in 
> the instruction
> > 
> > 
> > 
> > 
> > 
> > 
> > 
> > 
> > 
> > 
> > 
> > Thanks 
> > 
> > 
> > 
> --
> > For IBM-MAIN subscribe / signoff / archive access 
> instructions, send email to lists...@bama.ua.edu with the 
> message: INFO IBM-MAIN
> > 
> > 
> --
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> instructions, send email to lists...@bama.ua.edu with the 
> message: INFO IBM-MAIN
> > 
> > 
> --
> > For IBM-MAIN subscribe / signoff / archive access instructions,
> > send email to lists...@bama.ua.

Re: LAE instruction

[Micheal Butz]

Thanks
 
Regarding my questions

The doc says the inst is dependent
On address space control bits which is set by the SAC inst. 

Secondly seems like the displacement doesn't play a role in the inst

Sent from my iPhone

On Mar 6, 2012, at 2:49 PM, Rob Scott  wrote:

>> You have coded "LAE   R3,0(R4)" - which is the same as "LAE   R3,(R4,R0)"
> 
> Should read :
> 
> You have coded "LAE   R3,0(R4)" - which is the same as "LAE   R3,0(R4,R0)"
> 
> Rob Scott
> Lead Developer
> Rocket Software
> 275 Grove Street * Newton, MA 02466-2272 * USA
> Tel: +1.781.684.2305
> Email: rsc...@rs.com
> Web: www.rocketsoftware.com
> 
> 
> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf 
> Of Rob Scott
> Sent: 06 March 2012 19:47
> To: IBM-MAIN@bama.ua.edu
> Subject: Re: LAE instruction
> 
> Commas are *very* important in AR-mode
> 
> You have coded "LAE   R3,0(R4)" - which is the same as "LAE   R3,(R4,R0)"
> 
> Coded that way there is no automatic way that AR3 is going to inherit the AR4 
> value.
> 
> You need : "LAE   R3,0(,R4)"
> 
> This will ensure that AR3 is populated from the AR for the referenced base 
> register R4.
> 
> 
> Rob Scott
> Lead Developer
> Rocket Software
> 275 Grove Street * Newton, MA 02466-2272 * USA
> Tel: +1.781.684.2305
> Email: rsc...@rs.com
> Web: www.rocketsoftware.com
> 
> 
> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf 
> Of Micheal Butz
> Sent: 06 March 2012 19:05
> To: IBM-MAIN@bama.ua.edu
> Subject: LAE instruction
> 
> Hi,
> 
> 
> 
> I have two part question regarding the LAE instruction 
> 
> 
> 
> . What would the sac value e.g. 256,512,768 have to be that when
> using the LAE instructions with the following operands LAE  3,0(R4) would
> AR3 get loaded with AR4 
> 
> 
> 
> . Second what value does the displacement play in the instruction
> 
> 
> 
> 
> 
> 
> 
> 
> 
> 
> 
> Thanks 
> 
> 
> --
> For IBM-MAIN subscribe / signoff / archive access instructions, send email to 
> lists...@bama.ua.edu with the message: INFO IBM-MAIN
> 
> --
> For IBM-MAIN subscribe / signoff / archive access instructions, send email to 
> lists...@bama.ua.edu with the message: INFO IBM-MAIN
> 
> --
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Re: LAE instruction

[McKown, John]

> -Original Message-
> From: IBM Mainframe Discussion List 
> [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of Micheal Butz
> Sent: Tuesday, March 06, 2012 1:05 PM
> To: IBM-MAIN@bama.ua.edu
> Subject: LAE instruction
> 
> Hi,
> 
> I have two part question regarding the LAE instruction 
> 
> . What would the sac value e.g. 256,512,768 have to 
> be that when

You use the "SAC n" instruction to switch into AR mode. The "n" is normally 
coded as 512 or x'0200', but you can actually use other values because bits 
0-51 and 56-63 are ignored. We normally use b'0' in the ignored positions, but 
that is not currently required. So "SAC 512" encodes to B2190200 which is an 
opcode of B219, a base register of 0, and and offset of x'200' or 512. But, if 
you really wanted to, you could use any number from 512 to 767. Or many other 
possibilities by using an appropriate value in a base register with the proper 
displacement. I doubt anybody in their right mind would do this. Unless it was 
to obscure the function.

> using the LAE instructions with the following operands LAE  
> 3,0(R4) would
> AR3 get loaded with AR4 

Your instruction is malformed. LAE R3,0(R4), as coded, will not do what you 
want and you cannot force it to. That instruction is assembled as if it were 
really:
" LAE R3,0(R4,R0)", making R4 the index register and R0 the "base" register 
(but not really). In this case, R0 does not really designate a base register, 
but indicates a "special case" of "no base register". In this specific case, 
general register R3 will contain the contents of R4, modified as needed 
according to the AMODE (AMODE 24, only bits 40-63 are copied, with zero bits 
placed in 32-39, with bits 0-31 being unchanged; AMODE 31 copies bits 33-63 of 
R4 into R3, with b'0' in bit 32 and bit 0-31 unchanged; in AMODE 64, all 64 
bits are copied.) The contents of access register 3 (AR3) is set to all zeros, 
regardless of the AMODE due to the base register position containing a 0. This 
is documented for LAE in the Principles of Operation manual.


> 
> . Second what value does the displacement play in the 
> instruction

The same as in the LA instruction. The result in general R3 is the displacement 
value + contents of the index register + contents of the base register (unless 
the "base register" specification is b'', which again indicates "no base 
register" and so does not contribute any value to the addition), and modified 
by the AMODE as mentioned above.

> 
>  Thanks 
--
John McKown 
Systems Engineer IV
IT

Administrative Services Group

HealthMarkets(r)

9151 Boulevard 26 * N. Richland Hills * TX 76010
(817) 255-3225 phone * 
john.mck...@healthmarkets.com * www.HealthMarkets.com

Confidentiality Notice: This e-mail message may contain confidential or 
proprietary information. If you are not the intended recipient, please contact 
the sender by reply e-mail and destroy all copies of the original message. 
HealthMarkets(r) is the brand name for products underwritten and issued by the 
insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance 
Company(r), Mid-West National Life Insurance Company of TennesseeSM and The 
MEGA Life and Health Insurance Company.SM

 

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Re: Customer Service, the good and the bad...

[Dale Miller]

When my wife's windoze machine neared end-of-life, we bought her a new  
HP laptop. I had to spend a lot of time fixing problems my wife  
encountered because of HP's tactic of pasting HP-specific crud on top  
of windoze, but eventually, we got things working in an understandable  
way. But then ...  On the day after the warranty expired, the internet  
connection through my wireless router would not come up. I pursued all  
the help pages and Google and eventually discovered that the light (on  
the F12 key) signifying power status to the wireless adapter was amber  
rather than blue. HP FAQ's and Google hits indicated that I should  
just press the F12 key, but to no avail. When I contacted HP, I was  
told that I would have to pay for support on a time-used basis or get  
a contract for $59. I paid the $59 and was connected to a lady for  
whom English was a second language. She knew immediately what the  
problem was and instructed me to delete and rebuild one of the  
programs that was part of the afore-mentioned overlay of HP crud, and  
then to download an updated BIOS from HP's site.

What really bothers me about this is:
1) The problem's emergence on the first day of non-warranty status.
2) The fact that the problem is obviously with HP software (or perhaps  
manufacturing processes related to software).
3) The fact that support knew all about the problem, but it was not in  
the FAQ's, or at least not recognizable by the symptoms I experienced.

4) That I had to pay to discover HP's defect.

Dale Miller

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Re: LAE instruction

[Rob Scott]

> You have coded "LAE   R3,0(R4)" - which is the same as "LAE   R3,(R4,R0)"

Should read :

You have coded "LAE   R3,0(R4)" - which is the same as "LAE   R3,0(R4,R0)"

Rob Scott
Lead Developer
Rocket Software
275 Grove Street * Newton, MA 02466-2272 * USA
Tel: +1.781.684.2305
Email: rsc...@rs.com
Web: www.rocketsoftware.com


-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of 
Rob Scott
Sent: 06 March 2012 19:47
To: IBM-MAIN@bama.ua.edu
Subject: Re: LAE instruction

Commas are *very* important in AR-mode

You have coded "LAE   R3,0(R4)" - which is the same as "LAE   R3,(R4,R0)"

Coded that way there is no automatic way that AR3 is going to inherit the AR4 
value.

You need : "LAE   R3,0(,R4)"

This will ensure that AR3 is populated from the AR for the referenced base 
register R4.


Rob Scott
Lead Developer
Rocket Software
275 Grove Street * Newton, MA 02466-2272 * USA
Tel: +1.781.684.2305
Email: rsc...@rs.com
Web: www.rocketsoftware.com


-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of 
Micheal Butz
Sent: 06 March 2012 19:05
To: IBM-MAIN@bama.ua.edu
Subject: LAE instruction

Hi,

 

I have two part question regarding the LAE instruction 



. What would the sac value e.g. 256,512,768 have to be that when
using the LAE instructions with the following operands LAE  3,0(R4) would
AR3 get loaded with AR4 

 

. Second what value does the displacement play in the instruction

 

 

 

 

 

 Thanks 


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Re: LAE instruction

[Rob Scott]

Commas are *very* important in AR-mode

You have coded "LAE   R3,0(R4)" - which is the same as "LAE   R3,(R4,R0)"

Coded that way there is no automatic way that AR3 is going to inherit the AR4 
value.

You need : "LAE   R3,0(,R4)"

This will ensure that AR3 is populated from the AR for the referenced base 
register R4.


Rob Scott
Lead Developer
Rocket Software
275 Grove Street * Newton, MA 02466-2272 * USA
Tel: +1.781.684.2305
Email: rsc...@rs.com
Web: www.rocketsoftware.com


-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of 
Micheal Butz
Sent: 06 March 2012 19:05
To: IBM-MAIN@bama.ua.edu
Subject: LAE instruction

Hi,

 

I have two part question regarding the LAE instruction 



. What would the sac value e.g. 256,512,768 have to be that when
using the LAE instructions with the following operands LAE  3,0(R4) would
AR3 get loaded with AR4 

 

. Second what value does the displacement play in the instruction

 

 

 

 

 

 Thanks 


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FICON channel ulitization

[R.S.]

The following scenario:
z196 with FICON Express8S interfaces. Single (only one) channel attached 
to EMC DMX3 CU via 4Gbps switch.

Some test jobs submitted (ADRDSSU).
During the test 100% channel utilization was observed.

Q: How it's possible? Neither switch, nor CU would allow more than 50% 
of bandwidth utilisation, since both are 4Gbps rated.


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Re: TAPEMAP generator

[Elardus Engelbrecht]

Paul Gilmartin wrote:

>(Yes, but does the OP have the Rexx Afrikaans language feature installed?)

Hehe... :-D   Variable names can be anything. I use Afrikaans words for 
variables for easy IEHBALL purposes. ;-)

Maybe I should create that feature so I can retire rich with a yatch, a 747 and 
own private island... :-D


>I wouldn't bother with counting lines; I'd write each line to the data set 
>directly with a procedure such as:

Excellent idea. This will perhaps go good with the OP's requirement.


>Performance?  how many times will this be used?

It depends. I wonder if the OP will do his job just once or repeately with a 
new batch of volsers to work on...

Perhaps the OP has some cleanup work, migration to new media and media type or 
go over to VTS or so?

Paul, thanks for your reply. It is much appreciated. Please keep posting your 
good ideas. :-)

Groete / Greetings
Elardus Engelbrecht

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LAE instruction

[Micheal Butz]

Hi,

 

I have two part question regarding the LAE instruction 



. What would the sac value e.g. 256,512,768 have to be that when
using the LAE instructions with the following operands LAE  3,0(R4) would
AR3 get loaded with AR4 

 

. Second what value does the displacement play in the instruction

 

 

 

 

 

 Thanks 


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Re: RES: TAPEMAP generator

[Chip Grantham]

A.Cecilio, 

I attempted to send you my general purpose CLIST for something like this 
but it bounced on your email address.  I'd be happy to send it to you 
personally (and any one else) if you contact me off-line. 

Chip Grantham  |  Ameritas  |  Sr. IT Consultant | cgrant...@ameritas.com 
5900 O Street, Lincoln NE 68510 | p: 402-467-7382 | c: 402-429-3579 | f: 
402-325-4030

 



ITURIEL DO NASCIMENTO NETO <4254.itur...@bradesco.com.br> 
Sent by: IBM Mainframe Discussion List 
03/06/2012 12:55 PM
Please respond to
IBM Mainframe Discussion List 


To
IBM-MAIN@bama.ua.edu
cc

Subject
RES: TAPEMAP generator






Hi,

A 100 tapes ? It's quite few.
If the number of volumes were bigger I would go with Rexx.
I think that it will be faster if you manually generate a job like this :

//JOB1 JOB
// PROC
//COPY EXEC PGM=IEBGENER
//SYSPRINT DD SYSOUT=*
//SYSUT2   DD SYSOUT=*
//SYSUT1   DD DISP=OLD,
//DSN=AL2999.SOMETH,
//DCB=(RECFM=FB,LRECL=80,BLKSIZE=800,BUFNO=50),
//UNIT=(VTS),LABEL=(1,BLP,EXPDT=98000),
//VOL=SER=&T
// PEND
//S1   EXEC  COPY,T=V10001
//S2   EXEC  COPY,T=V10002

And so...

Atenciosamente / Regards / Saludos


Ituriel do Nascimento Neto
BANCO BRADESCO S.A.
4254 / DPCD Engenharia de Software
Sistemas Operacionais Mainframes
Tel: +55 11 4197-2021 R: 22021
Fax: +55 11 4197-2814


-Mensagem original-
De: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] Em nome de 
Burrell, C. Todd (CDC/OCOO/ITSO) (CTR)
Enviada em: terça-feira, 6 de março de 2012 13:09
Para: IBM-MAIN@bama.ua.edu
Assunto: Re: TAPEMAP generator

You should be able to do this in REXX very easily (around 25 line EXEC). I 
have tons of JCL where I read in a list (like the tape list) and the write 
out the JCL.  This comes from many years of laziness...


-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On 
Behalf Of af dc
Sent: Tuesday, March 06, 2012 11:03 AM
To: IBM-MAIN@bama.ua.edu
Subject: TAPEMAP generator

Hello,
I need to do a tapemap for about 100 tapes (virtual volumes), I've jcl:

//V1   EXEC PGM=IEBGENER
//SYSPRINT DD SYSOUT=*
//SYSOUT   DD SYSOUT=*
//SYSUT1   DD DISP=OLD,
//DSN=AL2999.SOMETH,
//DCB=(RECFM=FB,LRECL=80,BLKSIZE=800,BUFNO=50),
//UNIT=(VTS),LABEL=(1,BLP,EXPDT=98000),
//VOL=SER=V1

and I've volume list in format:

V1
V10001
V10002
...

what is the best way to generate 100 jcls ??? rexx ? icetool ?
Many thx, A.Cecilio.

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RES: TAPEMAP generator

[ITURIEL DO NASCIMENTO NETO]

Hi,

A 100 tapes ? It's quite few.
If the number of volumes were bigger I would go with Rexx.
I think that it will be faster if you manually generate a job like this :

//JOB1 JOB
// PROC
//COPY EXEC PGM=IEBGENER
//SYSPRINT DD SYSOUT=*
//SYSUT2   DD SYSOUT=*
//SYSUT1   DD DISP=OLD,
//DSN=AL2999.SOMETH,
//DCB=(RECFM=FB,LRECL=80,BLKSIZE=800,BUFNO=50),
//UNIT=(VTS),LABEL=(1,BLP,EXPDT=98000),
//VOL=SER=&T
// PEND
//S1   EXEC  COPY,T=V10001
//S2   EXEC  COPY,T=V10002

And so...

Atenciosamente / Regards / Saludos


Ituriel do Nascimento Neto
BANCO BRADESCO S.A.
4254 / DPCD Engenharia de Software
Sistemas Operacionais Mainframes
Tel: +55 11 4197-2021 R: 22021
Fax: +55 11 4197-2814


-Mensagem original-
De: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] Em nome de 
Burrell, C. Todd (CDC/OCOO/ITSO) (CTR)
Enviada em: terça-feira, 6 de março de 2012 13:09
Para: IBM-MAIN@bama.ua.edu
Assunto: Re: TAPEMAP generator

You should be able to do this in REXX very easily (around 25 line EXEC).  I 
have tons of JCL where I read in a list (like the tape list) and the write out 
the JCL.  This comes from many years of laziness...


-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of 
af dc
Sent: Tuesday, March 06, 2012 11:03 AM
To: IBM-MAIN@bama.ua.edu
Subject: TAPEMAP generator

Hello,
I need to do a tapemap for about 100 tapes (virtual volumes), I've jcl:

//V1   EXEC PGM=IEBGENER
//SYSPRINT DD SYSOUT=*
//SYSOUT   DD SYSOUT=*
//SYSUT1   DD DISP=OLD,
//DSN=AL2999.SOMETH,
//DCB=(RECFM=FB,LRECL=80,BLKSIZE=800,BUFNO=50),
//UNIT=(VTS),LABEL=(1,BLP,EXPDT=98000),
//VOL=SER=V1

and I've volume list in format:

V1
V10001
V10002
...

what is the best way to generate 100 jcls ??? rexx ? icetool ?
Many thx, A.Cecilio.

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If you are not addressee of this message, since now you are advised to not 
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the elimination of its contents of your database, registrations or controls 
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Re: TAPEMAP generator

[Vernooij, CP - SPLXM]

"af dc"  wrote in message
news:...
> Hello,
> I need to do a tapemap for about 100 tapes (virtual volumes), I've
jcl:
> 
> //V1   EXEC PGM=IEBGENER
> //SYSPRINT DD SYSOUT=*
> //SYSOUT   DD SYSOUT=*
> //SYSUT1   DD DISP=OLD,
> //DSN=AL2999.SOMETH,
> //DCB=(RECFM=FB,LRECL=80,BLKSIZE=800,BUFNO=50),
> //UNIT=(VTS),LABEL=(1,BLP,EXPDT=98000),
> //VOL=SER=V1
> 
> and I've volume list in format:
> 
> V1
> V10001
> V10002
> ...
> 
> what is the best way to generate 100 jcls ??? rexx ? icetool ?
> Many thx, A.Cecilio.
> 

Do you have SAS?
PROC TAPELABEL DDNAME=INPUT

Gives you a nice print.

Kees.

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Re: Good source for relationship of opcodes, models, MACHINE() and ARCH()

[John Gilmore]

I don't know whether Tony is the notional culprit or I am, but I can
very easily be induced to shut up/avoid your topics, and I shall now
do so.

John Gilmore, Ashland, MA 01721 - USA

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Re: Good source for relationship of opcodes, models, MACHINE() and ARCH()

[Charles Mills]

Sung to the tune of http://www.youtube.com/watch?v=EvGJvzwKqg0 

"Don't hijack my thread, my friend, ..."

Charles

-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf
Of Tony Harminc
Sent: Tuesday, March 06, 2012 9:32 AM
To: IBM-MAIN@bama.ua.edu
Subject: Re: Good source for relationship of opcodes, models, MACHINE() and
ARCH()

On 6 March 2012 11:25, John Gilmore  wrote:

> It is not a secret that XL C/C++ and Enterprise PL/I share the same
> optimizer and code generator; and it is thus unsurprising that their
> ARCH levels are the same.

Which leads one to wonder if a METAL option for PL/I exists, or could
reasonably exist.

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Re: Good source for relationship of opcodes, models, MACHINE() and ARCH()

[John Gilmore]

I should guess that the question whether there will ever be a METAL
PL/I is more IBM-political than technical.

--jg

On 3/6/12, Tony Harminc  wrote:
> On 6 March 2012 11:25, John Gilmore  wrote:
>
>> It is not a secret that XL C/C++ and Enterprise PL/I share the same
>> optimizer and code generator; and it is thus unsurprising that their
>> ARCH levels are the same.
>
> Which leads one to wonder if a METAL option for PL/I exists, or could
> reasonably exist.
>
> Tony H.
>
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Re: Good source for relationship of opcodes, models, MACHINE() and ARCH()

[Tony Harminc]

On 6 March 2012 11:25, John Gilmore  wrote:

> It is not a secret that XL C/C++ and Enterprise PL/I share the same
> optimizer and code generator; and it is thus unsurprising that their
> ARCH levels are the same.

Which leads one to wonder if a METAL option for PL/I exists, or could
reasonably exist.

Tony H.

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Re: TAPEMAP generator

[Paul Gilmartin]

On Tue, 6 Mar 2012 10:42:57 -0600, Elardus Engelbrecht  wrote:

>af dc wrote:
>
>>I need to do a tapemap for about 100 tapes (virtual volumes), I've jcl:
>
>>what is the best way to generate 100 jcls ??? rexx ? icetool ?
>
>First loop is for each line containing volser and second loop is generating a 
>full JCL for each volser.
>
> ...
>"ALLOC DA('') F(AFVOER) OLD REUSE"
>LYNE = 0
>
(Yes, but does the OP have the Rexx Afrikaans language feature installed?)


>JCL.0 = 
>
I wouldn't bother with counting lines; I'd write each line to
the data set directly with a procedure such as:

PutAFVOER: procedure
parse arg LYNE.1/* Argument is one line of JCL.  */
'EXECIO 1 DISKW AFVOER (stem LYNE.'
return

Performance?  how many times will this be used?

-- gil

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Re: Program FLIH backdoor - This is a criminal breach of security!

[John Gilmore]

Edward E. Jaffe wrote:


The above notwithstanding, I don't think anyone at IBM or elsewhere
would recommend this technique for brand new, 21st-century
development.


and I am very pleased to see that this is his view.   My own, slightly
different view of "this interface" is in a certain sense admiring; but
it is also very like my view of Kama Sutra position 327,859: I see
that you can do it that way, but why?

Moreover, as I have had occasion to say here before, its cleverness
seems to me to be misplaced or, better perhaps, too provocative.  It
implicitly poses a challenge of the self-congratulatory form: No
impostor is clever enough to penetrate our defenses!  This is
unfortunate because there are able old-sense hackers who respond only
to such challenges.  (It is a good operational premise to assume,
however improbably, that attackers are as smart as defenders.)

John Gilmore, Ashland, MA 01721 - USA

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Re: TAPEMAP generator

[Paul Gilmartin]

On Tue, 6 Mar 2012 16:03:05 +, af dc wrote:

>Hello,
>I need to do a tapemap for about 100 tapes (virtual volumes), I've jcl:
>
>//V1   EXEC PGM=IEBGENER
>//SYSPRINT DD SYSOUT=*
>//SYSOUT   DD SYSOUT=*
>//SYSUT1   DD DISP=OLD,
>//DSN=AL2999.SOMETH,
>//DCB=(RECFM=FB,LRECL=80,BLKSIZE=800,BUFNO=50),
>//UNIT=(VTS),LABEL=(1,BLP,EXPDT=98000),
>//VOL=SER=V1
>
>and I've volume list in format:
>
>V1
>V10001
>V10002
>...
>
>what is the best way to generate 100 jcls ??? rexx ? icetool ?
> 
The best way is a POSIX shell script, but Rexx would do.  (I don't
know ICETOOL or perl.)

100 jobs?  Or one job with 100 steps?  Would it be better to direct
the output to various data sets with the tape volsers as qualifiers,
or even to a PDS or UNIX directory with the tape volsers as member
names?

IEBGENER?  Are you going to dump the entire tape data set content?
"SYSOUT DD"??  Did you mean SYSUT2?

CABAListically,
gil

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Re: TAPEMAP generator

[Elardus Engelbrecht]

af dc wrote:

>I need to do a tapemap for about 100 tapes (virtual volumes), I've jcl:

>what is the best way to generate 100 jcls ??? rexx ? icetool ?

REXX, like this (you will need seriously heavy editing before putting it in use 
:-D ):

First loop is for each line containing volser and second loop is generating a 
full JCL for each volser.

"ALLOC DA('') F(IN) SHR REUSE"
"EXECIO * DISKR IN (STEM LYS. FINIS"
"FREE F(IN)"  
"ALLOC DA('') F(AFVOER) OLD REUSE"
LYNE = 0
DO J = 1 TO LYS.0
VOLSER = SUBSTR(LYS.J,1,6)
JCL.0 = 
JCL.1  = "//??? JOB ..."
JCL.2  = "//... ETC"
JCL.3  = ... ETC ...
DO I = 1 TO JCL.0   
   LYNE = LYNE + 1  
   AF.LYNE = JCL.I
END 
END 
AF.0 = LYNE   
"EXECIO * DISKW AFVOER (STEM AF. FINIS" 
"FREE F(AFVOER)"
RETURN

Perhaps not the best solution, but a good start...

HTH!

Groete / Greetings
Elardus Engelbrecht

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Re: TAPEMAP generator

[Lizette Koehler]

>Hello,
>I need to do a tapemap for about 100 tapes (virtual volumes), I've jcl:
>
>//V1   EXEC PGM=IEBGENER
>//SYSPRINT DD SYSOUT=*
>//SYSOUT   DD SYSOUT=*
>//SYSUT1   DD DISP=OLD,
>//DSN=AL2999.SOMETH,
>//DCB=(RECFM=FB,LRECL=80,BLKSIZE=800,BUFNO=50),
>//UNIT=(VTS),LABEL=(1,BLP,EXPDT=98000),
>//VOL=SER=V1
>
>and I've volume list in format:
>
>V1
>V10001
>V10002
>...
>
>what is the best way to generate 100 jcls ??? rexx ? icetool ?


And yes, a simple REXX,CLIST using ISPF Skels will be very easy to generate the 
needed JCL.

Lizette

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Re: Good source for relationship of opcodes, models, MACHINE() and ARCH()

[John Gilmore]

Charles Mills wrote:


. . .  that correlates Model numbers, the HLASM > MACHINE() option,
and the XL C/C++ ARCH() option, and also the Enterprise PL/I option
ARCH() which (believe it or not!!!) is apparently exactly equivalent
to that of C/C++.


It is not a secret that XL C/C++ and Enterprise PL/I share the same
optimizer and code generator; and it is thus unsurprising that their
ARCH levels are the same.

Crowded lines sometimes result from defaulting to the option
LIST(121)?  The option LIST(133) should [almost] always be coded
explicitly.

John Gilmore, Ashland, MA 01721 - USA

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Re: Program FLIH backdoor - This is a criminal breach of security!

[Edward Jaffe]

On 3/6/2012 7:40 AM, Clark Morris wrote:

On 5 Mar 2012 23:38:50 -0800, in bit.listserv.ibm-main you wrote:

To understand what it does study the two trace entries below (GTF is your 
friend):

SVC   CODE 109  ASCB 00F95200 CPU. 
 PSW. 0785 806D  0C53B222
 TCB. 00AC8300 R15. 000B R0.. 
 R1.. 0001
GMT-03/06/2012 06:59:08.693767  LOC-03/05/2012 22:59:08.693767

SVCR  CODE 109  ASCB 00F95200 CPU. 
 PSW. 0714 806D  0C53B222
 TCB. 00AC8300 R15.  R0.. 
 R1.. 0001
GMT-03/06/2012 06:59:08.693799  LOC-03/05/2012 22:59:08.693799

How does the system verify that the caller is the intended caller versus an 
impostor?


Suffice to say that it does. My intent was not to explain the intricacies of 
this interface -- smart programmers can likely figure that out for themselves -- 
but rather to dispel the myth that such interfaces necessarily represent an 
exposure. This is IBM code!!


The above notwithstanding, I don't think anyone at IBM or elsewhere would 
recommend this technique for brand new, 21st-century development. Making it 
secure is a tricky business that requires a deep understanding of system 
internals. There are much better interfaces available to modern developers on 
z/OS that guarantee integrity without having to work so hard.


--
Edward E Jaffe
Phoenix Software International, Inc
831 Parkview Drive North
El Segundo, CA 90245
310-338-0400 x318
edja...@phoenixsoftware.com
http://www.phoenixsoftware.com/

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Re: Good source for relationship of opcodes, models, MACHINE() and ARCH()

[Charles Mills]

Got it. You da best! I will get back on this at some point soon.

Charles

-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf
Of Farley, Peter x23353
Sent: Tuesday, March 06, 2012 7:38 AM
To: IBM-MAIN@bama.ua.edu
Subject: Re: Good source for relationship of opcodes, models, MACHINE() and
ARCH()

BTDT already.  Try the attached Rexx (genoptbl.txt) (at least I hope it gets
attached -- I will paste it into a new reply if it doesn't make it to the
list).

Peter

> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On 
> Behalf Of Charles Mills
> Sent: Tuesday, March 06, 2012 10:04 AM
> To: IBM-MAIN@bama.ua.edu
> Subject: Re: Good source for relationship of opcodes, models, 
> MACHINE() and ARCH()
> 
> This was bugging me so I got a start on a document. I have a table now 
> (with some question marks in it) that correlates Model numbers, the 
> HLASM
> MACHINE() option, and the XL C/C++ ARCH() option, and also the 
> Enterprise PL/I option ARCH() which (believe it or not!!!) is 
> apparently exactly equivalent to that of C/C++.
> 
> I had the bright idea that I could run assemblies with 
> MACHINE(xxx,LIST) at the various levels and then use ISPF 3.12 to 
> determine the differences as the level changed, but HLASM prints the 
> opcode list in a three-column format, so nearly every line changes 
> from one level to the next. I have not yet come up with an approach 
> other than using some tool to make each list into a single column -- 
> but that's more work than I wanted to take on this morning.

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Re: TAPEMAP generator

[Burrell, C. Todd (CDC/OCOO/ITSO) (CTR)]

You should be able to do this in REXX very easily (around 25 line EXEC).  I 
have tons of JCL where I read in a list (like the tape list) and the write out 
the JCL.  This comes from many years of laziness...  


-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf Of 
af dc
Sent: Tuesday, March 06, 2012 11:03 AM
To: IBM-MAIN@bama.ua.edu
Subject: TAPEMAP generator

Hello,
I need to do a tapemap for about 100 tapes (virtual volumes), I've jcl:

//V1   EXEC PGM=IEBGENER
//SYSPRINT DD SYSOUT=*
//SYSOUT   DD SYSOUT=*
//SYSUT1   DD DISP=OLD,
//DSN=AL2999.SOMETH,
//DCB=(RECFM=FB,LRECL=80,BLKSIZE=800,BUFNO=50),
//UNIT=(VTS),LABEL=(1,BLP,EXPDT=98000),
//VOL=SER=V1

and I've volume list in format:

V1
V10001
V10002
...

what is the best way to generate 100 jcls ??? rexx ? icetool ?
Many thx, A.Cecilio.

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TAPEMAP generator

[af dc]

Hello,
I need to do a tapemap for about 100 tapes (virtual volumes), I've jcl:

//V1   EXEC PGM=IEBGENER
//SYSPRINT DD SYSOUT=*
//SYSOUT   DD SYSOUT=*
//SYSUT1   DD DISP=OLD,
//DSN=AL2999.SOMETH,
//DCB=(RECFM=FB,LRECL=80,BLKSIZE=800,BUFNO=50),
//UNIT=(VTS),LABEL=(1,BLP,EXPDT=98000),
//VOL=SER=V1

and I've volume list in format:

V1
V10001
V10002
...

what is the best way to generate 100 jcls ??? rexx ? icetool ?
Many thx, A.Cecilio.

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Re: Program FLIH backdoor - This is a criminal breach of security!

[Shmuel Metz (Seymour J.)]

In <4f55be9e.7000...@phoenixsoftware.com>, on 03/05/2012
   at 11:37 PM, Edward Jaffe  said:

>To understand what it does study the two trace entries below (GTF is
>your friend):

That doesn't tell me what happens in between.

>Of course, I meant the intended caller.

Code trumps intention.

>Unintended callers can't successfully use the service.

What stops them.
 
-- 
 Shmuel (Seymour J.) Metz, SysProg and JOAT
 ISO position; see  
We don't care. We don't have to care, we're Congress.
(S877: The Shut up and Eat Your spam act of 2003)

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Re: Return code = X'14' from ATTACH JSTCB=YES

[Shmuel Metz (Seymour J.)]

In , on 03/06/2012
   at 12:51 AM, "Robert A. Rosenberg"  said:

>Are you sure?

Well, I trust Peter. My logic manuals are far too old to cast light on
the current release.
 
-- 
 Shmuel (Seymour J.) Metz, SysProg and JOAT
 ISO position; see  
We don't care. We don't have to care, we're Congress.
(S877: The Shut up and Eat Your spam act of 2003)

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Re: Program FLIH backdoor - This is a criminal breach of security!

[Clark Morris]

On 5 Mar 2012 23:38:50 -0800, in bit.listserv.ibm-main you wrote:

>On 3/5/2012 6:06 PM, Shmuel Metz (Seymour J.) wrote:
>> In<4f540cf5.3080...@phoenixsoftware.com>, on 03/04/2012
>> at 04:46 PM, Edward Jaffe  said:
>>
>>> Look more closely.
>> In the PLM that IBM doesn't publish?
>>
>>
>> Peter? Could you comment on what IGX00011 does?
>
>To understand what it does study the two trace entries below (GTF is your 
>friend):
>
>SVC   CODE 109  ASCB 00F95200 CPU. 
> PSW. 0785 806D  0C53B222
> TCB. 00AC8300 R15. 000B R0.. 
> R1.. 0001
>GMT-03/06/2012 06:59:08.693767  LOC-03/05/2012 22:59:08.693767
>
>SVCR  CODE 109  ASCB 00F95200 CPU. 
> PSW. 0714 806D  0C53B222
> TCB. 00AC8300 R15.  R0.. 
> R1.. 0001
>GMT-03/06/2012 06:59:08.693799  LOC-03/05/2012 22:59:08.693799
>
>> You need to look more closely at IGX00011. Hint: the "secure"
>> implementation is not just in the SVC(ESR) routine itself but also
>> in the caller
>> What caller? It might not be the intended caller.
>
>Of course, I meant the intended caller. Unintended callers can't successfully 
>use the service.

How does the system verify that the caller is the intended caller
versus an impostor?

Clark Morris

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Re: Good source for relationship of opcodes, models, MACHINE() and ARCH()

[Farley, Peter x23353]

BTDT already.  Try the attached Rexx (genoptbl.txt) (at least I hope it gets 
attached -- I will paste it into a new reply if it doesn't make it to the list).

Peter

> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On
> Behalf Of Charles Mills
> Sent: Tuesday, March 06, 2012 10:04 AM
> To: IBM-MAIN@bama.ua.edu
> Subject: Re: Good source for relationship of opcodes, models, MACHINE()
> and ARCH()
> 
> This was bugging me so I got a start on a document. I have a table now
> (with some question marks in it) that correlates Model numbers, the HLASM
> MACHINE() option, and the XL C/C++ ARCH() option, and also the Enterprise
> PL/I option ARCH() which (believe it or not!!!) is apparently exactly
> equivalent to that of C/C++.
> 
> I had the bright idea that I could run assemblies with MACHINE(xxx,LIST)
> at the various levels and then use ISPF 3.12 to determine the differences
> as the level changed, but HLASM prints the opcode list in a three-column
> format, so nearly every line changes from one level to the next. I have
> not yet come up with an approach other than using some tool to make each
> list into a single column -- but that's more work than I wanted to take on
> this morning.
> 
> Charles
> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On
> Behalf Of Charles Mills
> Sent: Monday, March 05, 2012 7:02 PM
> To: IBM-MAIN@bama.ua.edu
> Subject: Re: Good source for relationship of opcodes, models, MACHINE()
> and ARCH()
> 
> Thanks. Good list. IBM Canada does some cool stuff.
> 
> Sheesh! Add G-levels to MACHINE() and ARCH() levels.
> 
> All the information is out there. I could do a document that answered
> these questions if I didn't already have a day job.
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/* Procedure to read HLASM OPTABLE(type,LIST) output listing */
/* and generate a table of opcodes in a single column*/
/* with opcodes also converted to decimal for sorting needs  */
/*   */
/* Input from SYSUT1 and output to SYSUT2*/
arg dbg .
if ((dbg = '') | (verify(dbg,'0123456789') > 0)) then dbg = 0
else dbg = dbg + 0
address TSO
select
   when dbg = 1 then trace r
   when dbg > 1 then trace i
   otherwise trace o
end
/* Read in the entire OPTABLE listing */
'EXECIO * DISKR SYSUT1 (STEM LINE.'
if RC <> 0 then LINE.0 = 0
'EXECIO 0 DISKR SYSUT1 (FINIS'
if dbg > 0 then do
   say 'GENOPTBL: LINE.0='LINE.0
end
intbl = 0
INST. = ''
INST.0 = 0
do lx = 2 to LINE.0
   wd1 = word(LINE.lx, 1)
   pfl = left(LINE.lx, 1)
   if (intbl = 0) & (wd1 = '0Mnemonic') then do
  intbl = 1
  iterate lx
   end
   if (pfl = '1') & ,
  (pos('Operation Code Table Contents', LINE.lx) = 0) then leave lx
   if (intbl = 1) & (pfl = '1') then do
  intbl = 0
  iterate lx
   end
   if (intbl = 0) then iterate lx
   if (pfl = '0') then LINE.lx = ' 'substr(LINE.lx, 2)
   do lc = 2 to 122 by 40
  icolm = substr(LINE.lx, lc, 40)
  icw = words(icolm)
  cw2 = word(icolm, 2)
  if (icw = 0) | (cw2 = 'HLASM') then iterate lc
  cw3 = word(icolm, 3)
  op1d = right(x2d(left(cw3, 2)), 3, '0')
  if length(cw3) = 4 then do
 op2d1 = substr(cw3, 3, 1)
 if op2d1 = '.' then op2d1 = '  '
 else op2d1 = right(x2d(op2d1), 2, '0')
 op2d2 = substr(cw3, 4, 1)
 if op2d2 = '.' then op2d2 = '  '
 else op2d2 = right(x2d(op2d2), 2, '0')
  end
  else do
 op2d1 = '  '
 op2d2 = '  '
  end
  icolm = substr(icolm, 1, 19) op1d op2d1 op2d2 substr(icolm, 20)
  ix = INST.0 + 1
  INST.ix = ' 'icolm
  INST.0 = ix
   end
end
/* Write the 1-column instruction lines to output */
'EXECIO' INST.0 'DISKW SYSUT2 (STEM INST.'
'EXECIO 0 DISKW SYSUT2 (FINIS'
exit

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Re: The Trainer's Friend goes Kindle - and you don't need to own a Kindle!

[Steve Comstock]

On 3/6/2012 7:34 AM, Beesley, Paul wrote:

Calibre runs great on Linux for reading and managing e-books.

Regards
Paul



It seems OK on Windows; but it does _not_ do a very
good job of converting between formats as it advertises.





-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On
Behalf Of Steve Comstock
Sent: 06 March 2012 13:47
To: IBM-MAIN@bama.ua.edu
Subject: Re: The Trainer's Friend goes Kindle - and you don't need to
own a Kindle!

On 3/5/2012 7:11 PM, Shmuel Metz (Seymour J.) wrote:

In<4f54f245.9000...@trainersfriend.com>, on 03/05/2012
 at 10:05 AM, Steve Comstock   said:


* If you don't have a Kindle, you can download the
Kindle app for PCs


PC's with what operating system?



Windows: Win XP SP2 or later, Vista, Win 7

If you're running Linux your best bet is probably
the browser-based reader (the "cloud reader"); that
supports:

Firefox V6 or later on Mac/PC/Linux
Chrome V11 or later on Mac/PC/Linux/Chromebook
Safari V5 or later on Mac/PC
Safari on iPad (iOS 4 or later)






--

Kind regards,

-Steve Comstock
The Trainer's Friend, Inc.

303-355-2752
http://www.trainersfriend.com

* To get a good Return on your Investment, first make an investment!
  + Training your people is an excellent investment

* Try our tool for calculating your Return On Investment
for training dollars at
  http://www.trainersfriend.com/ROI/roi.html

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Re: Good source for relationship of opcodes, models, MACHINE() and ARCH()

[Charles Mills]

This was bugging me so I got a start on a document. I have a table now (with
some question marks in it) that correlates Model numbers, the HLASM
MACHINE() option, and the XL C/C++ ARCH() option, and also the Enterprise
PL/I option ARCH() which (believe it or not!!!) is apparently exactly
equivalent to that of C/C++.

I had the bright idea that I could run assemblies with MACHINE(xxx,LIST) at
the various levels and then use ISPF 3.12 to determine the differences as
the level changed, but HLASM prints the opcode list in a three-column
format, so nearly every line changes from one level to the next. I have not
yet come up with an approach other than using some tool to make each list
into a single column -- but that's more work than I wanted to take on this
morning.

Charles
-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On Behalf
Of Charles Mills
Sent: Monday, March 05, 2012 7:02 PM
To: IBM-MAIN@bama.ua.edu
Subject: Re: Good source for relationship of opcodes, models, MACHINE() and
ARCH()

Thanks. Good list. IBM Canada does some cool stuff. 

Sheesh! Add G-levels to MACHINE() and ARCH() levels.

All the information is out there. I could do a document that answered these
questions if I didn't already have a day job.

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Re: Allocating- and deallocating storage on the CEEEDBBEHP

[Steve Comstock]

On 3/6/2012 1:18 AM, Fred van der Windt wrote:

I have an assembler module that reads files and needs storage below the 16M

line to store the DCB an DCBE. Previously I allocated this storage using a
STORAGE macro. Because the module is always invoked by COBOL programs I figured
I could also use LE services to allocate this storage. If I code a CEEV#GTS call

Do you mean CEEGTST?

to allocate this storage on LE's CEEEDBBEHP (LE Below Heap) I get occasional
U4038 abends with a CEE0802C (Heap storage control information was damaged) when
I try to free the allocated storage with a CEEV#FRS call even though the control
information seems to be ok.


I'm not sure what I'm doing wrong: should I just not meddle with the LE's

Below Heap (CEEEDBBEHP)?

LE's below heap is for LE support routines, not
user heap. Yes: you should not meddle with it.



If I use a CEEVGTSB (Get Storage Below) call to allocate the memory on the

User Heap (with heap id 0) I'm also able get storage below the line. This
storage can be freed without any problems. Is the the only viable route to have
LE allocate storage below the line?


thanks for any input,

Fred!


I'm not sure what services you are really using, but I
suspect you're using some of the APIs from the Vendor
Interfaces doc. While a few of these are useful, they
are really intended to be used by creators of products
that use LE internal services under their covers, not
part of the end user interface.


I think you should create a user heap below the line
using CEECRHP with an options value of 73, 74, or 76
then use CEEGTST from that heap for your DCB/DCBE blocks.



--

Kind regards,

-Steve Comstock
The Trainer's Friend, Inc.

303-355-2752
http://www.trainersfriend.com

* To get a good Return on your Investment, first make an investment!
  + Training your people is an excellent investment

* Try our tool for calculating your Return On Investment
for training dollars at
  http://www.trainersfriend.com/ROI/roi.html

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Re: The Trainer's Friend goes Kindle - and you don't need to own a Kindle!

[Beesley, Paul]

Calibre runs great on Linux for reading and managing e-books.

Regards 
Paul 



-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On
Behalf Of Steve Comstock
Sent: 06 March 2012 13:47
To: IBM-MAIN@bama.ua.edu
Subject: Re: The Trainer's Friend goes Kindle - and you don't need to
own a Kindle!

On 3/5/2012 7:11 PM, Shmuel Metz (Seymour J.) wrote:
> In<4f54f245.9000...@trainersfriend.com>, on 03/05/2012
> at 10:05 AM, Steve Comstock  said:
>
>> * If you don't have a Kindle, you can download the
>>Kindle app for PCs
>
> PC's with what operating system?
>

Windows: Win XP SP2 or later, Vista, Win 7

If you're running Linux your best bet is probably
the browser-based reader (the "cloud reader"); that
supports:

Firefox V6 or later on Mac/PC/Linux
Chrome V11 or later on Mac/PC/Linux/Chromebook
Safari V5 or later on Mac/PC
Safari on iPad (iOS 4 or later)



-- 

Kind regards,

-Steve Comstock
The Trainer's Friend, Inc.

303-355-2752
http://www.trainersfriend.com

* To get a good Return on your Investment, first make an investment!
   + Training your people is an excellent investment

* Try our tool for calculating your Return On Investment
 for training dollars at
   http://www.trainersfriend.com/ROI/roi.html

--
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Re: Customer Service, the good and the bad...

[Scott Ford]

Linda:

Wow, a wonderful experience. It's always good to know and hear of good customer 
support stories. Customer support isn't very easy at times. 

Btw my experience with Western Digital is the same as yours. 

I have to kinda watch, I am second generation IT'er so, I think my expectations 
are very high.
The world has changed...

Sent from my iPad
Scott Ford
Senior Systems Engineer
www.identityforge.com



On Mar 6, 2012, at 2:04 AM, Linda Mooney  wrote:

> Hi Scott, 
> 
>   
> 
> Yeah, and guess who usually buys Western Digital almost exclusively.  :))) 
> 
>   
> 
> One more that was equally good, but not IT related.  Long ago, I used to 
> manage an apartment complex.  Tough job, you can never really go home from 
> work.  Anyway, two brothers owned the complex and I got a monthly paycheck 
> signed by one of them.  Unknown to me, they transferred ownership of the 
> apartment complex to a corporation they owned jointly. End of the month, I 
> get my monthly paycheck, deposit it, mail the monthly bills, buy groceries .  
> A couple of days later, I get a call from my bank.  My paycheck didn't go 
> through - both brother's signatures now required, check just had the one.  
> Could have been a disaster of bank charges.  First Interstate let me come 
> pick up the check, get the signature, and take it back to the bank the next 
> day.  No fees, no bounced checks, they just held the checks  "in processing". 
>  I sure wish First Interstate hadn't folded. 
> 
>   
> 
> Anyway, the way I look at, stuff happens.  People make mistakes. Do something 
> wrong or fail to do something right.  It's what they do about it that counts. 
>  It also counts a LOT when they care and when they make it right without a 
> bunch of wrangling about it.  
> 
>   
> 
> It's also important, IMHO to tell folks what a good job they've done - whe n 
> they do a good job.  And tell their boss.  I am sure that most bosses only 
> hear the bad stuff.  That's the wrong thing for customers to only say 
> something about the bad stuff.  My Mom used to ask to see the manager.  Folks 
> always asked what the problem was, looked worried or fearful.  I was in Fry's 
> a couple of weeks ago, buying my new 3TB Western Digital drive.  I received 
> exemplary service from one of the guys on the floor, so I said nice things 
> about him to his boss.  Could have knocked that boss over with a feather, and 
> that's a real shame. 
> 
> 
> 
>   
> 
> Linda
> 
> 
> 
> - Original Message -
> 
> 
> 
> 
> From: "Scott Ford"  
> To: IBM-MAIN@bama.ua.edu 
> Sent: Sunday, March 4, 2012 10:25:27 PM 
> Subject: Re: Customer Service, the good and the bad... 
> 
> Linda, 
> 
> Wow...think that's great 
> 
> Sent from my iPad 
> Scott Ford 
> Senior Systems Engineer 
> www.identityforge.com 
> 
> 
> 
> On Mar 5, 2012, at 1:14 AM, Linda Mooney  wrote: 
> 
>> Greetings! 
>> 
>> 
>> 
>> This happened to me a good while back, but it's worth remembering. 
>> 
>> 
>> 
>> I had a Western Digital PC hard drive fail three weeks before its warranty 
>> ran out.  They replaced the drive, no problem, and with a larger capacity 
>> drive because the drive I had was no longer being made. 
>> 
>> 
>> 
>> This is where it gets really special - 
>> 
>> I get the drive in , it works fine, so I start the restore from my tape 
>> backup, and the tape drive EATS the tape.  That tape backup had never given 
>> any problems before. 
>> 
>> 
>> 
>> Called Western Digital to see if they could do something.  The old drive had 
>> a large bid on it that was due to be released a week or so later.  They 
>> fixed the drive motor on the drive, overnighted it back to me, no charge.  
>> All they asked was that I send the old drive back to them again after 
>> copying my data off. They even included a postage paid label for that.   
>> 
>> 
>> 
>> All I did was to call them, explain the problem nicely and ask if there was 
>> there anything they could do for me.   
>> 
>> 
>> 
>> Linda 
>> 
>> 
>> 
>> - Original Message - 
>> 
>> 
>> From: "Gabe Goldberg"  
>> To: IBM-MAIN@bama.ua.edu 
>> Sent: Sunday, March 4, 2012 1:54:14 PM 
>> Subject: Re: Customer Service, the good and the bad... 
>> 
>> Long ago, a friend had an IBM PS/2. The monitor failed. 
>> 
>> Being a mainframer, she called hardware support -- the same number she'd 
>> call for a broken mainframe. IBM promptly dispatched a CE to her house; he 
>> replaced the monitor, cleaned up any mess, and departed in his unmarked 
>> white van. 
>> 
>> More recently, article I wrote about complaining -- mostly good news but 
>> some failures: 
>> http://archive.slickdeals.net/f/1979348-Creative-Griping-Makes-Friends-and-Brings-Rewards
>>  
>> 
>> And other interesting articles... 
>> 
>> "The Very Picky Customer" 
>> http://boss.blogs.nytimes.com/2011/07/27/the-very-picky-customer/ 
>> 
>> "What Satisfying Picky Customers Can Mean to a Business" 
>> http://boss.blogs.nytimes.com/2011/08/18/the-critical-5-percent-of-custom

Re: The Trainer's Friend goes Kindle - and you don't need to own a Kindle!

[Martin Packer]

The latter - a course page (which I had assumed would be a slide).

Thanks, Martin

Martin Packer,
Mainframe Performance Consultant, zChampion
Worldwide Banking Center of Excellence, IBM

+44-7802-245-584

email: martin_pac...@uk.ibm.com

Twitter / Facebook IDs: MartinPacker
Blog: 
https://www.ibm.com/developerworks/mydeveloperworks/blogs/MartinPacker



From:
Steve Comstock 
To:
IBM-MAIN@bama.ua.edu, 
Date:
06/03/2012 13:59
Subject:
Re: The Trainer's Friend goes Kindle - and you don't need to own a Kindle!
Sent by:
IBM Mainframe Discussion List 



On 3/6/2012 2:38 AM, Martin Packer wrote:
> Given Kindle doesn't have much of a notion of a page which HTML 
construct
> are you using to contain a slide?

What do you mean by 'slide'? If you mean an image, I use an img element

If you mean a page from a course, I build the page from a combination
of ul and li elements, using 'pre' tags for code (usually wrapped in
a div tag so I can set font information and draw a box around the code).


>
> Cheers, Martin
>
> Martin Packer,
> Mainframe Performance Consultant, zChampion
> Worldwide Banking Center of Excellence, IBM
>
> +44-7802-245-584
>
> email: martin_pac...@uk.ibm.com
>
> Twitter / Facebook IDs: MartinPacker
> Blog:
> https://www.ibm.com/developerworks/mydeveloperworks/blogs/MartinPacker
>
>
>
> From:
> Steve Comstock
> To:
> IBM-MAIN@bama.ua.edu,
> Date:
> 05/03/2012 21:56
> Subject:
> Re: The Trainer's Friend goes Kindle - and you don't need to own a 
Kindle!
> Sent by:
> IBM Mainframe Discussion List
>
>
>
> On 3/5/2012 2:19 PM, Sevetson, Phil wrote:
>> Steve, Speaking strictly for myself, I like the idea of buying your
> material
>> in
> Kindle format. However, I'm not an AJAX coder. What materials are
> next/soon in
> your push for this?
>>
>> --Phil Sevetson
>> DB2 z/OS DBA
>
> Well, maybe one or two more papers, then I'd like to try
> putting a course up. For courses, we'll probably package
> just one or two chapters per book so people can buy just
> the parts they want / need. Still debating amongst ourselves
> about whether any courses we put out will have labs or not.
>
> Not sure what content to put up first; happy to take suggestions.
>
>>
>> -Original Message-
>> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On
> Behalf Of Steve Comstock
>> Sent: Monday, March 05, 2012 12:05 PM
>> To: IBM-MAIN@bama.ua.edu
>> Subject: The Trainer's Friend goes Kindle - and you don't need to own a
> Kindle!
>>
>> Well, we're trying something new: looking at putting
>> content on Amazon.com for reading in Kindle's. The
>> details are below.
>>
>> But first, I want to point out right away: you don't
>> need to own a Kindle to read our content (or any other
>> eBook on Amazon, for that matter).
>>
>> * If you don't have a Kindle, you can download the
>>  Kindle app for PCs from Amazon; for free. There are
>>  also Kindle apps for iPhone, iPad, Android, Mac,
>>  and more.
>>
>>  This is pretty cool in and of itself. I think this
>>  requires you to establish a Kindle account (also
>>  free). If you have an Amazon account you can
>>  piggyback on that.
>>
>>  Go to:
>>
>>
> 
http://www.amazon.com/gp/feature.html/ref=sa_menu_karl3?ie=UTF8&docId=1000493771

>
>>
>>
>>  Alternatively, you can use the Kindle cloud reader and
>>  read Kindle books in your browser.
>>
>>  See:
>>
>> https://read.amazon.com/about
>>
>>
>> 
>>
>> So for right now, we're experimenting by putting some of
>> our free papers into Kindle format: first we write a
>> significant update to the paper, to add value; next we
>> convert the new version to Kindle format and publish
>> to Amazon in their eBook library.
>>
>> Our first foray into this brave new world is a major
>> rewrite of the paper "Coding AJAX Applications in z/OS":
>>
>> We've updated some content to reflect changes in the
>> RFC, we've added two new examples, including one that
>> uses POST and a php CGI to process the POSTed data;
>> I also made some editorial changes.
>>
>> The Amazon price is about 1/3 the price of just
>> purchasing the support files in our own Trainer's Friend
>> store, and the Amazon price _includes_ free access to
>> the support files, so you can download all the sample
>> HTML, COBOL source, and php source to experiment on your
>> own.
>>
>>
>> Check it out at http://www.amazon.com/dp/B007FY0EWI
>>
>>
>> Let us know what you think of this experiment.
>>
>
>


-- 

Kind regards,

-Steve Comstock
The Trainer's Friend, Inc.

303-355-2752
http://www.trainersfriend.com

* To get a good Return on your Investment, first make an investment!
   + Training your people is an excellent investment

* Try our tool for calculating your Return On Investment
 for training dollars at
   http://www.trainersfriend.com/ROI/roi.html

--
For IBM-MAIN subscribe / signoff / archive access instructions,
send emai

Re: IBM Announcement Letters

[Steve Comstock]

On 3/6/2012 5:41 AM, Mark Jacobs wrote:

Is anyone else getting '0' announcement letters this morning?



Not here; I got a few, looked at a couple, no problem.

--

Kind regards,

-Steve Comstock
The Trainer's Friend, Inc.

303-355-2752
http://www.trainersfriend.com

* To get a good Return on your Investment, first make an investment!
  + Training your people is an excellent investment

* Try our tool for calculating your Return On Investment
for training dollars at
  http://www.trainersfriend.com/ROI/roi.html

--
For IBM-MAIN subscribe / signoff / archive access instructions,
send email to lists...@bama.ua.edu with the message: INFO IBM-MAIN

Re: The Trainer's Friend goes Kindle - and you don't need to own a Kindle!

[Steve Comstock]

On 3/6/2012 2:38 AM, Martin Packer wrote:

Given Kindle doesn't have much of a notion of a page which HTML construct
are you using to contain a slide?


What do you mean by 'slide'? If you mean an image, I use an img element

If you mean a page from a course, I build the page from a combination
of ul and li elements, using 'pre' tags for code (usually wrapped in
a div tag so I can set font information and draw a box around the code).




Cheers, Martin

Martin Packer,
Mainframe Performance Consultant, zChampion
Worldwide Banking Center of Excellence, IBM

+44-7802-245-584

email: martin_pac...@uk.ibm.com

Twitter / Facebook IDs: MartinPacker
Blog:
https://www.ibm.com/developerworks/mydeveloperworks/blogs/MartinPacker



From:
Steve Comstock
To:
IBM-MAIN@bama.ua.edu,
Date:
05/03/2012 21:56
Subject:
Re: The Trainer's Friend goes Kindle - and you don't need to own a Kindle!
Sent by:
IBM Mainframe Discussion List



On 3/5/2012 2:19 PM, Sevetson, Phil wrote:

Steve, Speaking strictly for myself, I like the idea of buying your

material

in

Kindle format. However, I'm not an AJAX coder. What materials are
next/soon in
your push for this?


--Phil Sevetson
DB2 z/OS DBA


Well, maybe one or two more papers, then I'd like to try
putting a course up. For courses, we'll probably package
just one or two chapters per book so people can buy just
the parts they want / need. Still debating amongst ourselves
about whether any courses we put out will have labs or not.

Not sure what content to put up first; happy to take suggestions.



-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On

Behalf Of Steve Comstock

Sent: Monday, March 05, 2012 12:05 PM
To: IBM-MAIN@bama.ua.edu
Subject: The Trainer's Friend goes Kindle - and you don't need to own a

Kindle!


Well, we're trying something new: looking at putting
content on Amazon.com for reading in Kindle's. The
details are below.

But first, I want to point out right away: you don't
need to own a Kindle to read our content (or any other
eBook on Amazon, for that matter).

* If you don't have a Kindle, you can download the
 Kindle app for PCs from Amazon; for free. There are
 also Kindle apps for iPhone, iPad, Android, Mac,
 and more.

 This is pretty cool in and of itself. I think this
 requires you to establish a Kindle account (also
 free). If you have an Amazon account you can
 piggyback on that.

 Go to:



http://www.amazon.com/gp/feature.html/ref=sa_menu_karl3?ie=UTF8&docId=1000493771




 Alternatively, you can use the Kindle cloud reader and
 read Kindle books in your browser.

 See:

https://read.amazon.com/about




So for right now, we're experimenting by putting some of
our free papers into Kindle format: first we write a
significant update to the paper, to add value; next we
convert the new version to Kindle format and publish
to Amazon in their eBook library.

Our first foray into this brave new world is a major
rewrite of the paper "Coding AJAX Applications in z/OS":

We've updated some content to reflect changes in the
RFC, we've added two new examples, including one that
uses POST and a php CGI to process the POSTed data;
I also made some editorial changes.

The Amazon price is about 1/3 the price of just
purchasing the support files in our own Trainer's Friend
store, and the Amazon price _includes_ free access to
the support files, so you can download all the sample
HTML, COBOL source, and php source to experiment on your
own.


Check it out at http://www.amazon.com/dp/B007FY0EWI


Let us know what you think of this experiment.







--

Kind regards,

-Steve Comstock
The Trainer's Friend, Inc.

303-355-2752
http://www.trainersfriend.com

* To get a good Return on your Investment, first make an investment!
  + Training your people is an excellent investment

* Try our tool for calculating your Return On Investment
for training dollars at
  http://www.trainersfriend.com/ROI/roi.html

--
For IBM-MAIN subscribe / signoff / archive access instructions,
send email to lists...@bama.ua.edu with the message: INFO IBM-MAIN

Re: The Trainer's Friend goes Kindle - and you don't need to own a Kindle!

[Steve Comstock]

On 3/5/2012 7:11 PM, Shmuel Metz (Seymour J.) wrote:

In<4f54f245.9000...@trainersfriend.com>, on 03/05/2012
at 10:05 AM, Steve Comstock  said:


* If you don't have a Kindle, you can download the
   Kindle app for PCs


PC's with what operating system?



Windows: Win XP SP2 or later, Vista, Win 7

If you're running Linux your best bet is probably
the browser-based reader (the "cloud reader"); that
supports:

Firefox V6 or later on Mac/PC/Linux
Chrome V11 or later on Mac/PC/Linux/Chromebook
Safari V5 or later on Mac/PC
Safari on iPad (iOS 4 or later)



--

Kind regards,

-Steve Comstock
The Trainer's Friend, Inc.

303-355-2752
http://www.trainersfriend.com

* To get a good Return on your Investment, first make an investment!
  + Training your people is an excellent investment

* Try our tool for calculating your Return On Investment
for training dollars at
  http://www.trainersfriend.com/ROI/roi.html

--
For IBM-MAIN subscribe / signoff / archive access instructions,
send email to lists...@bama.ua.edu with the message: INFO IBM-MAIN

Re: IBM Announcement Letters

[Jan Vanbrabant]

Not with me in EMEA:

* Hardware*[image: *]IBM Express Portfolio is updated to include new System
x3500 M4 
models
[image: *]IBM Express Portfolio is updated to include new System x3550 M4
models
[image: *]IBM System x iDataPlex dx360 M4 server offers maximum performance
and efficiency with the latest Intel Xeon
processors
[image: *]IBM Express Portfolio is updated to include new System x
options
[image: *]IBM Express Portfolio is updated to include new IBM System x3650
M4 
models
[image: *]IBM zEnterprise and Unified Resource Manager
enhancements
[image: *]IBM ServeRAID M-Series products offer enterprise-class RAID
solutions to enhance server storage and enable use of both SAS and SATA
media
[image: *]IBM BladeCenter HS23 high-performance blade
server
[image: *]IBM System x3550 M4 server servers include Intel Xeon multicore
processors
[image: *]IBM System x3500 M4 tower servers feature fast 4C, 6C, and 8C
Intel Xeon processors with QPI and 10 MB, 15 MB, or 20 MB cache for
enhanced performance and
scalability
[image: *]IBM System x3650 M4 server model includes Intel E5-2600 multicore
processors
[image: *]The IBM BladeCenter HX5 now includes support for new
energy-efficient, high-performance 16 GB 1.35 V 4Rx4
RDIMM
[image: *]New IBM System x 2.5-inch and 3.5-inch SATA and SAS drives offer
highest performance options for optimizing storage and data management with
effectiveness for IBM System
x
* Software*[image: *]IBM TRIRIGA Connector for ESRI Geographic Information
System V10.2 adds a new chargeable component for non-production
environments
[image: *]IBM Informix Genero V2.40 brings a wealth of enhancements to
accelerate delivery of media rich
applications
[image: *]IBM Endpoint Manager for Mobile Devices V8.2 designed to deliver
comprehensive mobile device management
capabilities
* Services*[image: *]IBM ServicePac offer warranty and maintenance upgrades
for IBM System 
x
[image: *]IBM ServicePac offering - Essentials and Virtualized
Essentials
[image: *]IBM ServicePac offering - Maintenance Offerings for Multivendor
Server 
products
[image: *]Name change: Maintenance and Technical Support is now Technical
Support 
Services
[image: *]IBM ServicePac offers committed service warranty and maintenance
upgrades for IBM System
x
[image: *]IBM Proventia Network Security Controller support
update
* Withdrawals*[image: *]Service withdrawal: IBM Security selected products
from sale and 
support
* Summary of all IBM announcements for today*[image: *]Monthly Announcement
Summary - March 6,
2012
[image: *]Announcement Summary - March 6,
2012


jan
On Tue, Mar 6, 2012 at 1:56 PM, Bob Shannon wrote:

> I received an announcement letter this morning, but it was almost content
> free.
>
> Bob Shannon
> Rocket Software
>
> --

Re: IBM Announcement Letters

[Mark Jacobs]

On 03/06/12 07:56, Bob Shannon wrote:

I received an announcement letter this morning, but it was almost content free.

Bob Shannon
Rocket Software

--

   


I was looking at the IBM announcement letter website and there aren't 
any announcement letters, even historical letters aren't there today.


--
Mark Jacobs
Time Customer Service
Tampa, FL


Learn from yesterday, live for today, hope for tomorrow.
The important thing is to not stop questioning.

- Albert Einstein

--
For IBM-MAIN subscribe / signoff / archive access instructions,
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Re: TINC?

[Shmuel Metz (Seymour J.)]

In <041b8b70f0a2284f8468d78cb88f67a91ac75...@corp-msg-01.pfshq.com>,
on 03/05/2012
   at 10:06 AM, "Gross, Randall [GCG-PFS]" 
said:

>I worked one summer for a company that had a 256k 360/40 running MFT
>with (typically) 4  partitions.  Iirc, it took an IPL to reconfigure
>MFT.

>From IBM System/3S0 Operating System: MFT Guide, OS Release 21.7,
GC27-6939-10"

'Partitions are defined within the dynamic area, located in the upper
portion of main storage, at system generation. The number of
partitions may then be varied within the number specified at system
generation, and the sizes and job classes of partitions may be
redefined at system initialization or during operation.'

and

'Partition redefinition is invoked in either of two ways, depending on
whether it is to be invoked during or after system initialization. At
system initialization, the partition configuration may be changed by
replying "YES" to message IEE801D "CHANGE PARTITIONS?". Alternatively,
partition redefinition may be invoked after system initialization by
entering the operator command, DEFINE. The format of this command is
shown in the Operator's Reference publication.'
 
-- 
 Shmuel (Seymour J.) Metz, SysProg and JOAT
 ISO position; see  
We don't care. We don't have to care, we're Congress.
(S877: The Shut up and Eat Your spam act of 2003)

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Re: The Trainer's Friend goes Kindle - and you don't need to own a Kindle!

[Shmuel Metz (Seymour J.)]

In <4f54f245.9000...@trainersfriend.com>, on 03/05/2012
   at 10:05 AM, Steve Comstock  said:

>* If you don't have a Kindle, you can download the
>   Kindle app for PCs

PC's with what operating system?
 
-- 
 Shmuel (Seymour J.) Metz, SysProg and JOAT
 ISO position; see  
We don't care. We don't have to care, we're Congress.
(S877: The Shut up and Eat Your spam act of 2003)

--
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Re: IBM Announcement Letters

[Bob Shannon]

I received an announcement letter this morning, but it was almost content free.

Bob Shannon
Rocket Software

--
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IBM Announcement Letters

[Mark Jacobs]

Is anyone else getting '0' announcement letters this morning?

--
Mark Jacobs
Time Customer Service
Tampa, FL


Learn from yesterday, live for today, hope for tomorrow.
The important thing is to not stop questioning.

- Albert Einstein

--
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Re: Migrating to Z196

[R.S.]

My 2 cents:

1. PTF, aka service. Just be current, all required PTFs are quite old. 
If you really want to apply only part of applicable PTFs then use 
Fixcat, or 2817DEVICE.
Caution! If you're going to use crypto cards, then receive ICSF 
(- numerical part of your ICSF FMID).


2. FICON CRC. Nobody mentioned it here. IBM recently changed FICON 
protocol details. Result: older control units will NOT work with z196. 
What's funny, IBM cannot (doesn't want?) provide details, even list of 
IBM-branded compatible/incompatible CUs.


3. Again FICON 8Gbps. z196 have only 8G FICONs, such channel will NOT 
connect directly to 1Gbps device. Circumvention: you can connect such 
device to a switch (via 1,2,4 Gbps SFP) and the channel to the switch 
also (via 2,4,8 Gbps SFP).


4. HMC no longer use DVD-RAM for backups and other purposes. Now the 
only supported option is pendrive. Buy few pendrives, 4GB capacity is 
enough => you can buy really chip ones.


--
Radoslaw Skorupka
Lodz, Poland


--
Tre tej wiadomoci moe zawiera informacje prawnie chronione Banku 
przeznaczone wycznie do uytku subowego adresata. Odbiorc moe by jedynie 
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adresatowi, informujemy, e jej rozpowszechnianie, kopiowanie, rozprowadzanie 
lub inne dziaanie o podobnym charakterze jest prawnie zabronione i moe by 
karalne. Jeeli otrzymae t wiadomo omykowo, prosimy niezwocznie 
zawiadomi nadawc wysyajc odpowied oraz trwale usun t wiadomo 
wczajc w to wszelkie jej kopie wydrukowane lub zapisane na dysku.

This e-mail may contain legally privileged information of the Bank and is intended solely for business use of the addressee. This e-mail may only be received by the addressee and may not be disclosed to any third parties. If you are not the intended addressee of this e-mail or the employee authorised to forward it to the addressee, be advised that any dissemination, copying, distribution or any other similar activity is legally prohibited and may be punishable. If you received this e-mail by mistake please advise the sender immediately by using the reply facility in your e-mail software and delete permanently this e-mail including any copies of it either printed or saved to hard drive. 


BRE Bank SA, 00-950 Warszawa, ul. Senatorska 18, tel. +48 (22) 829 00 00, fax 
+48 (22) 829 00 33, www.brebank.pl, e-mail: i...@brebank.pl
Sd Rejonowy dla m. st. Warszawy XII Wydzia Gospodarczy Krajowego Rejestru Sdowego, nr rejestru przedsibiorców KRS 025237, NIP: 526-021-50-88. 
Wedug stanu na dzie 01.01.2012 r. kapita zakadowy BRE Banku SA (w caoci wpacony) wynosi 168.410.984 zotych.


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Re: Structure of PL/I V2.3-generated load modules?

[Lizette Koehler]

Try this bookshelf
http://publibz.boulder.ibm.com/cgi-bin/bookmgr_OS390/Shelves/IBMOSH05


Lizette

> On Mon, 5 Mar 2012 09:17:12 -0600, Craig Schneiderwent wrote:
> > PL/I documentation is available at
> > http://publibz.boulder.ibm.com/cgi-bin/bookmgr_OS390/Shelves/IBMSH320
> > [2].
> 
> Indeed it is - for almost all releases *after* V2R3 :-(
> 
> Did the V2R3 documentation make it into softcopy? If so, does anyone have a 
> copy
> they could send? Client is a properly licensed user etc.
> etc.
> 
> > You might want to contact the Edge folks at
> > http://www.edge-information.com/ [3].  they have a product that
> > analyzes executable code.  I believe File-Aid also does some of this,
> > and Roland Schiradin's COBANAL (in File 321 on the CBTTAPE site at
> > http://www.cbttape.org/ [4]) does too.   The latter originally just
> > did COBOL but now does much more.
> 
> I started out using COBANAL but found it too, er, quirky. I've got a 
> self-written
> analyzer here that reflects my view of how to do the job; I've not had much 
> PL/I to
> play with before so I'm dotting the i's and crossing the t's, if you like. 
> Most of it works
> quite well, even if I do say so myself.
> 
> Thanks for the reply!
> 
> Pete.

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Re: Migrating to Z196

[Lizette Koehler]

> 
> >
> > Hello,
> >
> > We are planning to migrate from Z10 to Z196. So are there any manuals
> which speaks
> > more on PSP bucket changes that is required during this migrations ?
> >
> >
> > Jake
> >
> 
> Jake,  very simply, go and down load your HOLDDATA and Receive all current
RSU
> maint.  Then run the FIXCAT for your device level, run the IBM Health
Checker.
> 
> Do your research.  Go to the IBM website and look a the PSP buckets for
your
> version/level of z/OS and other environmental variables (eg. Other
> hardware/software).  Check with your ISVs and go for it
> 
> Lizette
> 

One thing I forgot to mention.  You Service rep installing the z196 should
be able to help you with this process as well.  And if you are not sure what
to do, then perhaps your organization can provide you the training you need
to do these types of tasks.

Lizette

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Re: Structure of PL/I V2.3-generated load modules?

[codecrafters]

On Mon, 5 Mar 2012 09:17:12 -0600, Craig Schneiderwent wrote:

PL/I documentation is available at
http://publibz.boulder.ibm.com/cgi-bin/bookmgr_OS390/Shelves/IBMSH320
[2].


Indeed it is - for almost all releases *after* V2R3 :-(

Did the V2R3 documentation make it into softcopy? If so, does anyone 
have a copy they could send? Client is a properly licensed user etc. 
etc.



You might want to contact the Edge folks at
http://www.edge-information.com/ [3].  they have a product that
analyzes executable code.  I believe File-Aid also does some of this,
and Roland Schiradin's COBANAL (in File 321 on the CBTTAPE site at
http://www.cbttape.org/ [4]) does too.   The latter originally just
did COBOL but now does much more.


I started out using COBANAL but found it too, er, quirky. I've got a 
self-written analyzer here that reflects my view of how to do the job; 
I've not had much PL/I to play with before so I'm dotting the i's and 
crossing the t's, if you like. Most of it works quite well, even if I do 
say so myself.


Thanks for the reply!

Pete.

--
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Re: Migrating to Z196

[Lizette Koehler]

> 
> Hello,
> 
> We are planning to migrate from Z10 to Z196. So are there any manuals
which speaks
> more on PSP bucket changes that is required during this migrations ?
> 
> 
> Jake
> 

Jake,  very simply, go and down load your HOLDDATA and Receive all current
RSU maint.  Then run the FIXCAT for your device level, run the IBM Health
Checker.

Do your research.  Go to the IBM website and look a the PSP buckets for your
version/level of z/OS and other environmental variables (eg. Other
hardware/software).  Check with your ISVs and go for it

Lizette

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Re: IKT100I USERID CANCELED immediately after TN3270 connection fail

[Elardus Engelbrecht]

chen lucky wrote:

>I just want to know why my TSU address space was canceled duo to connection 
>failure.
>About this subject, look forward that I can get more help and can get it over 
>at end.

Is it a problem of one or many users?
One or many building / city / province?
Is it with a specific PC / Laptop / whatever?
Is it with a specific 3270 emulator?
Is it within a specific TCP/IP stack? TELNET server? VPN? network area?

More question: is it a 622 abend? Does the timeouts occur when your 
system/network is very busy? What exits are you using for your TCP/IP stacks 
and TELNET server?

How long is the session duration before timeouts? I know you said 
'immediately', but how long is 'immediately'? Anyway, you said later in this 
thread, the users could work a while while editing in view mode, hence my 
question above.

Is there some delay, hanging, keyboard locking? What is the emulator doing from 
logon until timeout?

Did you checked your HARDWARE? Routers? Control Units? Bad phone lines? etc?

If someone mentioned hardware problems and suggested a possible solution, I may 
have missed it. 

I could go on and on, but I'm not a network guru. :-)  
( I'm more of a RACF guy who likes to lock out my 'password-challenged' 
users... hehe... ;-D )

Groete / Greetings
Elardus Engelbrecht

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Re: One HSM; two VTS

[Brian Fraser]

No need for 2 SG. Just have one storage group, but define both libraries it
it.

On Tuesday, March 6, 2012, Gonzalo Cengotita  wrote:
> Hello,
>
> Does anyone of you have experience of one HSM distributed across two
> diferents libraries? I supose it's very simple, just change the Storage
> Group ACS routines to assign the two SG, but maybe I have to worry about
> something else?
>
> I can not distribute backup in one library and migration in the other
since
> we have a few backup volumes and a lot of migration volumes.
>
> Any ideas or document would be appreciated.
>
>
>
> --
> *
> *
> *Gonzalo Cengotita*
>
> --
> For IBM-MAIN subscribe / signoff / archive access instructions,
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>

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One HSM; two VTS

[Gonzalo Cengotita]

Hello,

Does anyone of you have experience of one HSM distributed across two
diferents libraries? I supose it's very simple, just change the Storage
Group ACS routines to assign the two SG, but maybe I have to worry about
something else?

I can not distribute backup in one library and migration in the other since
we have a few backup volumes and a lot of migration volumes.

Any ideas or document would be appreciated.



-- 
*
*
*Gonzalo Cengotita*

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Re: Customer Service, the good and the bad...

[Elardus Engelbrecht]

Shmuel Metz (Seymour J.) wrote:

>>"Five ways your customers say they are unhappy"
>>www.theregister.co.uk/2011/03/30/crm_customer_satisfaction/

>6. Leave.

>The best way to retain customers is to treat every customer as importamt; you 
>never know who has the ear of the CEO and you never know when one customer is 
>part of another.

Or do what Peter Cheales did: He just said: 'I WAS YOUR CUSTOMER'

He also created www.hellopeter.com where you can give compliments and 
complaints about good/bad services. While this website is mostly for South 
Africa, you can use it worldwide. 

This website is so popular, that if you said to a company's employee or clerk, 
'I'll hellopeter you and your company', you get reaction on your problem!

You use that website to lodge a complaint when all attempts to get a solution 
fails. There are at least 1670 companies which responds to 
compliments/complaints on that site.

>If you track the number of trouble tickets closed, it's important to track 
>whether the customer agrees with the closing. Quick closing of tickets for 
>unresolved problems will lose you customers.

Or having useless CRM system. (CRM - Customer Relation Management)

Groete / Greetings
Elardus Engelbrecht

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Re: The Trainer's Friend goes Kindle - and you don't need to own a Kindle!

[Martin Packer]

Given Kindle doesn't have much of a notion of a page which HTML construct 
are you using to contain a slide?

Cheers, Martin

Martin Packer,
Mainframe Performance Consultant, zChampion
Worldwide Banking Center of Excellence, IBM

+44-7802-245-584

email: martin_pac...@uk.ibm.com

Twitter / Facebook IDs: MartinPacker
Blog: 
https://www.ibm.com/developerworks/mydeveloperworks/blogs/MartinPacker



From:
Steve Comstock 
To:
IBM-MAIN@bama.ua.edu, 
Date:
05/03/2012 21:56
Subject:
Re: The Trainer's Friend goes Kindle - and you don't need to own a Kindle!
Sent by:
IBM Mainframe Discussion List 



On 3/5/2012 2:19 PM, Sevetson, Phil wrote:
> Steve, Speaking strictly for myself, I like the idea of buying your 
material
> in
Kindle format. However, I'm not an AJAX coder. What materials are 
next/soon in
your push for this?
>
> --Phil Sevetson
> DB2 z/OS DBA

Well, maybe one or two more papers, then I'd like to try
putting a course up. For courses, we'll probably package
just one or two chapters per book so people can buy just
the parts they want / need. Still debating amongst ourselves
about whether any courses we put out will have labs or not.

Not sure what content to put up first; happy to take suggestions.

>
> -Original Message-
> From: IBM Mainframe Discussion List [mailto:IBM-MAIN@bama.ua.edu] On 
Behalf Of Steve Comstock
> Sent: Monday, March 05, 2012 12:05 PM
> To: IBM-MAIN@bama.ua.edu
> Subject: The Trainer's Friend goes Kindle - and you don't need to own a 
Kindle!
>
> Well, we're trying something new: looking at putting
> content on Amazon.com for reading in Kindle's. The
> details are below.
>
> But first, I want to point out right away: you don't
> need to own a Kindle to read our content (or any other
> eBook on Amazon, for that matter).
>
> * If you don't have a Kindle, you can download the
> Kindle app for PCs from Amazon; for free. There are
> also Kindle apps for iPhone, iPad, Android, Mac,
> and more.
>
> This is pretty cool in and of itself. I think this
> requires you to establish a Kindle account (also
> free). If you have an Amazon account you can
> piggyback on that.
>
> Go to:
>
> 
http://www.amazon.com/gp/feature.html/ref=sa_menu_karl3?ie=UTF8&docId=1000493771

>
>
> Alternatively, you can use the Kindle cloud reader and
> read Kindle books in your browser.
>
> See:
>
> https://read.amazon.com/about
>
>
> 
>
> So for right now, we're experimenting by putting some of
> our free papers into Kindle format: first we write a
> significant update to the paper, to add value; next we
> convert the new version to Kindle format and publish
> to Amazon in their eBook library.
>
> Our first foray into this brave new world is a major
> rewrite of the paper "Coding AJAX Applications in z/OS":
>
> We've updated some content to reflect changes in the
> RFC, we've added two new examples, including one that
> uses POST and a php CGI to process the POSTed data;
> I also made some editorial changes.
>
> The Amazon price is about 1/3 the price of just
> purchasing the support files in our own Trainer's Friend
> store, and the Amazon price _includes_ free access to
> the support files, so you can download all the sample
> HTML, COBOL source, and php source to experiment on your
> own.
>
>
> Check it out at http://www.amazon.com/dp/B007FY0EWI
>
>
> Let us know what you think of this experiment.
>


-- 

Kind regards,

-Steve Comstock
The Trainer's Friend, Inc.

303-355-2752
http://www.trainersfriend.com

* To get a good Return on your Investment, first make an investment!
   + Training your people is an excellent investment

* Try our tool for calculating your Return On Investment
 for training dollars at
   http://www.trainersfriend.com/ROI/roi.html

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Re: Migrating to Z196

[Brian Westerman]

We have migrated several sites from z/9 and z/10 to z/196's and z/114's so far. 
 Whether or not you will need to do a lot of work will depend more on what 
release of the OS you are at.  You can contact me offline if you have 
questions, or here if you don't mind letting other people chime in as well.  It 
probably would be helpful to have a thread for people to search through later 
as more an more people convert.

Brian


On Mon, 5 Mar 2012 21:27:45 -0800, Skip Robinson  
wrote:

>Just toddled down this path. Run SMP/E FIXCAT report for
>
>   IBM.Device.Server.z196-*
>
>against every z/OS level that you will run on the new CEC(s). It worked
>for us.
>
>.
>.
>JO.Skip Robinson
>SCE Infrastructure Technology Services
>Electric Dragon Team Paddler
>SHARE MVS Program Co-Manager
>626-302-7535 Office
>323-715-0595 Mobile
>jo.skip.robin...@sce.com
>
>
>
>From:   Jake anderson 
>To: IBM-MAIN@bama.ua.edu
>Date:   03/05/2012 08:38 PM
>Subject:Migrating to Z196
>Sent by:IBM Mainframe Discussion List 
>
>
>
>Hello,
>
>We are planning to migrate from Z10 to Z196. So are there any manuals
>which
>speaks more on PSP bucket changes that is required during this migrations
>?
>
>
>Jake
>
>
>
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