Re: [U-Boot] [PATCH v2] usb: fix usb_stor_read/write on DM

[Benoît Thébaudeau]

On Sat, Jul 15, 2017 at 12:06 AM, Marek Vasut  wrote:
> On 07/14/2017 11:46 PM, Benoît Thébaudeau wrote:
>> On Fri, Jul 14, 2017 at 1:50 PM, Marek Vasut  wrote:
>>> On 07/14/2017 01:03 PM, Masahiro Yamada wrote:
 2017-07-14 19:07 GMT+09:00 Marek Vasut :
> On 07/14/2017 04:31 AM, Masahiro Yamada wrote:
>> Prior to DM, we could not enable different types of USB controllers
>> at the same time.  DM was supposed to loosen the limitation.  It is
>> true that we can compile drivers, but they do not work.
>>
>> For example, if EHCI is enabled, xHCI fails as follows:
>>
>>   => usb read 8200 0 2000
>>
>>   USB read: device 0 block # 0, count 8192 ... WARN halted endpoint, 
>> queueing URB anyway.
>>   Unexpected XHCI event TRB, skipping... (3fb54010 0001 1300 
>> 01008401)
>>   BUG: failure at drivers/usb/host/xhci-ring.c:489/abort_td()!
>>   BUG!
>>   ### ERROR ### Please RESET the board ###
>>
>> The cause of the error seems the following code:
>>
>>   #ifdef CONFIG_USB_EHCI_HCD
>>   /*
>>* The U-Boot EHCI driver can handle any transfer length as long as 
>> there is
>>* enough free heap space left, but the SCSI READ(10) and WRITE(10) 
>> commands are
>>* limited to 65535 blocks.
>>*/
>>   #define USB_MAX_XFER_BLK65535
>>   #else
>>   #define USB_MAX_XFER_BLK20
>>   #endif
>>
>> To fix the problem, choose the chunk size at run-time for CONFIG_BLK.
>
> What happens if CONFIG_BLK is not set ?

 USB_MAX_XFER_BLK is chosen.
>>>
>>> And can we fix that even for non-CONFIG_BLK ?
>>>
> Why is it 20 for XHCI anyway ?

 You are the maintainer.
 (I hope) you have better knowledge with this.
>>>
>>> Heh, way to deflect the question. I seem to remember some discussion
>>> about the DMA (?) limitation on XHCI, but I'd have to dig through the ML
>>> archives myself.
>>>
 Looks like the following commit was picked up by you.
>>>
>>> 5 years ago, way before DM was what it is today .
>>
>> And even way before the introduction of XHCI into U-Boot, which means
>> that this 20 was targeting OHCI or proprietary HCDs, not XHCI.
>> USB_MAX_READ_BLK was already set to 20 in the initial revision of
>> usb_storage.c. As I said in the commit message, this 20 was certainly
>> not optimal for these non-EHCI HCDs, but it restored the previous
>> (i.e. pre-5dd95cf) behavior for these HCDs instead of using the 5 * 4
>> KiB code, which was specific to ehci-hcd.c at that time. Without
>> knowing the rationale for the legacy 20 blocks, the safest approach
>> for non-EHCI HCDs was to use this value in order to avoid breaking a
>> platform or something. Looking at ohci-hcd.c, it limits the transfer
>> size to (N_URB_TD - 2) * 4 KiB, with N_URB_TD set to 48, so the
>> maximum number of transfers would depend on the MSC block size.
>> dwc2.c, isp116x-hcd.c, r8a66597-hcd.c, and sl811-hcd.c do not seem to
>> have any limit caused by these drivers. The limit with the current
>> XHCI code seems to be 64 * 64 KiB. So, nowadays, USB_MAX_XFER_BLK
>> could be set to 65535 for all HCDs but OHCI and XHCI, which require
>> specific rules depending on the MSC block size.
>
> For whatever reason, something tells me that setting the block size to
> 64k for XHCI broke things, but I cannot locate the thread. But there's
> something in the back of my head ...

Indeed: according to what I said above, USB_MAX_XFER_BLK cannot be set
to 65535 for XHCI. With an MSC block size of blksz = 512 bytes /
block, USB_MAX_XFER_BLK can be set to at most 1 segment *
(TRBS_PER_SEGMENT = 64 TRBs / segment) * (TRB_MAX_BUFF_SIZE = 65536
bytes / TRB) / blksz = 8192 blocks for XHCI. And for OHCI, the limit
is (N_URB_TD - 2 = 46 TDs) * (4096 bytes / TD) / blksz = 368 blocks.
The buffer alignment may also have to be taken into account to adjust
these values, which would require a USB_MAX_XFER_BLK(host_if, start,
blksz) macro or function. USB_MAX_XFER_BLK can however be set to 65535
regardless of blksz for all the other HCDs (i.e. EHCI, dwc2.c,
isp116x-hcd.c, r8a66597-hcd.c, and sl811-hcd.c).

Best regards,
Benoît
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Re: [U-Boot] [PATCH] spl: dm: Make it possible for the SPL to pick its own DTB from a FIT

[Simon Glass]

Hi Jean-Jacques,

On 12 July 2017 at 15:32, Simon Glass  wrote:
> Hi,
>
> On 12 July 2017 at 06:58, Jean-Jacques Hiblot  wrote:
>>
>>
>> On 10/07/2017 18:34, Franklin S Cooper Jr wrote:
>>>
>>>
>>> On 07/07/2017 10:00 AM, Jean-Jacques Hiblot wrote:


 On 07/07/2017 16:30, Tom Rini wrote:
>
> On Fri, Jul 07, 2017 at 01:44:39PM +0200, Jean-Jacques Hiblot wrote:
>
>> u-boot can be embedded within a FIT image with multiple DTBs. It then
>> selects at run-time  which one is best suited for the platform.
>> Use the same principle here for the SPL: put the DTBs in a FIT image,
>> compress it (LZO, GZIP, or no compression) and append it at the end
>> of the
>> SPL.
>>
>> Signed-off-by: Jean-Jacques Hiblot 
>> ---
>>
>> The impact in terms of boot time is not high when using LZO but I
>> gues it can vary
>> from platform to platform.
>> The size of the SPL binary is increased (1.5kB more code on ARM), but
>> the compression
>> really flattens the DTBS. so at the end of the day, enabling this
>> option doesn't add much.
>>
>> Here are some sumbers with a DRA7 platform (numbers in bytes):
>> size  delta with ref
>> MLO.reference 123450
>> MLO.lzo_1_DTB 123715+265
>> MLO.lzo_4_DTB 124237+787
>> MLO.gzip_4_DTB132006+8556
>> MLO.no_comp_4_DTB 134184+10734
>>>
>>> It would great if you can show the difference in time between todays,
>>> approach, your FIT approach gzipped and your FIT approach using lzo in
>>> terms of time between power on to SPL handling things off to U-boot.
>>
>> I'll add the measurements in the next version.
>>>
>>> Also would it make sense to sacrifice saving some space by not
>>> compressing the entire FIT but instead compressing dtbs individually and
>>> storing it in an uncompressed FIT? This way any additional boot time is
>>> limited to uncompressing the DTB you need. It would be especially
>>> helpful in the case of a large amount of dtbs being stored, slower
>>> devices, or using compression algorithms that save more space but its
>>> decompression is slower.
>>
>> It makes sense. I'll look into it.
>> I wasn't aware of your work in this area (CONFIG_FIT_EMBED). Now that is in
>> mainline u-boot, I'll leverage on it as it mostly does the same thing.
>> At the end, I may just end up removing the restriction that prevents using
>> CONFIG_FIT_EMBED in the SPL and move the decompression stage at the very end
>> of fdtdec_setup()
>
> I am not too keen on CONFIG_FIT_EMBED as a name since it is similar to
> CONFIG_OF_EMBED.  Can we perhaps rename it, e.g. to
> CONFIG_OF_INSIDE_FIT? That's not a great name, maybe you can think of
> something better.

Also on the patch itself a few comments:

- can you split out the lb/Makefile changes into a separate patch?
- Would it be better to use fit_image_load() to reduce code duplication?
- blablablabla needs more detail :-)

Regards,
Simon

>
>>
>> JJ
>>
>>>
> Bearing in mind that you said in a follow up this is RFC, I'm ignoring
> all of the stuff that I believe you would fix in a v1.  At the heart of
> it, are you able to tell different boards before you have a DTB loaded?

 In my case (DRA7) the board can be identified before the dtb is loaded.
 The identification
 is done by reading an eeprom on I2c. It just can't be using DM I2C in
 the SPL.
>
> I keep coming back to the problem that for SPL it seems like we should
> be able to do what Franklin did for keystone
> (https://patchwork.ozlabs.org/patch/777242/) and have a 'fake' dts file
> that represents the SoC such that any real boards can get U-Boot loaded
> and from there have the real board dtb be used.  Or am I forgetting
> something?  Thanks!

 That's more or less the situation now with DRA7. This idea comes from
 the need to accelerate the fastboot path by using the HS200 mode of the
 eMMC. There we need to configure the lines of the eMMC and this
 information is typically found in the DTB and differs from SOC to SOC.
 At the moment in the ti tree this is done by duplicating this
 information in C structures protected with #ifdef CONFIG_SPL_BUILD.
 While this works, it would be nicer to get it from the dtb as done in
 u-boot.
>>>
>>> Yeah I think thats the toughest thing with my approach. It only works in
>>> situations where loading the "next stage" is consistent between boards.
>>> In my case Keystone doesn't use SPL so I benefited from the ROM handling
>>> any board specific logic to load U-boot. Not sure if it will work well
>>> in SPL since loading U-boot can vary quite a bit.

 Jean-Jacques
>>
>>
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Re: [U-Boot] [PATCH v2] usb: fix usb_stor_read/write on DM

[Marek Vasut]

On 07/14/2017 11:46 PM, Benoît Thébaudeau wrote:
> On Fri, Jul 14, 2017 at 1:50 PM, Marek Vasut  wrote:
>> On 07/14/2017 01:03 PM, Masahiro Yamada wrote:
>>> 2017-07-14 19:07 GMT+09:00 Marek Vasut :
 On 07/14/2017 04:31 AM, Masahiro Yamada wrote:
> Prior to DM, we could not enable different types of USB controllers
> at the same time.  DM was supposed to loosen the limitation.  It is
> true that we can compile drivers, but they do not work.
>
> For example, if EHCI is enabled, xHCI fails as follows:
>
>   => usb read 8200 0 2000
>
>   USB read: device 0 block # 0, count 8192 ... WARN halted endpoint, 
> queueing URB anyway.
>   Unexpected XHCI event TRB, skipping... (3fb54010 0001 1300 
> 01008401)
>   BUG: failure at drivers/usb/host/xhci-ring.c:489/abort_td()!
>   BUG!
>   ### ERROR ### Please RESET the board ###
>
> The cause of the error seems the following code:
>
>   #ifdef CONFIG_USB_EHCI_HCD
>   /*
>* The U-Boot EHCI driver can handle any transfer length as long as 
> there is
>* enough free heap space left, but the SCSI READ(10) and WRITE(10) 
> commands are
>* limited to 65535 blocks.
>*/
>   #define USB_MAX_XFER_BLK65535
>   #else
>   #define USB_MAX_XFER_BLK20
>   #endif
>
> To fix the problem, choose the chunk size at run-time for CONFIG_BLK.

 What happens if CONFIG_BLK is not set ?
>>>
>>> USB_MAX_XFER_BLK is chosen.
>>
>> And can we fix that even for non-CONFIG_BLK ?
>>
 Why is it 20 for XHCI anyway ?
>>>
>>> You are the maintainer.
>>> (I hope) you have better knowledge with this.
>>
>> Heh, way to deflect the question. I seem to remember some discussion
>> about the DMA (?) limitation on XHCI, but I'd have to dig through the ML
>> archives myself.
>>
>>> Looks like the following commit was picked up by you.
>>
>> 5 years ago, way before DM was what it is today .
> 
> And even way before the introduction of XHCI into U-Boot, which means
> that this 20 was targeting OHCI or proprietary HCDs, not XHCI.
> USB_MAX_READ_BLK was already set to 20 in the initial revision of
> usb_storage.c. As I said in the commit message, this 20 was certainly
> not optimal for these non-EHCI HCDs, but it restored the previous
> (i.e. pre-5dd95cf) behavior for these HCDs instead of using the 5 * 4
> KiB code, which was specific to ehci-hcd.c at that time. Without
> knowing the rationale for the legacy 20 blocks, the safest approach
> for non-EHCI HCDs was to use this value in order to avoid breaking a
> platform or something. Looking at ohci-hcd.c, it limits the transfer
> size to (N_URB_TD - 2) * 4 KiB, with N_URB_TD set to 48, so the
> maximum number of transfers would depend on the MSC block size.
> dwc2.c, isp116x-hcd.c, r8a66597-hcd.c, and sl811-hcd.c do not seem to
> have any limit caused by these drivers. The limit with the current
> XHCI code seems to be 64 * 64 KiB. So, nowadays, USB_MAX_XFER_BLK
> could be set to 65535 for all HCDs but OHCI and XHCI, which require
> specific rules depending on the MSC block size.

For whatever reason, something tells me that setting the block size to
64k for XHCI broke things, but I cannot locate the thread. But there's
something in the back of my head ...

[...]

-- 
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH v2] usb: fix usb_stor_read/write on DM

[Benoît Thébaudeau]

On Fri, Jul 14, 2017 at 1:50 PM, Marek Vasut  wrote:
> On 07/14/2017 01:03 PM, Masahiro Yamada wrote:
>> 2017-07-14 19:07 GMT+09:00 Marek Vasut :
>>> On 07/14/2017 04:31 AM, Masahiro Yamada wrote:
 Prior to DM, we could not enable different types of USB controllers
 at the same time.  DM was supposed to loosen the limitation.  It is
 true that we can compile drivers, but they do not work.

 For example, if EHCI is enabled, xHCI fails as follows:

   => usb read 8200 0 2000

   USB read: device 0 block # 0, count 8192 ... WARN halted endpoint, 
 queueing URB anyway.
   Unexpected XHCI event TRB, skipping... (3fb54010 0001 1300 
 01008401)
   BUG: failure at drivers/usb/host/xhci-ring.c:489/abort_td()!
   BUG!
   ### ERROR ### Please RESET the board ###

 The cause of the error seems the following code:

   #ifdef CONFIG_USB_EHCI_HCD
   /*
* The U-Boot EHCI driver can handle any transfer length as long as 
 there is
* enough free heap space left, but the SCSI READ(10) and WRITE(10) 
 commands are
* limited to 65535 blocks.
*/
   #define USB_MAX_XFER_BLK65535
   #else
   #define USB_MAX_XFER_BLK20
   #endif

 To fix the problem, choose the chunk size at run-time for CONFIG_BLK.
>>>
>>> What happens if CONFIG_BLK is not set ?
>>
>> USB_MAX_XFER_BLK is chosen.
>
> And can we fix that even for non-CONFIG_BLK ?
>
>>> Why is it 20 for XHCI anyway ?
>>
>> You are the maintainer.
>> (I hope) you have better knowledge with this.
>
> Heh, way to deflect the question. I seem to remember some discussion
> about the DMA (?) limitation on XHCI, but I'd have to dig through the ML
> archives myself.
>
>> Looks like the following commit was picked up by you.
>
> 5 years ago, way before DM was what it is today .

And even way before the introduction of XHCI into U-Boot, which means
that this 20 was targeting OHCI or proprietary HCDs, not XHCI.
USB_MAX_READ_BLK was already set to 20 in the initial revision of
usb_storage.c. As I said in the commit message, this 20 was certainly
not optimal for these non-EHCI HCDs, but it restored the previous
(i.e. pre-5dd95cf) behavior for these HCDs instead of using the 5 * 4
KiB code, which was specific to ehci-hcd.c at that time. Without
knowing the rationale for the legacy 20 blocks, the safest approach
for non-EHCI HCDs was to use this value in order to avoid breaking a
platform or something. Looking at ohci-hcd.c, it limits the transfer
size to (N_URB_TD - 2) * 4 KiB, with N_URB_TD set to 48, so the
maximum number of transfers would depend on the MSC block size.
dwc2.c, isp116x-hcd.c, r8a66597-hcd.c, and sl811-hcd.c do not seem to
have any limit caused by these drivers. The limit with the current
XHCI code seems to be 64 * 64 KiB. So, nowadays, USB_MAX_XFER_BLK
could be set to 65535 for all HCDs but OHCI and XHCI, which require
specific rules depending on the MSC block size.

>> commit cffcc503580907d733e694d505e12ff6ec6c679a
>> Author: Benoît Thébaudeau 
>> AuthorDate: Fri Aug 10 18:26:50 2012 +0200
>> Commit: Marek Vasut 
>> CommitDate: Sat Sep 1 16:21:52 2012 +0200
>>
>> usb_storage: Restore non-EHCI support
>>
>> The commit 5dd95cf made the MSC driver EHCI-specific. This patch 
>> restores a
>> basic support of non-EHCI HCDs, like before that commit.
>>
>> The fallback transfer size is certainly not optimal, but at least
>> it should work
>> like before.
>>
>> Signed-off-by: Benoît Thébaudeau 
>> Cc: Marek Vasut 
>> Cc: Ilya Yanok 
>> Cc: Stefan Herbrechtsmeier 
>>
>> diff --git a/common/usb_storage.c b/common/usb_storage.c
>> index bdc306f587fd..0cd6399a3c42 100644
>> --- a/common/usb_storage.c
>> +++ b/common/usb_storage.c
>> @@ -155,11 +155,15 @@ struct us_data {
>> trans_cmnd  transport;  /* transport routine */
>>  };
>>
>> +#ifdef CONFIG_USB_EHCI
>>  /*
>>   * The U-Boot EHCI driver cannot handle more than 5 page aligned buffers
>>   * of 4096 bytes in a transfer without running itself out of qt_buffers
>>   */
>>  #define USB_MAX_XFER_BLK(start, blksz) (((4096 * 5) - (start % 4096)) / 
>> blksz)
>> +#else
>> +#define USB_MAX_XFER_BLK(start, blksz) 20
>> +#endif
>>
>>  static struct us_data usb_stor[USB_MAX_STOR_DEV];

Best regards,
Benoît
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[U-Boot] [PATCH] m68k: add board stmark2, mcf5441x based

[Angelo Dureghello]

Signed-off-by: Angelo Dureghello 
---
 arch/m68k/Kconfig   |   5 +
 board/sysam/stmark2/Kconfig |  15 +++
 board/sysam/stmark2/MAINTAINERS |   6 ++
 board/sysam/stmark2/Makefile|   8 ++
 board/sysam/stmark2/sbf_dram_init.S | 119 +
 board/sysam/stmark2/stmark2.c   |  47 +
 configs/stmark2_defconfig   |  26 +
 include/configs/stmark2.h   | 202 
 scripts/config_whitelist.txt|   1 +
 9 files changed, 429 insertions(+)
 create mode 100644 board/sysam/stmark2/Kconfig
 create mode 100644 board/sysam/stmark2/MAINTAINERS
 create mode 100644 board/sysam/stmark2/Makefile
 create mode 100644 board/sysam/stmark2/sbf_dram_init.S
 create mode 100644 board/sysam/stmark2/stmark2.c
 create mode 100644 configs/stmark2_defconfig
 create mode 100644 include/configs/stmark2.h

diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index 26509b73c6..42fb91539a 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -200,6 +200,10 @@ config TARGET_AMCORE
bool "Support AMCORE"
select M5307
 
+config TARGET_STMARK2
+bool "Support stmark2"
+select M54418
+
 endchoice
 
 source "board/BuS/eb_cpu5282/Kconfig"
@@ -223,5 +227,6 @@ source "board/freescale/m54455evb/Kconfig"
 source "board/freescale/m547xevb/Kconfig"
 source "board/freescale/m548xevb/Kconfig"
 source "board/sysam/amcore/Kconfig"
+source "board/sysam/stmark2/Kconfig"
 
 endmenu
diff --git a/board/sysam/stmark2/Kconfig b/board/sysam/stmark2/Kconfig
new file mode 100644
index 00..87ab7ab7b5
--- /dev/null
+++ b/board/sysam/stmark2/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_STMARK2
+
+config SYS_CPU
+   default "mcf5445x"
+
+config SYS_BOARD
+   default "stmark2"
+
+config SYS_VENDOR
+   default "sysam"
+
+config SYS_CONFIG_NAME
+   default "stmark2"
+
+endif
diff --git a/board/sysam/stmark2/MAINTAINERS b/board/sysam/stmark2/MAINTAINERS
new file mode 100644
index 00..b87f432bb3
--- /dev/null
+++ b/board/sysam/stmark2/MAINTAINERS
@@ -0,0 +1,6 @@
+STMARK2 BOARD
+M: Angelo Dureghello 
+S: Maintained
+F: board/sysam/stmark2/
+F: include/configs/stmark2.h
+F: configs/stmark2_defconfig
diff --git a/board/sysam/stmark2/Makefile b/board/sysam/stmark2/Makefile
new file mode 100644
index 00..064a57ea05
--- /dev/null
+++ b/board/sysam/stmark2/Makefile
@@ -0,0 +1,8 @@
+#
+# (C) Copyright 2014  Angelo Dureghello 
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y = stmark2.o
+extra-y += sbf_dram_init.o
diff --git a/board/sysam/stmark2/sbf_dram_init.S 
b/board/sysam/stmark2/sbf_dram_init.S
new file mode 100644
index 00..52abda5c3c
--- /dev/null
+++ b/board/sysam/stmark2/sbf_dram_init.S
@@ -0,0 +1,119 @@
+/*
+ * Board-specific early ddr/sdram init.
+ *
+ * (C) Copyright 2017 Angelo Dureghello 
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+.equ   PPMCR0, 0xfc04002d
+.equ   MSCR_SDRAMC,0xec094060
+.equ   MISCCR2,0xec09001a
+.equ   DDR_RCR,0xfc0b8180
+.equ   DDR_PADCR,  0xfc0b81ac
+.equ   DDR_CR00,   0xfc0b8000
+.equ   DDR_CR06,   0xfc0b8018
+.equ   DDR_CR09,   0xfc0b8024
+.equ   DDR_CR40,   0xfc0b80a0
+.equ   DDR_CR45,   0xfc0b80b4
+.equ   DDR_CR56,   0xfc0b80e0
+
+.global sbf_dram_init
+.text
+
+sbf_dram_init:
+   /* CD46 = DDR on */
+   move.l  #PPMCR0, %a1
+   move.b  #46, (%a1)
+
+   /* stmark 2, max drive strength */
+   move.l  #MSCR_SDRAMC, %a1
+   move.b  #1, (%a1)
+
+   /*
+* use cpu clock, seems more realiable
+*
+* DDR2 clock is serviced from DDR controller as input clock / 2
+* so, if clock comes from
+*   vco, i.e. 480(vco) / 2, so ddr clock is 240 Mhz (measured)
+*   cpu, i.e. 250(cpu) / 2, so ddr clock is 125 Mhz (measured)
+*
+* .
+*/ \DDR2 can't be clocked lower than 125Mhz
+*   / ! \   DDR2 init must pass further i/dcache enable test
+*  /_\
+*  WARNING
+*/
+
+   /* cpu / 2 = 125 Mhz for 480 Mhz pll */
+   move.l  #MISCCR2, %a1
+   move.w  #0xa01d, (%a1)
+
+   /* DDR force sw reset settings */
+   move.l  #DDR_RCR, %a1
+   move.l  #0x, (%a1)
+   move.l  #0x4000, (%a1)
+
+   /*
+* PAD_ODT_CS: for us seems both 1(75 ohm) and 2(150ohm) are good,
+* 500/700 mV are ok
+*/
+   move.l  #DDR_PADCR, %a1
+   move.l  #0x01030203, (%a1)  /* as freescale tower */
+
+   move.l  #DDR_CR00, %a1
+   move.l  #0x01010101, (%a1)+ /* 0x00 */
+   move.l  #0x0101, (%a1)+ /* 0x04 */
+   move.l  #0x01010100, (%a1)+ /* 0x08 */
+   move.l  #0x0101, (%a1)+ /* 0x0C */
+   move.l  #0x00010101, (%a1)+ /* 0x10 */
+   move.l  #DDR_CR06, %a1
+   move.l  #0x00010100, (%a1)+ /* 0x18 */
+   move.l  #0x0001, (%a1)+ /* 0x1C */
+  

[U-Boot] [PATCH] m68k: fix cache.c for Coldfire V4E

[Angelo Dureghello]

- fix cache.c CONFIG_CF_V4e to CONFIG_CF_V4E
- fix cache.c to properly enable/disable cache for V4E

Signed-off-by: Angelo Dureghello 
---
 arch/m68k/lib/cache.c | 25 +
 1 file changed, 13 insertions(+), 12 deletions(-)

diff --git a/arch/m68k/lib/cache.c b/arch/m68k/lib/cache.c
index ace791beb1..a8a292b77e 100644
--- a/arch/m68k/lib/cache.c
+++ b/arch/m68k/lib/cache.c
@@ -33,12 +33,13 @@ void icache_enable(void)
 
*cf_icache_status = 1;
 
-#ifdef CONFIG_CF_V4
+#if defined(CONFIG_CF_V4) || defined(CONFIG_CF_V4E)
__asm__ __volatile__("movec %0, %%acr2"::"r"(CONFIG_SYS_CACHE_ACR2));
__asm__ __volatile__("movec %0, %%acr3"::"r"(CONFIG_SYS_CACHE_ACR3));
-#elif defined(CONFIG_CF_V4e)
+#if defined(CONFIG_CF_V4E)
__asm__ __volatile__("movec %0, %%acr6"::"r"(CONFIG_SYS_CACHE_ACR6));
__asm__ __volatile__("movec %0, %%acr7"::"r"(CONFIG_SYS_CACHE_ACR7));
+#endif
 #else
__asm__ __volatile__("movec %0, %%acr0"::"r"(CONFIG_SYS_CACHE_ACR0));
__asm__ __volatile__("movec %0, %%acr1"::"r"(CONFIG_SYS_CACHE_ACR1));
@@ -54,16 +55,16 @@ void icache_disable(void)
*cf_icache_status = 0;
icache_invalid();
 
-#ifdef CONFIG_CF_V4
+#if defined(CONFIG_CF_V4) || defined(CONFIG_CF_V4E)
__asm__ __volatile__("movec %0, %%acr2"::"r"(temp));
__asm__ __volatile__("movec %0, %%acr3"::"r"(temp));
-#elif defined(CONFIG_CF_V4e)
+#if defined(CONFIG_CF_V4E)
__asm__ __volatile__("movec %0, %%acr6"::"r"(temp));
__asm__ __volatile__("movec %0, %%acr7"::"r"(temp));
+#endif
 #else
__asm__ __volatile__("movec %0, %%acr0"::"r"(temp));
__asm__ __volatile__("movec %0, %%acr1"::"r"(temp));
-
 #endif
 }
 
@@ -87,13 +88,13 @@ void dcache_enable(void)
dcache_invalid();
*cf_dcache_status = 1;
 
-#ifdef CONFIG_CF_V4
+#if defined(CONFIG_CF_V4) || defined(CONFIG_CF_V4E)
__asm__ __volatile__("movec %0, %%acr0"::"r"(CONFIG_SYS_CACHE_ACR0));
__asm__ __volatile__("movec %0, %%acr1"::"r"(CONFIG_SYS_CACHE_ACR1));
-#elif defined(CONFIG_CF_V4e)
+#if defined(CONFIG_CF_V4E)
__asm__ __volatile__("movec %0, %%acr4"::"r"(CONFIG_SYS_CACHE_ACR4));
__asm__ __volatile__("movec %0, %%acr5"::"r"(CONFIG_SYS_CACHE_ACR5));
-
+#endif
 #endif
 
__asm__ __volatile__("movec %0, %%cacr"::"r"(CONFIG_SYS_CACHE_DCACR));
@@ -108,19 +109,19 @@ void dcache_disable(void)
 
__asm__ __volatile__("movec %0, %%cacr"::"r"(temp));
 
-#ifdef CONFIG_CF_V4
+#if defined(CONFIG_CF_V4) || defined(CONFIG_CF_V4E)
__asm__ __volatile__("movec %0, %%acr0"::"r"(temp));
__asm__ __volatile__("movec %0, %%acr1"::"r"(temp));
-#elif defined(CONFIG_CF_V4e)
+#if defined(CONFIG_CF_V4E)
__asm__ __volatile__("movec %0, %%acr4"::"r"(temp));
__asm__ __volatile__("movec %0, %%acr5"::"r"(temp));
-
+#endif
 #endif
 }
 
 void dcache_invalid(void)
 {
-#ifdef CONFIG_CF_V4
+#if defined(CONFIG_CF_V4) || defined(CONFIG_CF_V4E)
u32 temp;
 
temp = CONFIG_SYS_DCACHE_INV;
-- 
2.13.2

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[U-Boot] [PATCH] m68k: mcf5445x: allow CS0 to be undefined

[Angelo Dureghello]

On some boards, CONFIG_SYS_CS0_BASE can be undefined, since
CS0 is not connected to any signal.

Signed-off-by: Angelo Dureghello 
---
 arch/m68k/cpu/mcf5445x/cpu_init.c | 2 ++
 arch/m68k/cpu/mcf5445x/start.S| 4 
 2 files changed, 6 insertions(+)

diff --git a/arch/m68k/cpu/mcf5445x/cpu_init.c 
b/arch/m68k/cpu/mcf5445x/cpu_init.c
index b4a8eefa94..5d2b116be1 100644
--- a/arch/m68k/cpu/mcf5445x/cpu_init.c
+++ b/arch/m68k/cpu/mcf5445x/cpu_init.c
@@ -205,6 +205,7 @@ void cpu_init_f(void)
/* FlexBus Chipselect */
init_fbcs();
 
+#ifdef CONFIG_SYS_CS0_BASE
/*
 * now the flash base address is no longer at 0 (Newer ColdFire family
 * boot at address 0 instead of 0xFFnn_). The vector table must
@@ -212,6 +213,7 @@ void cpu_init_f(void)
 */
if (CONFIG_SYS_CS0_BASE != 0)
setvbr(CONFIG_SYS_CS0_BASE);
+#endif
 
icache_enable();
 }
diff --git a/arch/m68k/cpu/mcf5445x/start.S b/arch/m68k/cpu/mcf5445x/start.S
index 0487d84a2f..123bbd80b8 100644
--- a/arch/m68k/cpu/mcf5445x/start.S
+++ b/arch/m68k/cpu/mcf5445x/start.S
@@ -159,6 +159,7 @@ asm_dram_init:
move.l  #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
clr.l   %sp@-
 
+#ifdef CONFIG_SYS_CS0_BASE
/* Must disable global address */
move.l  #0xFC008000, %a1
move.l  #(CONFIG_SYS_CS0_BASE), (%a1)
@@ -166,6 +167,7 @@ asm_dram_init:
move.l  #(CONFIG_SYS_CS0_CTRL), (%a1)
move.l  #0xFC008004, %a1
move.l  #(CONFIG_SYS_CS0_MASK), (%a1)
+#endif
 #endif /* CONFIG_CF_SBF */
 
 #ifdef CONFIG_MCF5441x
@@ -507,6 +509,7 @@ asm_nand_init:
movec   %d0, %ACR2
movec   %d0, %ACR3
 
+#ifdef CONFIG_SYS_CS0_BASE
/* Must disable global address */
move.l  #0xFC008000, %a1
move.l  #(CONFIG_SYS_CS0_BASE), (%a1)
@@ -514,6 +517,7 @@ asm_nand_init:
move.l  #(CONFIG_SYS_CS0_CTRL), (%a1)
move.l  #0xFC008004, %a1
move.l  #(CONFIG_SYS_CS0_MASK), (%a1)
+#endif
 
/* NAND port configuration */
move.l  #0xEC094048, %a1
-- 
2.13.2

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[U-Boot] [PATCH] m68k: mcf5445x: move early ddr init as board-specific

[Angelo Dureghello]

For certain boot types and sbf, for V4 cpu's, an early ddr/sdram init
is required. This patch moves this ddr/sdram early initalization
away from start.S (to be board related).

Signed-off-by: Angelo Dureghello 
---
 arch/m68k/cpu/mcf5445x/start.S| 180 ++
 board/freescale/m54418twr/Makefile|   2 +
 board/freescale/m54418twr/sbf_dram_init.S |  86 ++
 board/freescale/m54451evb/Makefile|   1 +
 board/freescale/m54451evb/sbf_dram_init.S |  97 
 board/freescale/m54455evb/Makefile|   1 +
 board/freescale/m54455evb/sbf_dram_init.S | 101 +
 include/configs/M54418TWR.h   |   2 +
 include/configs/M54451EVB.h   |   2 +
 include/configs/M54455EVB.h   |   2 +
 10 files changed, 302 insertions(+), 172 deletions(-)
 create mode 100644 board/freescale/m54418twr/sbf_dram_init.S
 create mode 100644 board/freescale/m54451evb/sbf_dram_init.S
 create mode 100644 board/freescale/m54455evb/sbf_dram_init.S

diff --git a/arch/m68k/cpu/mcf5445x/start.S b/arch/m68k/cpu/mcf5445x/start.S
index 0487d84a2f..41d9088b6a 100644
--- a/arch/m68k/cpu/mcf5445x/start.S
+++ b/arch/m68k/cpu/mcf5445x/start.S
@@ -176,177 +176,12 @@ asm_dram_init:
 #if defined(CONFIG_CF_SBF)
move.b  #23, (%a1)  /* dspi */
 #endif
-   move.b  #46, (%a1)  /* DDR */
-
-   /* slew settings */
-   move.l  #0xEC094060, %a1
-   move.b  #0, (%a1)
-
-   /* use vco instead of cpu*2 clock for ddr clock */
-   move.l  #0xEC09001A, %a1
-   move.w  #0xE01D, (%a1)
-
-   /* DDR settings */
-   move.l  #0xFC0B8180, %a1
-   move.l  #0x, (%a1)
-   move.l  #0x4000, (%a1)
-
-   move.l  #0xFC0B81AC, %a1
-   move.l  #0x01030203, (%a1)
-
-   move.l  #0xFC0B8000, %a1
-   move.l  #0x01010101, (%a1)+ /* 0x00 */
-   move.l  #0x0101, (%a1)+ /* 0x04 */
-   move.l  #0x01010100, (%a1)+ /* 0x08 */
-   move.l  #0x0101, (%a1)+ /* 0x0C */
-   move.l  #0x00010101, (%a1)+ /* 0x10 */
-   move.l  #0xFC0B8018, %a1
-   move.l  #0x00010100, (%a1)+ /* 0x18 */
-   move.l  #0x0001, (%a1)+ /* 0x1C */
-   move.l  #0x0101, (%a1)+ /* 0x20 */
-   move.l  #0x0100, (%a1)+ /* 0x24 */
-   move.l  #0x00010001, (%a1)+ /* 0x28 */
-   move.l  #0x0200, (%a1)+ /* 0x2C */
-   move.l  #0x0102, (%a1)+ /* 0x30 */
-   move.l  #0x, (%a1)+ /* 0x34 */
-   move.l  #0x0100, (%a1)+ /* 0x38 */
-   move.l  #0x02000100, (%a1)+ /* 0x3C */
-   move.l  #0x02000407, (%a1)+ /* 0x40 */
-   move.l  #0x02030007, (%a1)+ /* 0x44 */
-   move.l  #0x02000100, (%a1)+ /* 0x48 */
-   move.l  #0x0A030203, (%a1)+ /* 0x4C */
-   move.l  #0x00020708, (%a1)+ /* 0x50 */
-   move.l  #0x00050008, (%a1)+ /* 0x54 */
-   move.l  #0x04030002, (%a1)+ /* 0x58 */
-   move.l  #0x0004, (%a1)+ /* 0x5C */
-   move.l  #0x020A, (%a1)+ /* 0x60 */
-   move.l  #0x0C0E, (%a1)+ /* 0x64 */
-   move.l  #0x2004, (%a1)+ /* 0x68 */
-   move.l  #0x, (%a1)+ /* 0x6C */
-   move.l  #0x00100010, (%a1)+ /* 0x70 */
-   move.l  #0x00100010, (%a1)+ /* 0x74 */
-   move.l  #0x, (%a1)+ /* 0x78 */
-   move.l  #0x0799, (%a1)+ /* 0x7C */
-   move.l  #0xFC0B80A0, %a1
-   move.l  #0x, (%a1)+ /* 0xA0 */
-   move.l  #0x00C80064, (%a1)+ /* 0xA4 */
-   move.l  #0x44520002, (%a1)+ /* 0xA8 */
-   move.l  #0x00C80023, (%a1)+ /* 0xAC */
-   move.l  #0xFC0B80B4, %a1
-   move.l  #0xC350, (%a1)  /* 0xB4 */
-   move.l  #0xFC0B80E0, %a1
-   move.l  #0x0400, (%a1)+ /* 0xE0 */
-   move.l  #0x03000304, (%a1)+ /* 0xE4 */
-   move.l  #0x4004, (%a1)+ /* 0xE8 */
-   move.l  #0xC0004004, (%a1)+ /* 0xEC */
-   move.l  #0x0642C000, (%a1)+ /* 0xF0 */
-   move.l  #0x0642, (%a1)+ /* 0xF4 */
-   move.l  #0xFC0B8024, %a1
-   tpf
-   move.l  #0x01000100, (%a1)  /* 0x24 */
+#endif /* CONFIG_MCF5441x */
 
-   move.l  #0x2000, %d1
-   jsr asm_delay
-#endif /* CONFIG_MCF5441x */
-
-#ifdef CONFIG_MCF5445x
-   /* Dram Initialization a1, a2, and d0 */
-   /* mscr sdram */
-   move.l  #0xFC0A4074, %a1
-   move.b  #(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
-   nop
-
-   /* SDRAM Chip 0 and 1 */
-   move.l  #0xFC0B8110, %a1
-   move.l  #0xFC0B8114, %a2
-
-   /* calculate the size */
-   move.l  #0x13, %d1
-   move.l  #(CONFIG_SYS_SDRAM_SIZE), %d2
-#ifdef CONFIG_SYS_SDRAM_BASE1
-   lsr.l   #1, %d2
-#endif
-
-dramsz_loop:
-   lsr.l   #1, %d2
-   add.l   #1, %d1
-   cmp.l   #1, %d2
-   bne dramsz_loop
-#ifdef CONFIG_SYS_NAND_BOOT
-   beq asm_nand_chk_stat

[U-Boot] [PATCH 0/3] CMD_USB_MASS_STORAGE implies USB_FUNCTION_MASS_STORAGE

[Philipp Tomsich]

Up to now, there's been some ugliness associated with the
dependency from CMD_USB_MASS_STORAGE to USB_FUNCTION_MASS_STORAGE:
if someone only defined CMD_USB_MASS_STORAGE, they'd meet a linker
error due to missing symbols that came from USB_FUNCTION_MASS_STORAGE.

Most platforms seem to have resorted to unconditionally enable
USB_FUNCTION_MASS_STORAGE via their 'common' config-header... some
tried to tie this to an #ifdef CMD_USB_MASS_STORAGE (in fact I had a
patch for the RK3399 that did just that and rather decided to clean
this up once and for all instead of contributing to the prolongation
of the status quo).  Neither is a good solution.

So this series moves USB_FUNCTION_MASS_STORAGE to Kconfig and lets
CMD_USB_MASS_STORAGE imply USB_FUNCTION_MASS_STORAGE.  Finally, we
run moveconfig to contain the damage.



Philipp Tomsich (3):
  usb: gadget: move USB_FUNCTION_MASS_STORAGE to Kconfig
  Kconfig: CMD_USB_MASS_STORAGE implies USB_FUNCTION_MASS_STORAGE
  config: move USB_FUNCTION_MASS_STORAGE

 cmd/Kconfig| 1 +
 configs/CHIP_pro_defconfig | 1 +
 configs/Nintendo_NES_Classic_Edition_defconfig | 1 +
 configs/Sinlinx_SinA33_defconfig   | 1 +
 configs/fennec-rk3288_defconfig| 1 +
 configs/firefly-rk3288_defconfig   | 1 +
 configs/kylin-rk3036_defconfig | 1 +
 configs/miqi-rk3288_defconfig  | 1 +
 configs/parrot_r16_defconfig   | 1 +
 configs/phycore-rk3288_defconfig   | 2 +-
 configs/popmetal-rk3288_defconfig  | 1 +
 configs/smdkv310_defconfig | 1 +
 configs/tinker-rk3288_defconfig| 1 +
 drivers/usb/gadget/Kconfig | 9 +
 include/configs/advantech_dms-ba16.h   | 1 -
 include/configs/apalis_imx6.h  | 1 -
 include/configs/bav335x.h  | 4 
 include/configs/cgtqmx6eval.h  | 2 --
 include/configs/colibri_imx6.h | 1 -
 include/configs/colibri_imx7.h | 2 --
 include/configs/colibri_vf.h   | 1 -
 include/configs/exynos4-common.h   | 2 --
 include/configs/ge_bx50v3.h| 1 -
 include/configs/gw_ventana.h   | 1 -
 include/configs/ma5d4evk.h | 1 -
 include/configs/mx6sabre_common.h  | 2 --
 include/configs/mx7dsabresd.h  | 2 --
 include/configs/nitrogen6x.h   | 2 --
 include/configs/odroid_xu3.h   | 1 -
 include/configs/opos6uldev.h   | 1 -
 include/configs/pico-imx6ul.h  | 1 -
 include/configs/pico-imx7d.h   | 2 --
 include/configs/rk3036_common.h| 1 -
 include/configs/rk322x_common.h| 1 -
 include/configs/rk3288_common.h| 1 -
 include/configs/rk3399_common.h| 4 
 include/configs/s5p_goni.h | 1 -
 include/configs/socfpga_common.h   | 2 --
 include/configs/sunxi-common.h | 1 -
 include/configs/tbs2910.h  | 1 -
 include/configs/tegra-common-usb-gadget.h  | 1 -
 include/configs/warp.h | 2 --
 include/configs/warp7.h| 2 --
 scripts/config_whitelist.txt   | 1 -
 44 files changed, 22 insertions(+), 47 deletions(-)

-- 
2.1.4

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[U-Boot] [PATCH v2 3/3] config: move USB_FUNCTION_MASS_STORAGE

[Philipp Tomsich]

With both an imply from CMD_USB to USB_FUNCTION_MASS_STORAGE and with
USB_FUNCTION_MASS_STORAGE moved to Kconfig, we can now run moveconfig.

Signed-off-by: Philipp Tomsich 
---

Changes in v2: None

 configs/CHIP_pro_defconfig | 1 +
 configs/Nintendo_NES_Classic_Edition_defconfig | 1 +
 configs/Sinlinx_SinA33_defconfig   | 1 +
 configs/fennec-rk3288_defconfig| 1 +
 configs/firefly-rk3288_defconfig   | 1 +
 configs/kylin-rk3036_defconfig | 1 +
 configs/miqi-rk3288_defconfig  | 1 +
 configs/parrot_r16_defconfig   | 1 +
 configs/phycore-rk3288_defconfig   | 2 +-
 configs/popmetal-rk3288_defconfig  | 1 +
 configs/smdkv310_defconfig | 1 +
 configs/tinker-rk3288_defconfig| 1 +
 include/configs/advantech_dms-ba16.h   | 1 -
 include/configs/apalis_imx6.h  | 1 -
 include/configs/bav335x.h  | 4 
 include/configs/cgtqmx6eval.h  | 2 --
 include/configs/colibri_imx6.h | 1 -
 include/configs/colibri_imx7.h | 2 --
 include/configs/colibri_vf.h   | 1 -
 include/configs/exynos4-common.h   | 2 --
 include/configs/ge_bx50v3.h| 1 -
 include/configs/gw_ventana.h   | 1 -
 include/configs/ma5d4evk.h | 1 -
 include/configs/mx6sabre_common.h  | 2 --
 include/configs/mx7dsabresd.h  | 2 --
 include/configs/nitrogen6x.h   | 2 --
 include/configs/odroid_xu3.h   | 1 -
 include/configs/opos6uldev.h   | 1 -
 include/configs/pico-imx6ul.h  | 1 -
 include/configs/pico-imx7d.h   | 2 --
 include/configs/rk3036_common.h| 1 -
 include/configs/rk322x_common.h| 1 -
 include/configs/rk3288_common.h| 1 -
 include/configs/rk3399_common.h| 4 
 include/configs/s5p_goni.h | 1 -
 include/configs/socfpga_common.h   | 2 --
 include/configs/sunxi-common.h | 1 -
 include/configs/tbs2910.h  | 1 -
 include/configs/tegra-common-usb-gadget.h  | 1 -
 include/configs/warp.h | 2 --
 include/configs/warp7.h| 2 --
 scripts/config_whitelist.txt   | 1 -
 42 files changed, 12 insertions(+), 47 deletions(-)

diff --git a/configs/CHIP_pro_defconfig b/configs/CHIP_pro_defconfig
index 013d908..5ee6e1d 100644
--- a/configs/CHIP_pro_defconfig
+++ b/configs/CHIP_pro_defconfig
@@ -26,6 +26,7 @@ CONFIG_AXP_ALDO4_VOLT=3300
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Allwinner Technology"
 CONFIG_G_DNL_VENDOR_NUM=0x1f3a
diff --git a/configs/Nintendo_NES_Classic_Edition_defconfig 
b/configs/Nintendo_NES_Classic_Edition_defconfig
index 5f91c35..7185511 100644
--- a/configs/Nintendo_NES_Classic_Edition_defconfig
+++ b/configs/Nintendo_NES_Classic_Edition_defconfig
@@ -20,6 +20,7 @@ CONFIG_AXP_DLDO1_VOLT=3300
 CONFIG_AXP_ELDO2_VOLT=1800
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Allwinner Technology"
 CONFIG_G_DNL_VENDOR_NUM=0x1f3a
diff --git a/configs/Sinlinx_SinA33_defconfig b/configs/Sinlinx_SinA33_defconfig
index d1b5b22..bf99dde 100644
--- a/configs/Sinlinx_SinA33_defconfig
+++ b/configs/Sinlinx_SinA33_defconfig
@@ -25,6 +25,7 @@ CONFIG_DFU_RAM=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Allwinner Technology"
 CONFIG_G_DNL_VENDOR_NUM=0x1f3a
diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig
index 92be959..3c1c99e 100644
--- a/configs/fennec-rk3288_defconfig
+++ b/configs/fennec-rk3288_defconfig
@@ -64,6 +64,7 @@ CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index 7df9d09..6bf708c 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -67,6 +67,7 @@ CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_VIDEO_ROCKCHIP=y
diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig
index 715e4b2..18b9fa0 100644
--- a/configs/kylin-rk3036_defconfig
+++ b/configs/kylin-rk3036_defconfig
@@ -35,5 +35,6 @@ CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
 CONFIG_

[U-Boot] [PATCH v2 0/3] CMD_USB_MASS_STORAGE implies USB_FUNCTION_MASS_STORAGE

[Philipp Tomsich]

Up to now, there's been some ugliness associated with the
dependency from CMD_USB_MASS_STORAGE to USB_FUNCTION_MASS_STORAGE:
if someone only defined CMD_USB_MASS_STORAGE, they'd meet a linker
error due to missing symbols that came from USB_FUNCTION_MASS_STORAGE.

Most platforms seem to have resorted to unconditionally enable
USB_FUNCTION_MASS_STORAGE via their 'common' config-header... some
tried to tie this to an #ifdef CMD_USB_MASS_STORAGE (in fact I had a
patch for the RK3399 that did just that and rather decided to clean
this up once and for all instead of contributing to the prolongation
of the status quo).  Neither is a good solution.

So this series moves USB_FUNCTION_MASS_STORAGE to Kconfig and lets
CMD_USB_MASS_STORAGE imply USB_FUNCTION_MASS_STORAGE.  Finally, we
run moveconfig to contain the damage.

Changes in v2:
- ran 'tabify' on newly added lines (in Kconfig) to fix a spaces vs.
  tabs issues

Philipp Tomsich (3):
  usb: gadget: move USB_FUNCTION_MASS_STORAGE to Kconfig
  Kconfig: CMD_USB_MASS_STORAGE implies USB_FUNCTION_MASS_STORAGE
  config: move USB_FUNCTION_MASS_STORAGE

 cmd/Kconfig| 1 +
 configs/CHIP_pro_defconfig | 1 +
 configs/Nintendo_NES_Classic_Edition_defconfig | 1 +
 configs/Sinlinx_SinA33_defconfig   | 1 +
 configs/fennec-rk3288_defconfig| 1 +
 configs/firefly-rk3288_defconfig   | 1 +
 configs/kylin-rk3036_defconfig | 1 +
 configs/miqi-rk3288_defconfig  | 1 +
 configs/parrot_r16_defconfig   | 1 +
 configs/phycore-rk3288_defconfig   | 2 +-
 configs/popmetal-rk3288_defconfig  | 1 +
 configs/smdkv310_defconfig | 1 +
 configs/tinker-rk3288_defconfig| 1 +
 drivers/usb/gadget/Kconfig | 9 +
 include/configs/advantech_dms-ba16.h   | 1 -
 include/configs/apalis_imx6.h  | 1 -
 include/configs/bav335x.h  | 4 
 include/configs/cgtqmx6eval.h  | 2 --
 include/configs/colibri_imx6.h | 1 -
 include/configs/colibri_imx7.h | 2 --
 include/configs/colibri_vf.h   | 1 -
 include/configs/exynos4-common.h   | 2 --
 include/configs/ge_bx50v3.h| 1 -
 include/configs/gw_ventana.h   | 1 -
 include/configs/ma5d4evk.h | 1 -
 include/configs/mx6sabre_common.h  | 2 --
 include/configs/mx7dsabresd.h  | 2 --
 include/configs/nitrogen6x.h   | 2 --
 include/configs/odroid_xu3.h   | 1 -
 include/configs/opos6uldev.h   | 1 -
 include/configs/pico-imx6ul.h  | 1 -
 include/configs/pico-imx7d.h   | 2 --
 include/configs/rk3036_common.h| 1 -
 include/configs/rk322x_common.h| 1 -
 include/configs/rk3288_common.h| 1 -
 include/configs/rk3399_common.h| 4 
 include/configs/s5p_goni.h | 1 -
 include/configs/socfpga_common.h   | 2 --
 include/configs/sunxi-common.h | 1 -
 include/configs/tbs2910.h  | 1 -
 include/configs/tegra-common-usb-gadget.h  | 1 -
 include/configs/warp.h | 2 --
 include/configs/warp7.h| 2 --
 scripts/config_whitelist.txt   | 1 -
 44 files changed, 22 insertions(+), 47 deletions(-)

-- 
2.1.4

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[U-Boot] [PATCH 3/3] config: move USB_FUNCTION_MASS_STORAGE

[Philipp Tomsich]

With both an imply from CMD_USB to USB_FUNCTION_MASS_STORAGE and with
USB_FUNCTION_MASS_STORAGE moved to Kconfig, we can now run moveconfig.

Signed-off-by: Philipp Tomsich 
---

 configs/CHIP_pro_defconfig | 1 +
 configs/Nintendo_NES_Classic_Edition_defconfig | 1 +
 configs/Sinlinx_SinA33_defconfig   | 1 +
 configs/fennec-rk3288_defconfig| 1 +
 configs/firefly-rk3288_defconfig   | 1 +
 configs/kylin-rk3036_defconfig | 1 +
 configs/miqi-rk3288_defconfig  | 1 +
 configs/parrot_r16_defconfig   | 1 +
 configs/phycore-rk3288_defconfig   | 2 +-
 configs/popmetal-rk3288_defconfig  | 1 +
 configs/smdkv310_defconfig | 1 +
 configs/tinker-rk3288_defconfig| 1 +
 include/configs/advantech_dms-ba16.h   | 1 -
 include/configs/apalis_imx6.h  | 1 -
 include/configs/bav335x.h  | 4 
 include/configs/cgtqmx6eval.h  | 2 --
 include/configs/colibri_imx6.h | 1 -
 include/configs/colibri_imx7.h | 2 --
 include/configs/colibri_vf.h   | 1 -
 include/configs/exynos4-common.h   | 2 --
 include/configs/ge_bx50v3.h| 1 -
 include/configs/gw_ventana.h   | 1 -
 include/configs/ma5d4evk.h | 1 -
 include/configs/mx6sabre_common.h  | 2 --
 include/configs/mx7dsabresd.h  | 2 --
 include/configs/nitrogen6x.h   | 2 --
 include/configs/odroid_xu3.h   | 1 -
 include/configs/opos6uldev.h   | 1 -
 include/configs/pico-imx6ul.h  | 1 -
 include/configs/pico-imx7d.h   | 2 --
 include/configs/rk3036_common.h| 1 -
 include/configs/rk322x_common.h| 1 -
 include/configs/rk3288_common.h| 1 -
 include/configs/rk3399_common.h| 4 
 include/configs/s5p_goni.h | 1 -
 include/configs/socfpga_common.h   | 2 --
 include/configs/sunxi-common.h | 1 -
 include/configs/tbs2910.h  | 1 -
 include/configs/tegra-common-usb-gadget.h  | 1 -
 include/configs/warp.h | 2 --
 include/configs/warp7.h| 2 --
 scripts/config_whitelist.txt   | 1 -
 42 files changed, 12 insertions(+), 47 deletions(-)

diff --git a/configs/CHIP_pro_defconfig b/configs/CHIP_pro_defconfig
index 013d908..5ee6e1d 100644
--- a/configs/CHIP_pro_defconfig
+++ b/configs/CHIP_pro_defconfig
@@ -26,6 +26,7 @@ CONFIG_AXP_ALDO4_VOLT=3300
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Allwinner Technology"
 CONFIG_G_DNL_VENDOR_NUM=0x1f3a
diff --git a/configs/Nintendo_NES_Classic_Edition_defconfig 
b/configs/Nintendo_NES_Classic_Edition_defconfig
index 5f91c35..7185511 100644
--- a/configs/Nintendo_NES_Classic_Edition_defconfig
+++ b/configs/Nintendo_NES_Classic_Edition_defconfig
@@ -20,6 +20,7 @@ CONFIG_AXP_DLDO1_VOLT=3300
 CONFIG_AXP_ELDO2_VOLT=1800
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Allwinner Technology"
 CONFIG_G_DNL_VENDOR_NUM=0x1f3a
diff --git a/configs/Sinlinx_SinA33_defconfig b/configs/Sinlinx_SinA33_defconfig
index d1b5b22..bf99dde 100644
--- a/configs/Sinlinx_SinA33_defconfig
+++ b/configs/Sinlinx_SinA33_defconfig
@@ -25,6 +25,7 @@ CONFIG_DFU_RAM=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_MUSB_GADGET=y
 CONFIG_USB_GADGET=y
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_G_DNL_MANUFACTURER="Allwinner Technology"
 CONFIG_G_DNL_VENDOR_NUM=0x1f3a
diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig
index 92be959..3c1c99e 100644
--- a/configs/fennec-rk3288_defconfig
+++ b/configs/fennec-rk3288_defconfig
@@ -64,6 +64,7 @@ CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
 CONFIG_USE_TINY_PRINTF=y
 CONFIG_CMD_DHRYSTONE=y
 CONFIG_ERRNO_STR=y
diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig
index 7df9d09..6bf708c 100644
--- a/configs/firefly-rk3288_defconfig
+++ b/configs/firefly-rk3288_defconfig
@@ -67,6 +67,7 @@ CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_VIDEO_ROCKCHIP=y
diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig
index 715e4b2..18b9fa0 100644
--- a/configs/kylin-rk3036_defconfig
+++ b/configs/kylin-rk3036_defconfig
@@ -35,5 +35,6 @@ CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_USB_STORAGE=y
+CONFIG_USB_FUNCTION_MASS_STORAGE=y
 CONFIG_CMD_DHRYSTONE=y
 CONF

Re: [U-Boot] [RFC PATCH 1/9] mx6: Add board mx6memcal for use in validating DDR

[Fabio Estevam]

Hi Eric,

On Fri, Jul 14, 2017 at 2:58 PM, Eric Nelson  wrote:

> I set this aside because I wasn't able to get the "return to
> RBL" code working and figured I'd try to reverse-engineer the API.
>
> Any hints you have in that area would be helpful, and will solve
> that other long-standing issue of how to live with SPL on i.MX.

Sorry, but what does "return to RBL" mean?

Regards,

Fabio Estevam
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Re: [U-Boot] [RFC PATCH 1/9] mx6: Add board mx6memcal for use in validating DDR

[Eric Nelson]

Hi Fabio,

On 07/14/2017 07:18 AM, Fabio Estevam wrote:

Hi Eric,

On Tue, Nov 1, 2016 at 5:13 PM, Eric Nelson  wrote:

This is a virtual "board" that uses configuration files and
Kconfig to define the memory layout used by a real board during
the board bring-up process.

It generates an SPL image that can be loaded using imx_usb or
SB_LOADER.exe.

When run, it will generate a set of calibration constants for
use in either or both a DCD configuration file for boards that
use u-boot.imx or struct mx6_mmdc_calibration for boards that
boot via SPL.

In essence, it is a configurable, open-source variant of the
Freescale ddr-stress tool.

 https://community.nxp.com/docs/DOC-105652

File mx6memcal_defconfig configures the board for use with
mx6sabresd or mx6qsabreauto.


Do you still have plans on refreshing this series?



Plans is a strong word, but I certainly hope to find some time
to continue this effort.

I haven't been doing too many new board bring-ups lately though,
so it moved away from my front burner.

I set this aside because I wasn't able to get the "return to
RBL" code working and figured I'd try to reverse-engineer the API.

Any hints you have in that area would be helpful, and will solve
that other long-standing issue of how to live with SPL on i.MX.


It does seem very useful.



It is, and even the RFC patch allows very quick testing of
large numbers of boards to gather calibration data.

Regards,


Eric
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[U-Boot] [PATCH 1/1] efi_memory: avoid NULL dereference in efi_free_pool

[Heinrich Schuchardt]

If efi_free_pool is called with argument NULL an illegal memory
access occurs.

So let's check the parameter on entry.

Signed-off-by: Heinrich Schuchardt 
---
 lib/efi_loader/efi_memory.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c
index db2ae19f59..5c53aaafdb 100644
--- a/lib/efi_loader/efi_memory.c
+++ b/lib/efi_loader/efi_memory.c
@@ -379,6 +379,9 @@ efi_status_t efi_free_pool(void *buffer)
efi_status_t r;
struct efi_pool_allocation *alloc;
 
+   if (buffer == NULL)
+   return EFI_INVALID_PARAMETER;
+
alloc = container_of(buffer, struct efi_pool_allocation, data);
/* Sanity check, was the supplied address returned by allocate_pool */
assert(((uintptr_t)alloc & EFI_PAGE_MASK) == 0);
-- 
2.11.0

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[U-Boot] [PATCH v2 2/3] Kconfig: CMD_USB_MASS_STORAGE implies USB_FUNCTION_MASS_STORAGE

[Philipp Tomsich]

There's an unconditional dependency from the mass-storage command
onto the mass-storage function through a call to fsg_main_thread(...).
If USB_FUNCTION_MASS_STORAGE is not enabled, this will result in
link-errors when CMD_USB_MASS_STORAGE is enabled.

Let's introduce an 'imply' (I didn't want to make this a 'select', as
these were independent in the past, as well) relationship to model
this dependency.

Signed-off-by: Philipp Tomsich 
---

Changes in v2: None

 cmd/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 6758db1..a60a568 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -667,6 +667,7 @@ config CMD_DFU
 
 config CMD_USB_MASS_STORAGE
bool "UMS usb mass storage"
+   imply USB_FUNCTION_MASS_STORAGE
help
  USB mass storage support
 
-- 
2.1.4

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[U-Boot] [PATCH v2 1/3] usb: gadget: move USB_FUNCTION_MASS_STORAGE to Kconfig

[Philipp Tomsich]

In order to easily model that enabling CMD_USB_MASS_STORAGE implies a
need to have USB_FUNCTION_MASS_STORAGE enabled, we first need to
migrate USB_FUNCTION_MASS_STORAGE to Kconfig.

Signed-off-by: Philipp Tomsich 

---

Changes in v2:
- ran 'tabify' on newly added lines to fix a spaces vs. tabs issues

 drivers/usb/gadget/Kconfig | 9 +
 1 file changed, 9 insertions(+)

diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 261ed12..8d1cd57 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -34,6 +34,15 @@ menuconfig USB_GADGET
   peripheral/device side bus controller, and a "gadget driver" for
   your peripheral protocol.
 
+config USB_FUNCTION_MASS_STORAGE
+   bool "USB mass-storage class implementation"
+   help
+ The Mass Storage Function acts as a USB Mass Storage device
+ appearing to the host as a disk drive or as a CD-ROM drive.
+
+ This is required (and implied) by the USB mass-storage emulation
+ command ('ums').
+
 if USB_GADGET
 
 config USB_GADGET_ATMEL_USBA
-- 
2.1.4

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Re: [U-Boot] [PATCH 1/3] usb: gadget: move USB_FUNCTION_MASS_STORAGE to Kconfig

[Marek Vasut]

On 07/14/2017 04:55 PM, Dr. Philipp Tomsich wrote:
> 
>> On 14 Jul 2017, at 16:48, Marek Vasut  wrote:
>>
>> On 07/14/2017 04:22 PM, Philipp Tomsich wrote:
>>> In order to easily model a that CMD_USB_MASS_STORAGE implies having
>>> USB_FUNCTION_MASS_STORAGE enabled, we first need to migrate
>>> USB_FUNCTION_MASS_STORAGE to Kconfig.
>>>
>>> Signed-off-by: Philipp Tomsich 
>>> ---
>>>
>>> drivers/usb/gadget/Kconfig | 9 +
>>> 1 file changed, 9 insertions(+)
>>>
>>> diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
>>> index 261ed12..1c4a4f2 100644
>>> --- a/drivers/usb/gadget/Kconfig
>>> +++ b/drivers/usb/gadget/Kconfig
>>> @@ -34,6 +34,15 @@ menuconfig USB_GADGET
>>>peripheral/device side bus controller, and a "gadget driver" for
>>>your peripheral protocol.
>>>
>>> +config USB_FUNCTION_MASS_STORAGE
>>> +bool "USB mass-storage class implementation"
>>> +   help
>>
>> The alignment of "help" and "bool" above looks weird
> 
> Tabs vs. Spaces, it appears.
> Do you want me to send a v2?

Yes

>>
>>> + The Mass Storage Function acts as a USB Mass Storage device
>>> + appearing to the host as a disk drive or as a CD-ROM drive.
>>> +
>>> + This is required (and implied) by the USB mass-storage emulation
>>> + command ('ums').
>>> +
>>> if USB_GADGET
>>>
>>> config USB_GADGET_ATMEL_USBA
>>>
>>
>>
>> -- 
>> Best regards,
>> Marek Vasut
> 


-- 
Best regards,
Marek Vasut
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[U-Boot] [PATCH] rockchip: efuse: dm: change to use dev_read_addr

[Philipp Tomsich]

This changes the rockchip-efuse driver to use dev_read_addr instead of
devfdt_get_addr.

Signed-off-by: Philipp Tomsich 
---

 drivers/misc/rockchip-efuse.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 423d24c..2e3bc91 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -142,7 +142,7 @@ static int rockchip_efuse_ofdata_to_platdata(struct udevice 
*dev)
 {
struct rockchip_efuse_platdata *plat = dev_get_platdata(dev);
 
-   plat->base = (void *)devfdt_get_addr(dev);
+   plat->base = (void *)dev_read_addr(dev);
return 0;
 }
 
-- 
2.1.4

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[U-Boot] [PATCH] rockchip: timer: make register sizes explicit

[Philipp Tomsich]

We are about to reuse the rockchip timer (header file) for 64bit ARMv8
chips, so it seems a good time to make the register sizes explicit by
changing from 'unsigned int' to 'u32'.

Signed-off-by: Philipp Tomsich 
---

 arch/arm/include/asm/arch-rockchip/timer.h | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/include/asm/arch-rockchip/timer.h 
b/arch/arm/include/asm/arch-rockchip/timer.h
index 1d044bb..c23c509 100644
--- a/arch/arm/include/asm/arch-rockchip/timer.h
+++ b/arch/arm/include/asm/arch-rockchip/timer.h
@@ -8,12 +8,12 @@
 #define __ASM_ARCH_TIMER_H
 
 struct rk_timer {
-   unsigned int timer_load_count0;
-   unsigned int timer_load_count1;
-   unsigned int timer_curr_value0;
-   unsigned int timer_curr_value1;
-   unsigned int timer_ctrl_reg;
-   unsigned int timer_int_status;
+   u32 timer_load_count0;
+   u32 timer_load_count1;
+   u32 timer_curr_value0;
+   u32 timer_curr_value1;
+   u32 timer_ctrl_reg;
+   u32 timer_int_status;
 };
 
 void rockchip_timer_init(void);
-- 
2.1.4

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[U-Boot] [PULL] Please pull u-boot-imx

[Stefano Babic]

Hi Tom,

please pull from u-boot-imx, thanks !

All boards compile clean, there are still warning for 9 boards dur to
fec_get_miibus. Patch was already sent by Lothar and will follow the
normal way through Joe's tree. At the moment, it is ok to still have
these warnings.


The following changes since commit 8d3a25685e4aac7070365a2b3c53c2c81b27930f:

  Merge git://git.denx.de/u-boot-dm (2017-07-11 20:28:46 -0400)

are available in the git repository at:

  git://www.denx.de/git/u-boot-imx.git master

for you to fetch changes up to 651782a08b5bb4e710bda1b11fff774b8ade384f:

  mx6cuboxi: Move CONFIG_CMD_SATA to Kconfig (2017-07-14 15:16:01 +0200)


Christian Gmeiner (1):
  ot1200: enable CONFIG_IMX_THERMAL for detailed thermal information

Diego Dorta (1):
  mx6sabreauto: Add Falcon mode support

Fabio Berton (3):
  wandboard: Use PARTUUID to specify the rootfs location
  mx6cuboxi: Use PARTUUID to specify the rootfs location
  embestmx6boards: Use PARTUUID to specify the rootfs location

Fabio Estevam (12):
  mx6sabresd: Remove SPL entry from CONFIG_SYS_EXTRA_OPTIONS
  mx6slevk_spl: Remove SPL entry from CONFIG_SYS_EXTRA_OPTIONS
  cgtqmx6eval: Remove SPL entry from CONFIG_SYS_EXTRA_OPTIONS
  cm_fx6: Remove SPL entry from CONFIG_SYS_EXTRA_OPTIONS
  wandboard: Remove unnecessary delay
  mx6sabresd: Fix guard file symbol
  mx6: soc: Move mxs_dma_init() into the mxs nand driver
  mx6sabreauto: Do not enable WEIM by default
  mx6sabre: Use PARTUUID to specify the rootfs location
  warp: Use PARTUUID to specify the rootfs location
  mx6sabreauto: Make Ethernet functional again
  mx6cuboxi: Move CONFIG_CMD_SATA to Kconfig

Florian Fainelli (1):
  dt-bindings: Document the Broadcom STB wake-up timer node

Gautam Bhat (1):
  mx7dsabresd: Set VLD04 output to 2.8V in PMIC initialization.

Jagan Teki (9):
  serial: mxc: Add common mxc_uart reg space
  serial: mxc: Use RFDIV in dm-code
  serial: mxc: Move cr1 and cr2 write to mxc_serial_setbrg
  serial: mxc: Move common init into _mxc_serial_init
  serial: mxc: Move common baud gen into _mxc_serial_setbrg
  serial: mxc: Code cleanup
  serial: mxc: Add debug uart support
  icorem6_rqs: Rename icorem6_rqs config file
  imx6_spl: Add u-boot-dtb.img for SPL payload

Lothar Waßmann (1):
  net: fec_mxc: fix PHY initialization bug with CONFIG_DM_ETH

Patrick Bruenn (2):
  imx: cx9020: use fdt_addr_r and ramdisk_addr_r
  imx: cx9020: try pxe boot, if no vmlinuz on mmc

Peng Fan (4):
  mmc: fsl_esdhc: correct type of wp_enable
  mmc: fsl_esdhc: introduce vs18_enable for 1.8V fix I/O
  dm: mmc: fsl_esdhc: handle vqmmc supply
  mmc: fsl_esdhc: drop CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT

Peter Robinson (1):
  mx6cuboxi: Add support for sata

Stefan Agner (1):
  imx: mx6ull: fix USB bmode for i.MX 6UL and 6ULL

Stefano Babic (1):
  imx: reorganize IMX code as other SOCs

Vanessa Maegima (2):
  mx6qsabreauto: Add SPL support
  mx6sabreauto: Update to SPL only mode

 Documentation/devicetree/bindings/rtc/brcm,brcmstb-waketimer.txt
 |   22 
 MAINTAINERS
 |4 +-
 Makefile
 |6 +-
 arch/arm/Kconfig
 |   10 +-
 arch/arm/Makefile
 |4 +-
 arch/arm/cpu/arm926ejs/mx27/generic.c
 |2 +-
 arch/arm/cpu/arm926ejs/mxs/mxs.c
 |2 +-
 arch/arm/cpu/armv7/Makefile
 |4 -
 arch/arm/cpu/armv7/vf610/generic.c
 |2 +-
 arch/arm/include/asm/arch-mx25/gpio.h
 |2 +-
 arch/arm/include/asm/arch-mx25/iomux-mx25.h
 |2 +-
 arch/arm/include/asm/arch-mx31/gpio.h
 |2 +-
 arch/arm/include/asm/arch-mx31/sys_proto.h
 |2 +-
 arch/arm/include/asm/arch-mx35/gpio.h
 |2 +-
 arch/arm/include/asm/arch-mx35/iomux-mx35.h
 |2 +-
 arch/arm/include/asm/arch-mx35/sys_proto.h
 |2 +-
 arch/arm/include/asm/arch-mx5/gpio.h
 |2 +-
 arch/arm/include/asm/arch-mx5/iomux-mx51.h
 |2 +-
 arch/arm/include/asm/arch-mx5/iomux-mx53.h
 |2 +-
 arch/arm/include/asm/arch-mx5/sys_proto.h
 |2 +-
 arch/arm/include/asm/arch-mx6/gpio.h
 |2 +-
 arch/arm/include/asm/arch-mx6/imx-regs.h
 |2 +-
 arch/arm/include/asm/arch-mx6/mx6-pins.h
 |2 +-
 arch/arm/include/asm/arch-mx6/mx6sl_pins.h
 |2 +-
 arch/arm/include/asm/arch-mx6/mx6sll_pins.h
 |2 +-
 arch/arm/include/asm/arch-mx6/mx6sx_pins.h
 |2 +-
 arch/arm/include/asm/arch-mx6/mx6ul_pins.h
 |2 +-
 arch/arm/include/asm/arch-mx6/mx6ull_pins.h
 |2 +-
 arch/arm/include/asm/arch-mx6/sys_proto.h
 |2 +-
 arch/arm/include/asm/arch-mx7/gpio.h
 |2 +-
 arch/arm/include/asm/arch-mx7/imx-regs.h
 |2 +-
 arch/arm/include/asm/arch-mx7/mx7-pins.h
 |2 +-
 arch/arm/include/asm/arch-mx7/mx7d_pins.h
 |2 +-
 arch/arm/include/asm/arch-mx7/sys_proto.h
 |2 +-
 arch/arm/include/asm/arch-mx7ulp/sys_proto.h
 |2 +-
 arch/arm/include/asm/arch-mxs/imx-regs.h
 |8 +-
 arch/arm/include/asm/arch-mxs

Re: [U-Boot] Cubox-i broken

[Stefano Babic]

On 14/07/2017 17:11, Peter Robinson wrote:
> On Fri, Jul 14, 2017 at 12:07 AM, Fabio Estevam  wrote:
>> Hi Stefano,
>>
>> On Wed, Jul 12, 2017 at 6:00 AM, Stefano Babic  wrote:
>>> Hi Peter,
>>>
>>> your :
>>>
>>> commit ff1815632563a826cfe49fc9496a36d00febb6e3
>>> Author: Peter Robinson 
>>> Date:   Sat Jul 1 18:44:03 2017 +0100
>>>
>>> mx6cuboxi: Add support for sata
>>>
>>>
>>> breaks (indirectly) mx6cuboxi. It is associated with changes in
>>> config_distro_bootcmd.h, my first guess is for :
>>
>> I have sent a fix for this issue, thanks.
> 
> Thank you both for this, sorry for the delayed response, it's been a busy 
> week!

No problem, and thanks Fabio for fixing this. I send my PR to Tom, the
repo builds without errors now.

Stefano

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[U-Boot] [PATCH v2] Add support for Microchip LAN75xx and LAN78xx

[Yuiko.Oshino]

From: Yuiko Oshino 

Add support for Microchip LAN7500, LAN7800 and LAN7850, USB to 10/100/1000 
Ethernet Controllers

Signed-off-by: Yuiko Oshino 
Cc: Marek Vasut 
Cc: Joe Hershberger 
---
Changes for v2:
   - wait_for_bit functions copy the real one.
   - uses phylib
   - unnecessary variables were removed
   - all return values are checked
   - uses mii_resolve_flowctrl_fdx() from linux/mii.h ([PATCH] mii: Add 
mii_resolve_flowctrl_fdx() submitted on June 26, 2017)
---
 drivers/usb/Kconfig   |   2 +
 drivers/usb/eth/Kconfig   |  18 ++
 drivers/usb/eth/Makefile  |   2 +
 drivers/usb/eth/lan75xx.c | 320 +
 drivers/usb/eth/lan78xx.c | 479 +++
 drivers/usb/eth/lan7x.c   | 506 ++
 drivers/usb/eth/lan7x.h   | 232 +
 7 files changed, 1559 insertions(+)
 create mode 100644 drivers/usb/eth/Kconfig
 create mode 100644 drivers/usb/eth/lan75xx.c
 create mode 100644 drivers/usb/eth/lan78xx.c
 create mode 100644 drivers/usb/eth/lan7x.c
 create mode 100644 drivers/usb/eth/lan7x.h

diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index da3ec2f..62126aa 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -94,4 +94,6 @@ endif
 
 source "drivers/usb/gadget/Kconfig"
 
+source "drivers/usb/eth/Kconfig"
+
 endif
diff --git a/drivers/usb/eth/Kconfig b/drivers/usb/eth/Kconfig
new file mode 100644
index 000..a07243f
--- /dev/null
+++ b/drivers/usb/eth/Kconfig
@@ -0,0 +1,18 @@
+comment "USB to Ethernet Controller Drivers"
+
+config USB_ETHER_LAN75XX
+   bool "Microchip LAN75XX support"
+   ---help---
+ Say Y here if you would like to support Microchip LAN75XX Hi-Speed
+ USB 2.0 to 10/100/1000 Gigabit Ethernet controller.
+ Supports 10Base-T/ 100Base-TX/1000Base-T.
+ This driver supports the internal PHY.
+
+config USB_ETHER_LAN78XX
+   bool "Microchip LAN78XX support"
+   ---help---
+ Say Y here if you would like to support Microchip LAN78XX USB 3.1
+ Gen 1 to 10/100/1000 Gigabit Ethernet controller.
+ Supports 10Base-T/ 100Base-TX/1000Base-T.
+ This driver supports the internal PHY.
+
diff --git a/drivers/usb/eth/Makefile b/drivers/usb/eth/Makefile
index 4c44efc..4b935a3 100644
--- a/drivers/usb/eth/Makefile
+++ b/drivers/usb/eth/Makefile
@@ -9,4 +9,6 @@ obj-$(CONFIG_USB_ETHER_ASIX) += asix.o
 obj-$(CONFIG_USB_ETHER_ASIX88179) += asix88179.o
 obj-$(CONFIG_USB_ETHER_MCS7830) += mcs7830.o
 obj-$(CONFIG_USB_ETHER_SMSC95XX) += smsc95xx.o
+obj-$(CONFIG_USB_ETHER_LAN75XX) += lan7x.o lan75xx.o
+obj-$(CONFIG_USB_ETHER_LAN78XX) += lan7x.o lan78xx.o
 obj-$(CONFIG_USB_ETHER_RTL8152) += r8152.o r8152_fw.o
diff --git a/drivers/usb/eth/lan75xx.c b/drivers/usb/eth/lan75xx.c
new file mode 100644
index 000..8ac7784
--- /dev/null
+++ b/drivers/usb/eth/lan75xx.c
@@ -0,0 +1,320 @@
+/*
+ * Copyright (c) 2017 Microchip Technology Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include "usb_ether.h"
+#include "lan7x.h"
+
+/* LAN75xx specific register/bit defines */
+#define LAN75XX_HW_CFG_BIR BIT(7)
+
+#define LAN75XX_BURST_CAP  0x034
+
+#define LAN75XX_BULK_IN_DLY0x03C
+
+#define LAN75XX_RFE_CTL0x060
+
+#define LAN75XX_FCT_RX_CTL 0x090
+
+#define LAN75XX_FCT_TX_CTL 0x094
+
+#define LAN75XX_FCT_RX_FIFO_END0x098
+
+#define LAN75XX_FCT_TX_FIFO_END0x09C
+
+#define LAN75XX_FCT_FLOW   0x0A0
+
+/* MAC ADDRESS PERFECT FILTER For LAN75xx */
+#define LAN75XX_ADDR_FILTX 0x300
+#define LAN75XX_ADDR_FILTX_FB_VALIDBIT(31)
+
+/*
+ * Lan75xx infrastructure commands
+ */
+static int lan75xx_phy_gig_workaround(struct usb_device *udev,
+ struct ueth_data *dev)
+{
+   int ret = 0;
+
+   /* Only internal phy */
+   /* Set the phy in Gig loopback */
+   lan7x_mdio_write(udev, dev->phy_id, MII_BMCR,
+(BMCR_LOOPBACK | BMCR_SPEED1000));
+
+   /* Wait for the link up */
+   ret = lan7x_mdio_wait_for_bit(udev, "BMSR_LSTATUS",
+ dev->phy_id, MII_BMSR, BMSR_LSTATUS,
+ true, PHY_CONNECT_TIMEOUT_MS, 1);
+   if (ret)
+   return ret;
+
+   /* phy reset */
+   return lan7x_pmt_phy_reset(udev, dev);
+}
+
+static int lan75xx_update_flowcontrol(struct usb_device *udev,
+ struct ueth_data *dev)
+{
+   uint32_t flow = 0, fct_flow = 0;
+   int ret;
+
+   ret = lan7x_update_flowcontrol(udev, dev, &flow, &fct_flow);
+   if (ret)
+   return ret;
+
+   ret = lan7x_write_reg(udev, LAN75XX_FCT_FLOW, fct_flow);
+   if (ret)
+   return ret;
+   return lan7x_write_reg(udev, FLOW, flow);
+}
+
+s

[U-Boot] [PATCH v2] serial: ns16550: Add RX interrupt buffer support

[Stefan Roese]

Pasting longer lines into the U-Boot console prompt sometimes leads to
characters missing. One problem here is the small 16-byte FIFO of the
legacy NS16550 UART, e.g. on x86 platforms.

This patch now introduces a Kconfig option to enable RX interrupt
buffer support for NS16550 style UARTs. With this option enabled, I was
able paste really long lines into the U-Boot console, without any
characters missing.

Signed-off-by: Stefan Roese 
Reviewed-by: Simon Glass 
Cc: Bin Meng 
---
v2:
- Added Simon's RB
- Added irq_free_handler to newly introduced driver remove function
- Added comments to the introduced variables on the ns16550_platdata
  struct

 drivers/serial/Kconfig   |  10 
 drivers/serial/ns16550.c | 120 +--
 include/ns16550.h|  10 
 3 files changed, 135 insertions(+), 5 deletions(-)

diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index b7dd2ac103..8284febae3 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -64,6 +64,16 @@ config DM_SERIAL
  implements serial_putc() etc. The uclass interface is
  defined in include/serial.h.
 
+config SERIAL_IRQ_BUFFER
+   bool "Enable RX interrupt buffer for serial input"
+   depends on DM_SERIAL
+   default n
+   help
+ Enable RX interrupt buffer support for the serial driver.
+ This enables pasting longer strings, even when the RX FIFO
+ of the UART is not big enough (e.g. 16 bytes on the normal
+ NS16550).
+
 config SPL_DM_SERIAL
bool "Enable Driver Model for serial drivers in SPL"
depends on DM_SERIAL
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index e0e70244ce..0c43cb1fe2 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -315,6 +315,80 @@ DEBUG_UART_FUNCS
 #endif
 
 #ifdef CONFIG_DM_SERIAL
+
+#if CONFIG_IS_ENABLED(SERIAL_IRQ_BUFFER)
+
+#define BUF_COUNT  256
+
+static void rx_fifo_to_buf(struct udevice *dev)
+{
+   struct NS16550 *const com_port = dev_get_priv(dev);
+   struct ns16550_platdata *plat = dev->platdata;
+
+   /* Read all available chars into buffer */
+   while ((serial_in(&com_port->lsr) & UART_LSR_DR)) {
+   plat->buf[plat->wr_ptr++] = serial_in(&com_port->rbr);
+   plat->wr_ptr %= BUF_COUNT;
+   }
+}
+
+static int rx_pending(struct udevice *dev)
+{
+   struct ns16550_platdata *plat = dev->platdata;
+
+   /*
+* At startup it may happen, that some already received chars are
+* "stuck" in the RX FIFO, even with the interrupt enabled. This
+* RX FIFO flushing makes sure, that these chars are read out and
+* the RX interrupts works as expected.
+*/
+   rx_fifo_to_buf(dev);
+
+   return plat->rd_ptr != plat->wr_ptr ? 1 : 0;
+}
+
+static int rx_get(struct udevice *dev)
+{
+   struct ns16550_platdata *plat = dev->platdata;
+   char val;
+
+   val = plat->buf[plat->rd_ptr++];
+   plat->rd_ptr %= BUF_COUNT;
+
+   return val;
+}
+
+void ns16550_handle_irq(void *data)
+{
+   struct udevice *dev = (struct udevice *)data;
+   struct NS16550 *const com_port = dev_get_priv(dev);
+
+   /* Check if interrupt is pending */
+   if (serial_in(&com_port->iir) & UART_IIR_NO_INT)
+   return;
+
+   /* Flush all available characters from the RX FIFO into the RX buffer */
+   rx_fifo_to_buf(dev);
+}
+
+#else /* CONFIG_SERIAL_IRQ_BUFFER */
+
+static int rx_pending(struct udevice *dev)
+{
+   struct NS16550 *const com_port = dev_get_priv(dev);
+
+   return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0;
+}
+
+static int rx_get(struct udevice *dev)
+{
+   struct NS16550 *const com_port = dev_get_priv(dev);
+
+   return serial_in(&com_port->rbr);
+}
+
+#endif /* CONFIG_SERIAL_IRQ_BUFFER */
+
 static int ns16550_serial_putc(struct udevice *dev, const char ch)
 {
struct NS16550 *const com_port = dev_get_priv(dev);
@@ -340,19 +414,17 @@ static int ns16550_serial_pending(struct udevice *dev, 
bool input)
struct NS16550 *const com_port = dev_get_priv(dev);
 
if (input)
-   return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0;
+   return rx_pending(dev);
else
return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1;
 }
 
 static int ns16550_serial_getc(struct udevice *dev)
 {
-   struct NS16550 *const com_port = dev_get_priv(dev);
-
-   if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
+   if (!ns16550_serial_pending(dev, true))
return -EAGAIN;
 
-   return serial_in(&com_port->rbr);
+   return rx_get(dev);
 }
 
 static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
@@ -375,6 +447,34 @@ int ns16550_serial_probe(struct udevice *dev)
com_port->plat = dev_get_platdata(dev);
NS16550_init(com_port, -1);
 
+#if CONFIG_IS_ENABLED(SERIAL_IRQ_BUFFER)
+   if (gd->flag

Re: [U-Boot] [PATCH] serial: ns16550: Add RX interrupt buffer support

[Stefan Roese]

Hi Simon,

On 14.07.2017 15:50, Simon Glass wrote:
> On 13 July 2017 at 05:33, Stefan Roese  wrote:
>> Pasting longer lines into the U-Boot console prompt sometimes leads to
>> characters missing. One problem here is the small 16-byte FIFO of the
>> legacy NS16550 UART, e.g. on x86 platforms.
>>
>> This patch now introduces a Kconfig option to enable RX interrupt
>> buffer support for NS16550 style UARTs. With this option enabled, I was
>> able paste really long lines into the U-Boot console, without any
>> characters missing.
>>
>> Signed-off-by: Stefan Roese 
>> Cc: Simon Glass 
>> Cc: Bin Meng 
>> ---
>>   drivers/serial/Kconfig   |  10 +
>>   drivers/serial/ns16550.c | 106 
>> ---
>>   include/ns16550.h|   6 +++
>>   3 files changed, 117 insertions(+), 5 deletions(-)
> 
> Reviewed-by: Simon Glass 
> 
> nits below
> 
>>
>> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
>> index b7dd2ac103..8284febae3 100644
>> --- a/drivers/serial/Kconfig
>> +++ b/drivers/serial/Kconfig
>> @@ -64,6 +64,16 @@ config DM_SERIAL
>>implements serial_putc() etc. The uclass interface is
>>defined in include/serial.h.
>>
>> +config SERIAL_IRQ_BUFFER
>> +   bool "Enable RX interrupt buffer for serial input"
>> +   depends on DM_SERIAL
>> +   default n
>> +   help
>> + Enable RX interrupt buffer support for the serial driver.
>> + This enables pasting longer strings, even when the RX FIFO
>> + of the UART is not big enough (e.g. 16 bytes on the normal
>> + NS16550).
>> +
>>   config SPL_DM_SERIAL
>>  bool "Enable Driver Model for serial drivers in SPL"
>>  depends on DM_SERIAL
>> diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
>> index e0e70244ce..686c088e1d 100644
>> --- a/drivers/serial/ns16550.c
>> +++ b/drivers/serial/ns16550.c
>> @@ -315,6 +315,80 @@ DEBUG_UART_FUNCS
>>   #endif
>>
>>   #ifdef CONFIG_DM_SERIAL
>> +
>> +#if CONFIG_IS_ENABLED(SERIAL_IRQ_BUFFER)
>> +
>> +#define BUF_COUNT  256
>> +
>> +static void rx_fifo_to_buf(struct udevice *dev)
>> +{
>> +   struct NS16550 *const com_port = dev_get_priv(dev);
>> +   struct ns16550_platdata *plat = dev->platdata;
>> +
>> +   /* Read all available chars into buffer */
>> +   while ((serial_in(&com_port->lsr) & UART_LSR_DR)) {
>> +   plat->buf[plat->wr_ptr++] = serial_in(&com_port->rbr);
>> +   plat->wr_ptr %= BUF_COUNT;
>> +   }
>> +}
>> +
>> +static int rx_pending(struct udevice *dev)
>> +{
>> +   struct ns16550_platdata *plat = dev->platdata;
>> +
>> +   /*
>> +* At startup it may happen, that some already received chars are
>> +* "stuck" in the RX FIFO, even with the interrupt enabled. This
>> +* RX FIFO flushing makes sure, that these chars are read out and
>> +* the RX interrupts works as expected.
>> +*/
>> +   rx_fifo_to_buf(dev);
>> +
>> +   return plat->rd_ptr != plat->wr_ptr ? 1 : 0;
>> +}
>> +
>> +static int rx_get(struct udevice *dev)
>> +{
>> +   struct ns16550_platdata *plat = dev->platdata;
>> +   char val;
>> +
>> +   val = plat->buf[plat->rd_ptr++];
>> +   plat->rd_ptr %= BUF_COUNT;
>> +
>> +   return val;
>> +}
>> +
>> +void ns16550_handle_irq(void *data)
>> +{
>> +   struct udevice *dev = (struct udevice *)data;
>> +   struct NS16550 *const com_port = dev_get_priv(dev);
>> +
>> +   /* Check if interrupt is pending */
>> +   if (serial_in(&com_port->iir) & UART_IIR_NO_INT)
>> +   return;
>> +
>> +   /* Flush all available characters from the RX FIFO into the RX 
>> buffer */
>> +   rx_fifo_to_buf(dev);
>> +}
>> +
>> +#else /* CONFIG_SERIAL_IRQ_BUFFER */
>> +
>> +static int rx_pending(struct udevice *dev)
>> +{
>> +   struct NS16550 *const com_port = dev_get_priv(dev);
>> +
>> +   return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0;
>> +}
>> +
>> +static int rx_get(struct udevice *dev)
>> +{
>> +   struct NS16550 *const com_port = dev_get_priv(dev);
>> +
>> +   return serial_in(&com_port->rbr);
>> +}
>> +
>> +#endif /* CONFIG_SERIAL_IRQ_BUFFER */
>> +
>>   static int ns16550_serial_putc(struct udevice *dev, const char ch)
>>   {
>>  struct NS16550 *const com_port = dev_get_priv(dev);
>> @@ -340,19 +414,17 @@ static int ns16550_serial_pending(struct udevice *dev, 
>> bool input)
>>  struct NS16550 *const com_port = dev_get_priv(dev);
>>
>>  if (input)
>> -   return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0;
>> +   return rx_pending(dev);
>>  else
>>  return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1;
>>   }
>>
>>   static int ns16550_serial_getc(struct udevice *dev)
>>   {
>> -   struct NS16550 *const com_port = dev_get_priv(dev);
>> -
>> -   if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
>> +   if (!ns16550_serial_p

Re: [U-Boot] Cubox-i broken

[Peter Robinson]

On Fri, Jul 14, 2017 at 12:07 AM, Fabio Estevam  wrote:
> Hi Stefano,
>
> On Wed, Jul 12, 2017 at 6:00 AM, Stefano Babic  wrote:
>> Hi Peter,
>>
>> your :
>>
>> commit ff1815632563a826cfe49fc9496a36d00febb6e3
>> Author: Peter Robinson 
>> Date:   Sat Jul 1 18:44:03 2017 +0100
>>
>> mx6cuboxi: Add support for sata
>>
>>
>> breaks (indirectly) mx6cuboxi. It is associated with changes in
>> config_distro_bootcmd.h, my first guess is for :
>
> I have sent a fix for this issue, thanks.

Thank you both for this, sorry for the delayed response, it's been a busy week!

Peter
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Re: [U-Boot] [PATCH 1/3] usb: gadget: move USB_FUNCTION_MASS_STORAGE to Kconfig

[Dr. Philipp Tomsich]

> On 14 Jul 2017, at 16:48, Marek Vasut  wrote:
> 
> On 07/14/2017 04:22 PM, Philipp Tomsich wrote:
>> In order to easily model a that CMD_USB_MASS_STORAGE implies having
>> USB_FUNCTION_MASS_STORAGE enabled, we first need to migrate
>> USB_FUNCTION_MASS_STORAGE to Kconfig.
>> 
>> Signed-off-by: Philipp Tomsich 
>> ---
>> 
>> drivers/usb/gadget/Kconfig | 9 +
>> 1 file changed, 9 insertions(+)
>> 
>> diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
>> index 261ed12..1c4a4f2 100644
>> --- a/drivers/usb/gadget/Kconfig
>> +++ b/drivers/usb/gadget/Kconfig
>> @@ -34,6 +34,15 @@ menuconfig USB_GADGET
>> peripheral/device side bus controller, and a "gadget driver" for
>> your peripheral protocol.
>> 
>> +config USB_FUNCTION_MASS_STORAGE
>> +bool "USB mass-storage class implementation"
>> +help
> 
> The alignment of "help" and "bool" above looks weird

Tabs vs. Spaces, it appears.
Do you want me to send a v2?

> 
>> +  The Mass Storage Function acts as a USB Mass Storage device
>> +  appearing to the host as a disk drive or as a CD-ROM drive.
>> +
>> +  This is required (and implied) by the USB mass-storage emulation
>> +  command ('ums').
>> +
>> if USB_GADGET
>> 
>> config USB_GADGET_ATMEL_USBA
>> 
> 
> 
> -- 
> Best regards,
> Marek Vasut

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Re: [U-Boot] [PATCH 1/3] usb: gadget: move USB_FUNCTION_MASS_STORAGE to Kconfig

[Marek Vasut]

On 07/14/2017 04:22 PM, Philipp Tomsich wrote:
> In order to easily model a that CMD_USB_MASS_STORAGE implies having
> USB_FUNCTION_MASS_STORAGE enabled, we first need to migrate
> USB_FUNCTION_MASS_STORAGE to Kconfig.
> 
> Signed-off-by: Philipp Tomsich 
> ---
> 
>  drivers/usb/gadget/Kconfig | 9 +
>  1 file changed, 9 insertions(+)
> 
> diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
> index 261ed12..1c4a4f2 100644
> --- a/drivers/usb/gadget/Kconfig
> +++ b/drivers/usb/gadget/Kconfig
> @@ -34,6 +34,15 @@ menuconfig USB_GADGET
>  peripheral/device side bus controller, and a "gadget driver" for
>  your peripheral protocol.
>  
> +config USB_FUNCTION_MASS_STORAGE
> +bool "USB mass-storage class implementation"
> + help

The alignment of "help" and "bool" above looks weird

> +   The Mass Storage Function acts as a USB Mass Storage device
> +   appearing to the host as a disk drive or as a CD-ROM drive.
> +
> +   This is required (and implied) by the USB mass-storage emulation
> +   command ('ums').
> +
>  if USB_GADGET
>  
>  config USB_GADGET_ATMEL_USBA
> 


-- 
Best regards,
Marek Vasut
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[U-Boot] [PATCH] rockchip: rk3399: enable SPL_SERIAL_SUPPORT and SPL_DRIVERS_MISC via Kconfig

[Philipp Tomsich]

SPL_SERIAL_SUPPORT and SPL_DRIVERS_MISC were previously enabled through
rk3399_common.h.  This change implies these options through Kconfig.

These need to always be active for the RK3399, as follows:
 - SPL_SERIAL_SUPPORT is needed to pass the SPL build
 - SPL_DRIVERS_MISC is needed to pass the SPL build

Signed-off-by: Philipp Tomsich 
---

 arch/arm/mach-rockchip/Kconfig  | 2 ++
 include/configs/rk3399_common.h | 2 --
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 545c19e..0d85c2f 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -94,6 +94,8 @@ config ROCKCHIP_RK3399
select SUPPORT_SPL
select SPL
select SPL_SEPARATE_BSS
+   select SPL_SERIAL_SUPPORT
+   select SPL_DRIVERS_MISC
select ENABLE_ARM_SOC_BOOT0_HOOK
select DEBUG_UART_BOARD_INIT
help
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 54ea97b..6c9d760 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -16,8 +16,6 @@
 #define CONFIG_SYS_CBSIZE  1024
 #define CONFIG_SKIP_LOWLEVEL_INIT
 #define CONFIG_SPL_FRAMEWORK
-#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
 #if defined(CONFIG_SPL_SPI_SUPPORT)
 #define CONFIG_SPL_SPI_LOAD
 #endif
-- 
2.1.4

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[U-Boot] [PATCH 2/3] Kconfig: CMD_USB_MASS_STORAGE implies USB_FUNCTION_MASS_STORAGE

[Philipp Tomsich]

There's an unconditional dependency from the mass-storage command
onto the mass-storage function through a call to fsg_main_thread(...).
If USB_FUNCTION_MASS_STORAGE is not enabled, this will result in
link-errors when CMD_USB_MASS_STORAGE is enabled.

Let's introduce an 'implies' relationship to model this dependency.

Signed-off-by: Philipp Tomsich 
---

 cmd/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 6758db1..a60a568 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -667,6 +667,7 @@ config CMD_DFU
 
 config CMD_USB_MASS_STORAGE
bool "UMS usb mass storage"
+   imply USB_FUNCTION_MASS_STORAGE
help
  USB mass storage support
 
-- 
2.1.4

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[U-Boot] [PATCH 1/3] usb: gadget: move USB_FUNCTION_MASS_STORAGE to Kconfig

[Philipp Tomsich]

In order to easily model a that CMD_USB_MASS_STORAGE implies having
USB_FUNCTION_MASS_STORAGE enabled, we first need to migrate
USB_FUNCTION_MASS_STORAGE to Kconfig.

Signed-off-by: Philipp Tomsich 
---

 drivers/usb/gadget/Kconfig | 9 +
 1 file changed, 9 insertions(+)

diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 261ed12..1c4a4f2 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -34,6 +34,15 @@ menuconfig USB_GADGET
   peripheral/device side bus controller, and a "gadget driver" for
   your peripheral protocol.
 
+config USB_FUNCTION_MASS_STORAGE
+bool "USB mass-storage class implementation"
+   help
+ The Mass Storage Function acts as a USB Mass Storage device
+ appearing to the host as a disk drive or as a CD-ROM drive.
+
+ This is required (and implied) by the USB mass-storage emulation
+ command ('ums').
+
 if USB_GADGET
 
 config USB_GADGET_ATMEL_USBA
-- 
2.1.4

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Re: [U-Boot] [PATCH 4/5] dm: ofnode: rename dev_read_prop() to dev_get_property()

[Simon Glass]

Hi Masahiro,

On 13 July 2017 at 20:38, Masahiro Yamada  wrote:
> Hi Simon,
>
>
> 2017-07-07 12:57 GMT+09:00 Simon Glass :
>> Hi Masahiro,
>>
>> On 5 July 2017 at 22:49, Simon Glass  wrote:
>>> On 22 June 2017 at 01:54, Masahiro Yamada  
>>> wrote:
 The previous commit renamed ofnode_read_prop() to ofnode_get_propery()
 and fixed its return type.  Likewise, rename dev_read_prop() and fix
 its return type.

 Signed-off-by: Masahiro Yamada 
 ---

  drivers/core/read.c| 3 ++-
  drivers/input/key_matrix.c | 4 ++--
  include/dm/read.h  | 9 +
  3 files changed, 9 insertions(+), 7 deletions(-)
>>>
>>> Acked-by: Simon Glass 
>>
>> Actually I take that back. I'd like all functions in read.h to start
>> with dev_read...().
>>
>
> Do you want me to fix the return type?

Yes void * would be better I suppose. Also what happened with that
patch with the DEBUG problem?

Regards,
Simon
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Re: [U-Boot] [RFC PATCH 1/9] mx6: Add board mx6memcal for use in validating DDR

[Fabio Estevam]

Hi Eric,

On Tue, Nov 1, 2016 at 5:13 PM, Eric Nelson  wrote:
> This is a virtual "board" that uses configuration files and
> Kconfig to define the memory layout used by a real board during
> the board bring-up process.
>
> It generates an SPL image that can be loaded using imx_usb or
> SB_LOADER.exe.
>
> When run, it will generate a set of calibration constants for
> use in either or both a DCD configuration file for boards that
> use u-boot.imx or struct mx6_mmdc_calibration for boards that
> boot via SPL.
>
> In essence, it is a configurable, open-source variant of the
> Freescale ddr-stress tool.
>
> https://community.nxp.com/docs/DOC-105652
>
> File mx6memcal_defconfig configures the board for use with
> mx6sabresd or mx6qsabreauto.

Do you still have plans on refreshing this series?

It does seem very useful.

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Re: [U-Boot] [PATCH] rockchip: rk3229: add dwc2 node for fastboot

[Simon Glass]

Hi Phlipp,

On 14 July 2017 at 07:53, Dr. Philipp Tomsich
 wrote:
> Simon,
>
> the patch is in Patchworks and seems to have been picked from the same mail 
> that you replied to:
> https://patchwork.ozlabs.org/patch/787493/
>

OK that's good then.

Regards,
Simon

> Philipp.
>
>> On 14 Jul 2017, at 15:50, Simon Glass  wrote:
>>
>> Hi Meng,
>>
>> On 12 July 2017 at 20:59, Meng Dongyang  wrote:
>>> The dwc2 gadget function will get address from DT when fastboot start,
>>> so we need to add dwc2 node to support fastboot.
>>>
>>> Meng Dongyang (1):
>>>  rockchip: dts: rk3229: add dwc2 node for fastboot
>>>
>>> arch/arm/dts/rk3229-evb.dts |  4 
>>> arch/arm/dts/rk322x.dtsi| 10 ++
>>> 2 files changed, 14 insertions(+)
>>>
>>> --
>>> 1.9.1
>>>
>>>
>>
>> The patch seems to be missing.
>>
>> - Simon
>
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Re: [U-Boot] [PATCH] rockchip: rk3229: add dwc2 node for fastboot

[Dr. Philipp Tomsich]

Simon,

the patch is in Patchworks and seems to have been picked from the same mail 
that you replied to:
https://patchwork.ozlabs.org/patch/787493/

Philipp.

> On 14 Jul 2017, at 15:50, Simon Glass  wrote:
> 
> Hi Meng,
> 
> On 12 July 2017 at 20:59, Meng Dongyang  wrote:
>> The dwc2 gadget function will get address from DT when fastboot start,
>> so we need to add dwc2 node to support fastboot.
>> 
>> Meng Dongyang (1):
>>  rockchip: dts: rk3229: add dwc2 node for fastboot
>> 
>> arch/arm/dts/rk3229-evb.dts |  4 
>> arch/arm/dts/rk322x.dtsi| 10 ++
>> 2 files changed, 14 insertions(+)
>> 
>> --
>> 1.9.1
>> 
>> 
> 
> The patch seems to be missing.
> 
> - Simon

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Re: [U-Boot] [PATCH 3/5] fdt: Allow stacked overlays phandle references

[Simon Glass]

Hi Pantelis,

On 7 July 2017 at 01:02, Pantelis Antoniou
 wrote:
> Hi Simon,
>
> On Thu, 2017-07-06 at 21:58 -0600, Simon Glass wrote:
>> On 30 June 2017 at 10:23, Pantelis Antoniou
>>  wrote:
>> > This patch enables an overlay to refer to a previous overlay's
>> > labels by performing a merge of symbol information at application
>> > time.
>> >
>> > In a nutshell it allows an overlay to refer to a symbol that a previous
>> > overlay has defined. It requires both the base and all the overlays
>> > to be compiled with the -@ command line switch so that symbol
>> > information is included.
>> >
>> > base.dts
>> > 
>> >
>> > /dts-v1/;
>> > / {
>> > foo: foonode {
>> > foo-property;
>> > };
>> > };
>> >
>> > $ dtc -@ -I dts -O dtb -o base.dtb base.dts
>> >
>> > bar.dts
>> > ---
>> >
>> > /dts-v1/;
>> > /plugin/;
>> > / {
>> > fragment@1 {
>> > target = <&foo>;
>> > __overlay__ {
>> > overlay-1-property;
>> > bar: barnode {
>> > bar-property;
>> > };
>> > };
>> > };
>> > };
>> >
>> > $ dtc -@ -I dts -O dtb -o bar.dtb bar.dts
>> >
>> > baz.dts
>> > ---
>> >
>> > /dts-v1/;
>> > /plugin/;
>> > / {
>> > fragment@1 {
>> > target = <&bar>;
>> > __overlay__ {
>> > overlay-2-property;
>> > baz: baznode {
>> > baz-property;
>> > };
>> > };
>> > };
>> > };
>> >
>> > $ dtc -@ -I dts -O dtb -o baz.dtb baz.dts
>> >
>> > Applying the overlays:
>> >
>> > $ fdtoverlay -i base.dtb -o target.dtb bar.dtb baz.dtb
>> >
>> > Dumping:
>> >
>> > $ fdtdump target.dtb
>> > / {
>> > foonode {
>> > overlay-1-property;
>> > foo-property;
>> > linux,phandle = <0x0001>;
>> > phandle = <0x0001>;
>> > barnode {
>> > overlay-2-property;
>> > phandle = <0x0002>;
>> > linux,phandle = <0x0002>;
>> > bar-property;
>> > baznode {
>> > phandle = <0x0003>;
>> > linux,phandle = <0x0003>;
>> > baz-property;
>> > };
>> > };
>> > };
>> > __symbols__ {
>> > baz = "/foonode/barnode/baznode";
>> > bar = "/foonode/barnode";
>> > foo = "/foonode";
>> > };
>> > };
>> >
>> > Signed-off-by: Pantelis Antoniou 
>> > ---
>> >  lib/libfdt/fdt_overlay.c | 148 
>> > ++-
>> >  1 file changed, 147 insertions(+), 1 deletion(-)
>>
>> Reviewed-by: Simon Glass 
>>
>> I suppose that the upstream version has tests?
>>
>
> Yes, and I could use a couple reviewers in the dtc mailing list.

Ah OK, I will take a look.

>
>> Does it make sense to implement this in the live tree instead, or do
>> you need to modify the DT before relocation?
>>
>
> There is a port of a patch that works on the live tree; I guess I can
> port it to u-boot's live tree as well.

Do you mean 'as well'? I am wondering if we can get away with only
supporting the live tree for overlays. Or do you think that will be
too limiting?

Obviously the live and flat tree versions do essentially the same
thing, so if we can it would be good to include only one version of
the code.

>
> Speaking of which I've done quite a bit of work on a different live tree
> implementation as well. I would propose we split off u-boot's one in a
> library and port my changes there. That way we can have a definitive
> live tree implementation, and in the future move dtc's internal live
> tree to it as well. We keep on implementing the same functionality in
> different flavors for years, let's consolidate, and start working on
> ideas for the future.

What about the kernel? I took most of the of_access.c code from there
and trying to avoid changing it as much as possible. The extra bits
for U-Boot are the ofnode implementation (to permit transparent use of
live/flat trees) and of course dev_read_...().

I think it would be great to have a live tree upstream in dtc that we
can pull into U-Boot. But I'm keen to line it up with Linux.

Regards,
Simon
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Re: [U-Boot] [PATCH 4/6] sunxi: GPIO: introduce sunxi_gpio_setup_dt_pins()

[Dr. Philipp Tomsich]

> On 14 Jul 2017, at 15:50, Simon Glass  wrote:
> 
> +Tom
> 
> On 7 July 2017 at 04:30, Andre Przywara  > wrote:
>> Hi Simon,
>> 
>> On 07/07/17 04:58, Simon Glass wrote:
>>> Hi Andre,
>>> 
>>> On 2 July 2017 at 18:59, Andre Przywara  wrote:
 Instead of hard-coding GPIO pins used for a certain peripheral, we
 should just use the pinctrl information from the DT.
 The sun8i-emac driver has some simple implementation of that, so
 let's just generalize this and copy the code to a more common
 location.
 On the way we add support for the new, generic pinctrl binding now
 used by all Allwinner SoCs.
 
 Signed-off-by: Andre Przywara 
 ---
 arch/arm/include/asm/arch-sunxi/gpio.h |  3 ++
 arch/arm/mach-sunxi/pinmux.c   | 79 
 ++
 2 files changed, 82 insertions(+)
>>> 
>>> It looks like this should be done with a pinctrl driver, shouldn't it?
>> 
>> I knew you would say this ;-)
>> 
>> So technically you are right, but it looks like this is quite some work.
>> And as patch 5/6 demonstrates, this code here was actually already
>> mostly in, so this is basically just moving and generalisation.
>> 
>> The whole purpose of this series is to prepare for merging in the Linux
>> 4.13-rc1 DTs and still have working Ethernet, so I wanted to keep the
>> bar low on this.
>> 
>> I haven't looked in detail what it would take to have a proper Allwinner
>> pinctrl DM driver, but the binding Linux uses is not "self-contained",
>> as we still need SoC specific knowledge (namely into which actual mux
>> value the "emac" string, for instance, translates to; and this is per
>> SoC and pin). So that means pulling *a lot of* tables into U-Boot, which
>> I am not sure is worth at this point. We might get away with some
>> short-cuts, basically keeping our hard coded mux values around or just
>> defining those that we actually need.
>> But in general I consider this work more long term, and it should not
>> halt the more important goal of having the Linux and U-Boot DTs in sync.
> 
> With a due sense of foreboding and dread:
> 
> Reviewed-by: Simon Glass mailto:s...@chromium.org>>

I had submitted a DM driver to do this a long time ago, which included these
tables for the A64 (and had the necessary infrastructure to quickly add other
boards).

This was still tight enough, even to fit into an AArch64 SPL stage.

So I don’t see the purpose of not doing a DM pinctrl for sunxi, as the tables
can easily be shared between U-Boot and Linux—i.e. I had used the Linux
tables verbatim and only added a few lines of wrapper for U-Boot.

Regards,
Philipp.
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Re: [U-Boot] [PATCH v2 09/15] usb: xhci: Program 'route string' in the input slot context

[Simon Glass]

On 12 July 2017 at 02:37, Bin Meng  wrote:
> xHCI spec says: the values of the 'route string' field shall be
> initialized by the first 'Address Device' command issued to a
> device slot, and shall not be modified by any other command.
>
> So far U-Boot does not program this field, and it does not prevent
> SS device directly attached to root port, or HS device behind an HS
> hub, from working, due to the fact that 'route string' is used by
> the xHC to target SS packets. But in order to enumerate devices
> behind an SS hub, this field must be programmed.
>
> With this commit and along with previous commits, now SS & HS devices
> attached to a USB 3.0 hub can be enumerated by U-Boot.
>
> As usual, this new feature is only available when DM is on.
>
> Signed-off-by: Bin Meng 
>
> ---
> Test logs: two USB 3.0 hubs (one tier2, one tier3)
> => usb tree
> USB device tree:
>   1  Hub (5 Gb/s, 0mA)
>   |  U-Boot XHCI Host Controller
>   |
>   +-2  Hub (5 Gb/s, 0mA)
>   | |  GenesysLogic USB3.0 Hub
>   | |
>   | +-4  Hub (5 Gb/s, 0mA)
>   | | |  VIA Labs, Inc.  USB3.0 Hub
>   | | |
>   | | +-7  Mass Storage (5 Gb/s, 76mA)
>   | |  JetFlash Mass Storage Device 16Q6ZPH20GF3E8UQ
>   | |
>   | +-8  Vendor specific (5 Gb/s, 36mA)
>   |  Realtek USB 10/100/1000 LAN 00E04C680977
>   |
>   +-3  Hub (480 Mb/s, 100mA)
> |  GenesysLogic USB2.0 Hub
> |
> +-5  Mass Storage (480 Mb/s, 200mA)
> |Netac OnlyDisk FF00ECB608001526
> |
> +-6  Hub (480 Mb/s, 0mA)
>  VIA Labs, Inc.  USB2.0 Hub
>
> Changes in v2:
> - handle port number is greater than 15 in route string
>
>  drivers/usb/host/xhci-mem.c | 30 +-
>  1 file changed, 29 insertions(+), 1 deletion(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH 1/1] efi_loader: provide meaningful status code

[Alexander Graf]

On 14.07.17 15:47, Simon Glass wrote:

Hi,

On 3 July 2017 at 06:21, Alexander Graf  wrote:

On 06/25/2017 10:56 PM, Heinrich Schuchardt wrote:


Currenty any EFI status other than EFI_SUCCESS is reported as
Application terminated, r = -22

With the patch the status code and its mnemonic is printed.

Signed-off-by: Heinrich Schuchardt 



While I think it's very useful to have the status code, I don't want to
waste 1kb of .rodata on every binary out there - that will only drive more
people to disable CONFIG_EFI_LOADER which is the opposite of what we want.

Can you please respin without the string return for now? Maybe we can add a
CONFIG_EFI_LOADER_DEBUG option later on which gives us verbose printing on
demand on a few more bits.


I think the error messages are useful and would like to see this new
option. Bonus points if they can be in lower case :-)


Ah, one thing I forgot to mention:

If we want to revive the string conversion, it's probably a good idea to 
do it using macros. Something like


#define EFI_STATUS_CASE(x) case x: return stringify(x)
switch(status_code) {
EFI_STATUS_CASE(EFI_SUCCESS);
EFI_STATUS_CASE(EFI_amazing_error);
}
#undef EFI_STATUS_CASE

That way we don't repeat the code twice ;).


Alex
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Re: [U-Boot] [PATCH 1/1] efi_loader: provide meaningful status code

[Alexander Graf]

On 14.07.17 15:47, Simon Glass wrote:

Hi,

On 3 July 2017 at 06:21, Alexander Graf  wrote:

On 06/25/2017 10:56 PM, Heinrich Schuchardt wrote:


Currenty any EFI status other than EFI_SUCCESS is reported as
Application terminated, r = -22

With the patch the status code and its mnemonic is printed.

Signed-off-by: Heinrich Schuchardt 



While I think it's very useful to have the status code, I don't want to
waste 1kb of .rodata on every binary out there - that will only drive more
people to disable CONFIG_EFI_LOADER which is the opposite of what we want.

Can you please respin without the string return for now? Maybe we can add a
CONFIG_EFI_LOADER_DEBUG option later on which gives us verbose printing on
demand on a few more bits.


I think the error messages are useful and would like to see this new
option. Bonus points if they can be in lower case :-)


Yeah, thinking about it again, we can even add the string conversion as 
is but not call it if DEBUG_EFI is not set ;).


And yes, I would really prefer to make all the debugging facilities here 
slightly more fine grained and smarter.



Alex
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Re: [U-Boot] [PATCH] rockchip: rk3229: add dwc2 node for fastboot

[Simon Glass]

Hi Meng,

On 12 July 2017 at 20:59, Meng Dongyang  wrote:
> The dwc2 gadget function will get address from DT when fastboot start,
> so we need to add dwc2 node to support fastboot.
>
> Meng Dongyang (1):
>   rockchip: dts: rk3229: add dwc2 node for fastboot
>
>  arch/arm/dts/rk3229-evb.dts |  4 
>  arch/arm/dts/rk322x.dtsi| 10 ++
>  2 files changed, 14 insertions(+)
>
> --
> 1.9.1
>
>

The patch seems to be missing.

- Simon
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Re: [U-Boot] [PATCH] serial: ns16550: Add RX interrupt buffer support

[Simon Glass]

On 13 July 2017 at 05:33, Stefan Roese  wrote:
> Pasting longer lines into the U-Boot console prompt sometimes leads to
> characters missing. One problem here is the small 16-byte FIFO of the
> legacy NS16550 UART, e.g. on x86 platforms.
>
> This patch now introduces a Kconfig option to enable RX interrupt
> buffer support for NS16550 style UARTs. With this option enabled, I was
> able paste really long lines into the U-Boot console, without any
> characters missing.
>
> Signed-off-by: Stefan Roese 
> Cc: Simon Glass 
> Cc: Bin Meng 
> ---
>  drivers/serial/Kconfig   |  10 +
>  drivers/serial/ns16550.c | 106 
> ---
>  include/ns16550.h|   6 +++
>  3 files changed, 117 insertions(+), 5 deletions(-)

Reviewed-by: Simon Glass 

nits below

>
> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
> index b7dd2ac103..8284febae3 100644
> --- a/drivers/serial/Kconfig
> +++ b/drivers/serial/Kconfig
> @@ -64,6 +64,16 @@ config DM_SERIAL
>   implements serial_putc() etc. The uclass interface is
>   defined in include/serial.h.
>
> +config SERIAL_IRQ_BUFFER
> +   bool "Enable RX interrupt buffer for serial input"
> +   depends on DM_SERIAL
> +   default n
> +   help
> + Enable RX interrupt buffer support for the serial driver.
> + This enables pasting longer strings, even when the RX FIFO
> + of the UART is not big enough (e.g. 16 bytes on the normal
> + NS16550).
> +
>  config SPL_DM_SERIAL
> bool "Enable Driver Model for serial drivers in SPL"
> depends on DM_SERIAL
> diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
> index e0e70244ce..686c088e1d 100644
> --- a/drivers/serial/ns16550.c
> +++ b/drivers/serial/ns16550.c
> @@ -315,6 +315,80 @@ DEBUG_UART_FUNCS
>  #endif
>
>  #ifdef CONFIG_DM_SERIAL
> +
> +#if CONFIG_IS_ENABLED(SERIAL_IRQ_BUFFER)
> +
> +#define BUF_COUNT  256
> +
> +static void rx_fifo_to_buf(struct udevice *dev)
> +{
> +   struct NS16550 *const com_port = dev_get_priv(dev);
> +   struct ns16550_platdata *plat = dev->platdata;
> +
> +   /* Read all available chars into buffer */
> +   while ((serial_in(&com_port->lsr) & UART_LSR_DR)) {
> +   plat->buf[plat->wr_ptr++] = serial_in(&com_port->rbr);
> +   plat->wr_ptr %= BUF_COUNT;
> +   }
> +}
> +
> +static int rx_pending(struct udevice *dev)
> +{
> +   struct ns16550_platdata *plat = dev->platdata;
> +
> +   /*
> +* At startup it may happen, that some already received chars are
> +* "stuck" in the RX FIFO, even with the interrupt enabled. This
> +* RX FIFO flushing makes sure, that these chars are read out and
> +* the RX interrupts works as expected.
> +*/
> +   rx_fifo_to_buf(dev);
> +
> +   return plat->rd_ptr != plat->wr_ptr ? 1 : 0;
> +}
> +
> +static int rx_get(struct udevice *dev)
> +{
> +   struct ns16550_platdata *plat = dev->platdata;
> +   char val;
> +
> +   val = plat->buf[plat->rd_ptr++];
> +   plat->rd_ptr %= BUF_COUNT;
> +
> +   return val;
> +}
> +
> +void ns16550_handle_irq(void *data)
> +{
> +   struct udevice *dev = (struct udevice *)data;
> +   struct NS16550 *const com_port = dev_get_priv(dev);
> +
> +   /* Check if interrupt is pending */
> +   if (serial_in(&com_port->iir) & UART_IIR_NO_INT)
> +   return;
> +
> +   /* Flush all available characters from the RX FIFO into the RX buffer 
> */
> +   rx_fifo_to_buf(dev);
> +}
> +
> +#else /* CONFIG_SERIAL_IRQ_BUFFER */
> +
> +static int rx_pending(struct udevice *dev)
> +{
> +   struct NS16550 *const com_port = dev_get_priv(dev);
> +
> +   return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0;
> +}
> +
> +static int rx_get(struct udevice *dev)
> +{
> +   struct NS16550 *const com_port = dev_get_priv(dev);
> +
> +   return serial_in(&com_port->rbr);
> +}
> +
> +#endif /* CONFIG_SERIAL_IRQ_BUFFER */
> +
>  static int ns16550_serial_putc(struct udevice *dev, const char ch)
>  {
> struct NS16550 *const com_port = dev_get_priv(dev);
> @@ -340,19 +414,17 @@ static int ns16550_serial_pending(struct udevice *dev, 
> bool input)
> struct NS16550 *const com_port = dev_get_priv(dev);
>
> if (input)
> -   return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0;
> +   return rx_pending(dev);
> else
> return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1;
>  }
>
>  static int ns16550_serial_getc(struct udevice *dev)
>  {
> -   struct NS16550 *const com_port = dev_get_priv(dev);
> -
> -   if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
> +   if (!ns16550_serial_pending(dev, true))
> return -EAGAIN;
>
> -   return serial_in(&com_port->rbr);
> +   return rx_get(dev);
>  }
>
>  static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
> @@ -375,6 +447,21 

Re: [U-Boot] [PATCH v2 04/15] usb: hub: Remove hub_port_reset()

[Simon Glass]

On 12 July 2017 at 02:37, Bin Meng  wrote:
> At present hub_port_reset() is defined in DM USB, but it is never
> called hence remove it (removing another ifdefs).
>
> While we are here, change legacy_hub_port_reset() name to
> usb_hub_port_reset() to better match other function names in the
> same hub module.
>
> Signed-off-by: Bin Meng 
>
> ---
>
> Changes in v2:
> - new patch to "remove hub_port_reset()"
>
>  common/usb_hub.c | 25 +
>  include/usb.h| 18 --
>  2 files changed, 13 insertions(+), 30 deletions(-)

Reviewed-by: Simon Glass 
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Re: [U-Boot] [PATCH 3/3] dm: syscon: scan sub-nodes of the syscon node

[Simon Glass]

On 12 July 2017 at 03:55, Jean-Jacques Hiblot  wrote:
> This allow to probe devices that are defined under a syscon node
>
> Signed-off-by: Jean-Jacques Hiblot 
> ---
>  drivers/core/syscon-uclass.c | 1 +
>  1 file changed, 1 insertion(+)

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[U-Boot] [PATCH] arm: omap3: Detect boot mode very early

[Adam Ford]

Fixes 4bd754d8abef ("arm: omap: Detect boot mode very early") where
the intent was to store the boot params information in a known
location and pass it to SPL very early. Unfortunately it didn't
account for OMAP3 boards.

This patch adds adds this functionality back into OMAP3 boards.

Reviewed-by: Lokesh Vutla 
Signed-off-by: Adam Ford 

diff --git a/arch/arm/mach-omap2/omap3/board.c 
b/arch/arm/mach-omap2/omap3/board.c
index cd8e302..a61b933 100644
--- a/arch/arm/mach-omap2/omap3/board.c
+++ b/arch/arm/mach-omap2/omap3/board.c
@@ -212,6 +212,12 @@ void board_init_f(ulong dummy)
 {
early_system_init();
mem_init();
+   /*
+   * Save the boot parameters passed from romcode.
+   * We cannot delay the saving further than this,
+   * to prevent overwrites.
+   */
+   save_omap_boot_params();
 }
 #endif
 
-- 
2.7.4

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Re: [U-Boot] [PATCH 2/5] omap: Update the base address of the MMC controllers

[Simon Glass]

On 11 July 2017 at 10:20, Jean-Jacques Hiblot  wrote:
> Align the base address defined in header files with the base address used
> in the DTS. This will facilitate the introduction of the DMA support.
>
> Of all HSMMC users, only omap3 doesn't have the 0x100 reserved region at
> the top. This region will be used to determine if the controller supports
> DMA transfers
>
> Signed-off-by: Jean-Jacques Hiblot 
> ---
>  arch/arm/include/asm/arch-am33xx/mmc_host_def.h| 4 ++--
>  arch/arm/include/asm/arch-omap4/mmc_host_def.h | 6 +++---
>  arch/arm/include/asm/arch-omap5/mmc_host_def.h | 6 +++---
>  arch/arm/include/asm/omap_mmc.h| 2 +-
>  arch/arm/mach-keystone/include/mach/mmc_host_def.h | 4 ++--
>  5 files changed, 11 insertions(+), 11 deletions(-)

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Re: [U-Boot] [PATCH v2 1/4] arm: dts: meson: import dts files from Linux 4.12

[Simon Glass]

On 9 July 2017 at 16:30, Beniamino Galvani  wrote:
>
> Import Amlogic Meson DTS files from Linux kernel version 4.12
>
> Signed-off-by: Beniamino Galvani 
> ---
>  arch/arm/dts/meson-gx.dtsi|  97 --
>  arch/arm/dts/meson-gxbb-odroidc2.dts  |  82 ++-
>  arch/arm/dts/meson-gxbb.dtsi  | 187 
> --
>  include/dt-bindings/clock/gxbb-clkc.h |  24 -
>  4 files changed, 344 insertions(+), 46 deletions(-)

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Re: [U-Boot] [PATCH v2 06/15] usb: hub: Translate USB 3.0 hub port status into old version

[Simon Glass]

On 12 July 2017 at 02:37, Bin Meng  wrote:
> USB 3.0 hub port status field has different bit positions from 2.0
> hubs. Since U-Boot only understands the old version, translate the
> new one into the old one.
>
> Since we are going to add USB 3.0 hub support, this feature is only
> available with driver model USB.
>
> Signed-off-by: Bin Meng 
> ---
>
> Changes in v2: None
>
>  common/usb_hub.c | 33 -
>  1 file changed, 32 insertions(+), 1 deletion(-)

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Re: [U-Boot] [PATCH 1/6] sunxi: A64: dts: replace EMAC .dtsi with symlink

[Simon Glass]

On 7 July 2017 at 02:31, Andre Przywara  wrote:
> Hi,
>
> On 07/07/17 04:58, Simon Glass wrote:
>> Hi Andre,
>>
>> On 2 July 2017 at 18:59, Andre Przywara  wrote:
>>> Currently we add the U-Boot specific Ethernet MAC DT nodes for the
>>> Pine64 via a board-specific add-on .dtsi.
>>> However these nodes and properties in there are actually pretty generic
>>> for all A64 boards which use a PHY connected via RGMII.
>>> Rename the add-on .dtsi to reflect this and make the Pine64 .dtsi a
>>> symlink to this new file.
>>> This simplifies letting other boards use the EMAC too.
>>>
>>> Signed-off-by: Andre Przywara 
>>> ---
>>>  arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi | 51 
>>> +
>>>  arch/arm/dts/sun50i-a64-rgmii-emac.dtsi | 50 
>>> 
>>>  2 files changed, 51 insertions(+), 50 deletions(-)
>>>  mode change 100644 => 12 
>>> arch/arm/dts/sun50i-a64-pine64-plus-u-boot.dtsi
>>>  create mode 100644 arch/arm/dts/sun50i-a64-rgmii-emac.dtsi
>>
>> It seems odd to use the U-Boot dtsi feature to add code that should be
>> in the kernel .dts also. Can we instead just #include it?
>
> This -u-boot.dtsi was just a preliminary kludge until the official Linux
> Ethernet support was merged.
> I was hoping for getting this still into the release, since it's an easy
> change and enables TFTP boot on the two boards (this patch here is just
> preparation for the actual patch 2/6).
>
> So the Linux Ethernet driver happened to be merged yesterday. \O/
> I promise to update U-Boot's DTs with the kernel one's once we have at
> least an -rc1 in the kernel (though this requires patch 6/6 in U-Boot).
> This will then see these rgmii-emac.dtsi and the symlinks go away.

OK I see, thanks.

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Re: [U-Boot] [PATCH v2 3/4] odroid-c2: enable GPIO

[Simon Glass]

On 9 July 2017 at 16:30, Beniamino Galvani  wrote:
> GPIOs are now supported on Meson GXBB, enable driver and command in
> the config.
>
> Signed-off-by: Beniamino Galvani 
> ---
>  configs/odroid-c2_defconfig | 2 ++
>  1 file changed, 2 insertions(+)

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Re: [U-Boot] [PATCH 4/6] sunxi: GPIO: introduce sunxi_gpio_setup_dt_pins()

[Simon Glass]

+Tom

On 7 July 2017 at 04:30, Andre Przywara  wrote:
> Hi Simon,
>
> On 07/07/17 04:58, Simon Glass wrote:
>> Hi Andre,
>>
>> On 2 July 2017 at 18:59, Andre Przywara  wrote:
>>> Instead of hard-coding GPIO pins used for a certain peripheral, we
>>> should just use the pinctrl information from the DT.
>>> The sun8i-emac driver has some simple implementation of that, so
>>> let's just generalize this and copy the code to a more common
>>> location.
>>> On the way we add support for the new, generic pinctrl binding now
>>> used by all Allwinner SoCs.
>>>
>>> Signed-off-by: Andre Przywara 
>>> ---
>>>  arch/arm/include/asm/arch-sunxi/gpio.h |  3 ++
>>>  arch/arm/mach-sunxi/pinmux.c   | 79 
>>> ++
>>>  2 files changed, 82 insertions(+)
>>
>> It looks like this should be done with a pinctrl driver, shouldn't it?
>
> I knew you would say this ;-)
>
> So technically you are right, but it looks like this is quite some work.
> And as patch 5/6 demonstrates, this code here was actually already
> mostly in, so this is basically just moving and generalisation.
>
> The whole purpose of this series is to prepare for merging in the Linux
> 4.13-rc1 DTs and still have working Ethernet, so I wanted to keep the
> bar low on this.
>
> I haven't looked in detail what it would take to have a proper Allwinner
> pinctrl DM driver, but the binding Linux uses is not "self-contained",
> as we still need SoC specific knowledge (namely into which actual mux
> value the "emac" string, for instance, translates to; and this is per
> SoC and pin). So that means pulling *a lot of* tables into U-Boot, which
> I am not sure is worth at this point. We might get away with some
> short-cuts, basically keeping our hard coded mux values around or just
> defining those that we actually need.
> But in general I consider this work more long term, and it should not
> halt the more important goal of having the Linux and U-Boot DTs in sync.

With a due sense of foreboding and dread:

Reviewed-by: Simon Glass 

>
> Cheers,
> Andre.
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Re: [U-Boot] [PATCH 10/14] dm: mmc: sunxi: Add support for driver model

[Simon Glass]

Hi Maxime,

On 5 July 2017 at 14:14, Maxime Ripard  wrote:
> On Wed, Jul 05, 2017 at 04:57:40PM +0200, Maxime Ripard wrote:
>> On Tue, Jul 04, 2017 at 01:33:25PM -0600, Simon Glass wrote:
>> > Hi Maxime,
>> >
>> > On 21 June 2017 at 01:31, Maxime Ripard
>> >  wrote:
>> > > Hi Simon,
>> > >
>> > > On Mon, Jun 19, 2017 at 11:11:27AM -0600, Simon Glass wrote:
>> > >> Add a driver-model version of this driver which mostly uses the existing
>> > >> code. The old code can be removed once all boards are switched over.
>> > >>
>> > >> Signed-off-by: Simon Glass 
>> > >
>> > > I'm not sure if you tested that, but we have some code that switches
>> > > the MMC indices when using both an eMMC and an external MMC.
>> > >
>> > > http://git.denx.de/?p=u-boot.git;a=blob;f=board/sunxi/board.c#l494
>> > >
>> > > This predates my time, but it seems that it was done to have a
>> > > consistent boot MMC device ID.
>> > >
>> > > I'm not really sure we can get rid of it (even if it creates some
>> > > issues of it's own), but what would be the impact of a switch to the
>> > > device model on that logic?
>> >
>> > That is a pretty terrible hack.
>>
>> Yes, I know. This is especially bad when used together with other
>> tools that rely on one MMC index for example (such as fastboot).
>>
>> I wanted to kill it for quite some time, but I'm a bit reluctant due
>> to the possible side effects.
>>
>> > I'm not sure whether it will continue to work with DM. It does still
>> > use the device number in the block device, so maybe...  Do you have
>> > a board would use this?
>>
>> I guess I do. I'll give it a try or tonight and let you know.
>
> I just tested. Even with an eMMC (which was the first use case for
> that hack), it works, even things that are not mainline yet (fastboot,
> etc).
>
> It obviously break the old scripts relying on the mmc index, but I
> guess that's ok.
>
> There's one regression though. Our eMMC will always be the second one,
> which means that the distro bootargs will always boot on the external
> SD first (which is always going to be mmc0).
>
> That's due to the fact that the eMMC controller is the third one, and
> is thus probed last. We obviously want something deterministic for
> fastboot for example, but booting partitions of the media you started
> from make sense I guess. And this is what this hack was trying to
> address.

OK...so what should we do here?

Regards,
Simon
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Re: [U-Boot] [PATCH] sandbox: Enable more drivers for more build coverage

[Simon Glass]

Hi Tom,

On 4 July 2017 at 15:37, Tom Rini  wrote:
> Enable more drivers that build currently.  This will extend our build
> time test coverage
>
> Cc: Simon Glass 
> Signed-off-by: Tom Rini 
> ---
>  configs/sandbox_defconfig | 23 +++
>  1 file changed, 23 insertions(+)

This patch patch and your other one introduce build warnings for me:

   sandbox:  +   sandbox
+  regs = (uint32_t *)devfdt_get_addr_name(parent, "gpio");
+ ^
+  key_ptr = (uint8_t *)key_addr;
+^
+  src_ptr = (uint8_t *)src_addr;
+  dst_ptr = (uint8_t *)dst_addr;
+In file included from arch/sandbox/include/asm/io.h:74:0,
+ from drivers/pinctrl/pinctrl-single.c:11:
+ #define readw(addr) iotrace_readw((const void *)(addr))
+   ^
+include/iotrace.h:31:42: note: in definition of macro ?writew?
+ #define writew(val, addr) iotrace_writew(val, (const void *)(addr))
+  ^
+drivers/pinctrl/pinctrl-single.c:60:12: note: in expansion of macro ?readw?
+writew((readw(reg) & ~pdata->mask) | val, reg);
+   ^
+drivers/pinctrl/pinctrl-single.c:60:4: note: in expansion of macro ?writew?
+^
+ #define readl(addr) iotrace_readl((const void *)(addr))
+include/iotrace.h:25:42: note: in definition of macro ?writel?
+ #define writel(val, addr) iotrace_writel(val, (const void *)(addr))
+drivers/pinctrl/pinctrl-single.c:63:12: note: in expansion of macro ?readl?
+writel((readl(reg) & ~pdata->mask) | val, reg);
+drivers/pinctrl/pinctrl-single.c:63:4: note: in expansion of macro ?writel?
+   (((int)c->cmd == DS4510_CMD_DEVICE) &&
+ ^
+  switch ((int)c->cmd) {
+  ^
+  host->ioaddr = (void *)devfdt_get_addr(dev);
+ ^
+  priv->base = (void *)fdtdec_get_addr_size_auto_parent(gd->fdt_blob,
+   ^
+   priv->pad_ctrl_reg = (void *)devfdt_get_addr_index(dev, 1);
+^
w+drivers/gpio/tegra186_gpio.c: In function ?tegra186_gpio_bind?:
w+drivers/gpio/tegra186_gpio.c:182:9: warning: cast to pointer from
integer of different size [-Wint-to-pointer-cast]
w+cmd/aes.c: In function ?do_aes?:
w+cmd/aes.c:52:12: warning: cast to pointer from integer of different
size [-Wint-to-pointer-cast]
w+cmd/aes.c:53:12: warning: cast to pointer from integer of different
size [-Wint-to-pointer-cast]
w+cmd/aes.c:54:12: warning: cast to pointer from integer of different
size [-Wint-to-pointer-cast]
w+drivers/pinctrl/pinctrl-single.c: In function ?single_configure_pins?:
w+include/iotrace.h:28:35: warning: cast to pointer from integer of
different size [-Wint-to-pointer-cast]
w+include/iotrace.h:31:47: warning: cast to pointer from integer of
different size [-Wint-to-pointer-cast]
w+include/iotrace.h:22:35: warning: cast to pointer from integer of
different size [-Wint-to-pointer-cast]
w+include/iotrace.h:25:47: warning: cast to pointer from integer of
different size [-Wint-to-pointer-cast]
w+drivers/misc/ds4510.c: In function ?do_ds4510?:
w+drivers/misc/ds4510.c:267:5: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
w+drivers/misc/ds4510.c:280:10: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
w+drivers/mmc/msm_sdhci.c: In function ?msm_ofdata_to_platdata?:
w+drivers/mmc/msm_sdhci.c:174:17: warning: cast to pointer from
integer of different size [-Wint-to-pointer-cast]
w+drivers/mmc/msm_sdhci.c:177:15: warning: cast to pointer from
integer of different size [-Wint-to-pointer-cast]
w+drivers/mmc/xenon_sdhci.c: In function ?xenon_sdhci_ofdata_to_platdata?:
w+drivers/mmc/xenon_sdhci.c:455:17: warning: cast to pointer from
integer of different size [-Wint-to-pointer-cast]

Regards,
Simon
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Re: [U-Boot] [PATCH] dm: video: fix abuse of enum

[Simon Glass]

Hi Lothar,

On 7 July 2017 at 00:41, Lothar Waßmann  wrote:
> Hi,
>
> On Thu, 6 Jul 2017 12:22:52 + Marcel Ziswiler wrote:
>> Dear Lothar
>>
>> On Thu, 2017-07-06 at 09:50 +0200, Lothar Waßmann wrote:
>> > Hi,
>> >
>> > On Wed, 5 Jul 2017 22:49:28 -0600 Simon Glass wrote:
>> > > Hi Lothar,
>> > >
>> > > On 23 June 2017 at 00:30, Lothar Waßmann 
>> > > wrote:
>> > > > Hi,
>> > > >
>> > > > On Wed, 21 Jun 2017 09:59:05 +0200 Lothar Waßmann wrote:
>> > > > > Hi,
>> > > > >
>> > > > > On Tue, 20 Jun 2017 12:26:29 -0600 Simon Glass wrote:
>> > > > > > Hi Lothar,
>> > > > > >
>> > > > > > On 20 June 2017 at 04:25, Lothar Waßmann > > > > > > .de> wrote:
>> > > > > > > LCD_MAX_WIDTH, LCD_MAX_HEIGHT and LCD_MAX_LSBPP are not
>> > > > > > > alternative
>> > > > > > > values for one specific variable, but unrelated entities
>> > > > > > > with distinct
>> > > > > > > purposes. There is no use defining them as values of an
>> > > > > > > 'enum'.
>> > > > > >
>> > > > > > Can you explain why #define is better? I prefer enum since
>> > > > > > they are a
>> > > > > > compiler construct instead of preprocessor (thus no need for
>> > > > > > brackets,
>> > > > > > no strange conversion things) and the debugger knows about
>> > > > > > them.
>> > > > > >
>> > > > >
>> > > > > An enum defines alternative values for one specific entity
>> > > > > (e.g.
>> > > > > clauses for a switch construct), but not a collection of
>> > > > > arbitrary data
>> > > > > items.
>> > > > >
>> > > > > > > The 'enum' construct would fail miserably for an LCD
>> > > > > > > controller that
>> > > > > > > has a square max. frame size (e.g. 4096x4096).
>> > > > > >
>> > > > > > What does this mean? I don't understand sorry.
>> > > > > >
>> > > > >
>> > > > > Try your enum with MAX_LCD_WITDH == MAC_LCD_HEIGHT.
>> > >
>> > > Can you please be explicit as to what the problem is? Sorry but I
>> > > don't understand what you are driving at. Do you have a test
>> > > program
>> > > which shows the problem?
>> > >
>> >
>> > You cannot have two different enum items with the same value!
>> > Thus:
>> > enum {
>> > MAX_LCD_WIDTH = 4096,
>> > MAX_LCD_HEIGHT = 4096,
>> > };
>> > won't compile.
>>
>> Says who?
>>
>> At least my gcc compilers even compile the following just fine:
>>
>> enum {
>>   MAX_LCD_WIDTH = 4096,
>>   MAX_LCD_HEIGHT = MAX_LCD_WIDTH,
>> };
>>
> Sorry, I was so locked in to the "normal" use of enum that I got
> confused.

OK I see, no worries.

I agree this is a borderline case, but I still prefer it :-)

Regards,
Simon
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Re: [U-Boot] [PATCH 1/1] efi_loader: provide meaningful status code

[Simon Glass]

Hi,

On 3 July 2017 at 06:21, Alexander Graf  wrote:
> On 06/25/2017 10:56 PM, Heinrich Schuchardt wrote:
>>
>> Currenty any EFI status other than EFI_SUCCESS is reported as
>> Application terminated, r = -22
>>
>> With the patch the status code and its mnemonic is printed.
>>
>> Signed-off-by: Heinrich Schuchardt 
>
>
> While I think it's very useful to have the status code, I don't want to
> waste 1kb of .rodata on every binary out there - that will only drive more
> people to disable CONFIG_EFI_LOADER which is the opposite of what we want.
>
> Can you please respin without the string return for now? Maybe we can add a
> CONFIG_EFI_LOADER_DEBUG option later on which gives us verbose printing on
> demand on a few more bits.

I think the error messages are useful and would like to see this new
option. Bonus points if they can be in lower case :-)

Regards,
Simon
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Re: [U-Boot] [PATCH] sandbox: Update defconfig for more build coverage

[Simon Glass]

On 4 July 2017 at 15:13, Tom Rini  wrote:
> Enable all of the currently Kconfig'd cmd's that will build in sandbox
> right now.  This will extend our build time test coverage.
>
> Cc: Simon Glass 
> Signed-off-by: Tom Rini 
> ---
>  configs/sandbox_defconfig | 17 +
>  1 file changed, 17 insertions(+)
>

Reviewed-by: Simon Glass 

But this does introduce build warnings for me so I think it needs a
respin. See my other email.
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Re: [U-Boot] [U-Boot,1/3] arm: omap: Detect boot mode very early

[Lokesh Vutla]

On 7/14/2017 6:30 PM, Adam Ford wrote:
> On Fri, Jul 14, 2017 at 6:35 AM, Adam Ford  wrote:
>> On Tue, Jul 11, 2017 at 7:40 AM, Tom Rini  wrote:
>>> On Tue, Jun 27, 2017 at 01:50:56PM +0530, Lokesh Vutla wrote:
>>>
 ROM stores the boot params information in a known location
 and passes it to SPL. This information needs to be copied
 very early during boot or else there is a chance of getting
 corrupted by SPL. So move this boot device detection very early
 during boot.

 Signed-off-by: Lokesh Vutla 
 Reviewed-by: Tom Rini 
>>>
>>> Applied to u-boot/master, thanks!
>>>
>>
>> Master no longer boots my DM3730 (omap3_logic).  Has anyone else had
>> issues with their OMAP3 board?  v2017.07 works and the bisect
>> revealed:
>>
>> 4bd754d8abef61835d5da2ba0c65b2b0d3badec9 is the first bad commit
>> commit 4bd754d8abef61835d5da2ba0c65b2b0d3badec9
>> Author: Lokesh Vutla 
>> Date:   Tue Jun 27 13:50:56 2017 +0530
>>
>> arm: omap: Detect boot mode very early
>>
>> ROM stores the boot params information in a known location
>> and passes it to SPL. This information needs to be copied
>> very early during boot or else there is a chance of getting
>> corrupted by SPL. So move this boot device detection very early
>> during boot.
>>
>> Signed-off-by: Lokesh Vutla 
>> Reviewed-by: Tom Rini 
>>
>> :04 04 eba151d04f1f62d4acd83b7ba47f627956eab8fb
>> b36ef87618be765d9a4986dd9a8b013b357f4611 M arch
>>
>>
>>
> 
> The following patch appears to work, but I would like some feedback
> from TI guys.  If that seems reasonable, I'll submit a more formal
> patch.
> 

Yeas, this looks good to me.

Reviewed-by: Lokesh Vutla 

Thanks and regards,
Lokesh

> 
> diff --git a/arch/arm/mach-omap2/omap3/board.c
> b/arch/arm/mach-omap2/omap3/board.c
> index cd8e302..f8db543 100644
> --- a/arch/arm/mach-omap2/omap3/board.c
> +++ b/arch/arm/mach-omap2/omap3/board.c
> @@ -212,6 +212,12 @@ void board_init_f(ulong dummy)
>  {
> early_system_init();
> mem_init();
> +   /*
> +* Save the boot parameters passed from romcode.
> +* We cannot delay the saving further than this,
> +* to prevent overwrites.
> +*/
> +   save_omap_boot_params();
>  }
>  #endif
> 
> 
> 
>>> --
>>> Tom
>>>
>>> ___
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Re: [U-Boot] [PATCH 0/5] mmc: omap_hsmmc: Add support for ADMA

[Adam Ford]

On Thu, Jul 13, 2017 at 2:22 AM, Jean-Jacques Hiblot  wrote:
>
>
> On 12/07/2017 19:30, Tom Rini wrote:
>>
>> On Tue, Jul 11, 2017 at 06:20:09PM +0200, Jean-Jacques Hiblot wrote:
>>
>>> This series enables the ADMA present in some OMAP SOCs.
>>> On a DRA7 the performances when reading from the eMMC go from 20MB/s
>>> to 40MB/s.
>>> Also while were at it, fix some incorrect bit operations
>>>
>>> This is the first series of 3 which wille enable HS200 and UHS on the
>>> omap5
>>> platforms (dra7 and am57).
>>> This series applies on u-boot-mmc/hs200-ufs-testing although it could be
>>> modified to apply on u-boot/master.
>>
>> What hardware have you runtime tested this on?  If you haven't done
>> omap3, I can do some run-time testing there.  Thanks!
>
> I haven't been able to test on omap3.
> I did BBB, am437x SK, AM57X evm and DRA7 evm.
>

I had to fix some other SPL issues first and once I was able to do
that, I applied this 5-patch series and tested on DM3730 booting with
SPL using Device Tree in U-boot.  (I might still be the only OMAP3
board which enables CONFIG_OF_CONTROL=y).

The only compile concern I found was:

 CC  drivers/usb/gadget/f_fastboot.o
drivers/mmc/omap_hsmmc.c: In function ‘omap_hsmmc_send_cmd’:
drivers/mmc/omap_hsmmc.c:486:14: warning: unused variable ‘mmc’
[-Wunused-variable]
  struct mmc *mmc = upriv->mmc;
  ^~~
  LD  board/logicpd/omap3som/built-in.o
  CC  lib/smbios.o


However, my board booted correctly via SD card.



adam

> JJ
>>
>>
>
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Re: [U-Boot] [U-Boot,1/3] arm: omap: Detect boot mode very early

[Adam Ford]

On Fri, Jul 14, 2017 at 6:35 AM, Adam Ford  wrote:
> On Tue, Jul 11, 2017 at 7:40 AM, Tom Rini  wrote:
>> On Tue, Jun 27, 2017 at 01:50:56PM +0530, Lokesh Vutla wrote:
>>
>>> ROM stores the boot params information in a known location
>>> and passes it to SPL. This information needs to be copied
>>> very early during boot or else there is a chance of getting
>>> corrupted by SPL. So move this boot device detection very early
>>> during boot.
>>>
>>> Signed-off-by: Lokesh Vutla 
>>> Reviewed-by: Tom Rini 
>>
>> Applied to u-boot/master, thanks!
>>
>
> Master no longer boots my DM3730 (omap3_logic).  Has anyone else had
> issues with their OMAP3 board?  v2017.07 works and the bisect
> revealed:
>
> 4bd754d8abef61835d5da2ba0c65b2b0d3badec9 is the first bad commit
> commit 4bd754d8abef61835d5da2ba0c65b2b0d3badec9
> Author: Lokesh Vutla 
> Date:   Tue Jun 27 13:50:56 2017 +0530
>
> arm: omap: Detect boot mode very early
>
> ROM stores the boot params information in a known location
> and passes it to SPL. This information needs to be copied
> very early during boot or else there is a chance of getting
> corrupted by SPL. So move this boot device detection very early
> during boot.
>
> Signed-off-by: Lokesh Vutla 
> Reviewed-by: Tom Rini 
>
> :04 04 eba151d04f1f62d4acd83b7ba47f627956eab8fb
> b36ef87618be765d9a4986dd9a8b013b357f4611 M arch
>
>
>

The following patch appears to work, but I would like some feedback
from TI guys.  If that seems reasonable, I'll submit a more formal
patch.


diff --git a/arch/arm/mach-omap2/omap3/board.c
b/arch/arm/mach-omap2/omap3/board.c
index cd8e302..f8db543 100644
--- a/arch/arm/mach-omap2/omap3/board.c
+++ b/arch/arm/mach-omap2/omap3/board.c
@@ -212,6 +212,12 @@ void board_init_f(ulong dummy)
 {
early_system_init();
mem_init();
+   /*
+* Save the boot parameters passed from romcode.
+* We cannot delay the saving further than this,
+* to prevent overwrites.
+*/
+   save_omap_boot_params();
 }
 #endif



>> --
>> Tom
>>
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[U-Boot] [PATCH 42/51] cmd: Add ihs fpga command

[Mario Six]

Add a comman to debug the IHS FPGA's bus.

Signed-off-by: Mario Six 
---

 cmd/Kconfig|   5 ++
 cmd/Makefile   |   1 +
 cmd/ihs_fpga.c | 269 +
 3 files changed, 275 insertions(+)
 create mode 100644 cmd/ihs_fpga.c

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 4bbe9d435c..6d13c681cb 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -753,6 +753,11 @@ config CMD_SATA
  Attachment, where AT refers to an IBM AT (Advanced Technology)
  computer released in 1984.
 
+config CMD_IHS_FPGA
+   bool "fpga"
+   help
+ Enable the GDSYS IHS FPGA command for accessing the FPGA's regisers.
+
 config CMD_IHS_AXI
bool "axi"
help
diff --git a/cmd/Makefile b/cmd/Makefile
index 0baaf76b47..79abe8f877 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -145,6 +145,7 @@ obj-$(CONFIG_CMD_GPT) += gpt.o
 obj-$(CONFIG_CMD_ETHSW) += ethsw.o
 
 obj-$(CONFIG_CMD_IHS_AXI) += ihs_axi.o
+obj-$(CONFIG_CMD_IHS_FPGA) += ihs_fpga.o
 
 # Power
 obj-$(CONFIG_CMD_PMIC) += pmic.o
diff --git a/cmd/ihs_fpga.c b/cmd/ihs_fpga.c
new file mode 100644
index 00..6d0c599d96
--- /dev/null
+++ b/cmd/ihs_fpga.c
@@ -0,0 +1,269 @@
+/*
+ * (C) Copyright 2017
+ * Mario Six,  Guntermann & Drunck GmbH, mario@gdsys.cc
+ *
+ * based on the fpgad command, which is
+ *
+ * (C) Copyright 2013
+ * Dirk Eibach,  Guntermann & Drunck GmbH, dirk.eib...@gdsys.cc
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static struct udevice *fpga_cur;
+static uint dp_last_addr;
+static uint dp_last_length = 0x40;
+
+static void show_fpga(struct udevice *fpga)
+{
+   struct udevice *dev;
+
+   printf("Bus %d:\t%s", fpga->req_seq, fpga->name);
+   if (device_active(fpga))
+   printf("  (active %d)", fpga->seq);
+   printf("\n");
+   for (device_find_first_child(fpga, &dev);
+dev;
+device_find_next_child(&dev)) {
+   //struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
+
+   //printf("   %02x: %s, offset len %x, flags %x\n",
+  //chip->chip_addr, dev->name, chip->offset_len,
+  //chip->flags);
+   printf("  %s\n", dev->name);
+   }
+}
+
+static int do_fpga_show_fpga(cmd_tbl_t *cmdtp, int flag, int argc,
+char * const argv[])
+{
+   if (argc == 1) {
+   /* show all FPGAs */
+   struct udevice *fpga;
+   struct uclass *uc;
+   int ret;
+
+   ret = uclass_get(UCLASS_IHS_FPGA, &uc);
+   if (ret)
+   return CMD_RET_FAILURE;
+   uclass_foreach_dev(fpga, uc)
+   show_fpga(fpga);
+   } else {
+   int i;
+
+   /* show specific fpga */
+   i = simple_strtoul(argv[1], NULL, 10);
+
+   struct udevice *fpga;
+   int ret;
+
+   ret = uclass_get_device_by_seq(UCLASS_IHS_FPGA, i, &fpga);
+   if (ret) {
+   printf("Invalid fpga %d: err=%d\n", i, ret);
+   return CMD_RET_FAILURE;
+   }
+   show_fpga(fpga);
+   }
+
+   return 0;
+}
+
+static int cmd_fpga_set_fpga_num(unsigned int fpganum)
+{
+   struct udevice *fpga;
+   int ret;
+
+   ret = uclass_get_device_by_seq(UCLASS_IHS_FPGA, fpganum, &fpga);
+   if (ret) {
+   debug("%s: No fpga %d\n", __func__, fpganum);
+   return ret;
+   }
+   fpga_cur = fpga;
+
+   return 0;
+}
+
+static int fpga_get_cur_fpga(struct udevice **fpgap)
+{
+   if (!fpga_cur) {
+   puts("No fpga selected\n");
+   return -ENODEV;
+   }
+   *fpgap = fpga_cur;
+
+   return 0;
+}
+
+static int do_fpga_fpga_num(cmd_tbl_t *cmdtp, int flag, int argc,
+   char * const argv[])
+{
+   int ret = 0;
+   int fpga_no;
+
+   if (argc == 1) {
+   /* querying current setting */
+   struct udevice *fpga;
+
+   if (!fpga_get_cur_fpga(&fpga))
+   fpga_no = fpga->seq;
+   else
+   fpga_no = -1;
+   printf("Current fpga is %d\n", fpga_no);
+   } else {
+   fpga_no = simple_strtoul(argv[1], NULL, 10);
+   printf("Setting fpga to %d\n", fpga_no);
+
+   ret = cmd_fpga_set_fpga_num(fpga_no);
+
+   if (ret)
+   printf("Failure changing fpga number (%d)\n", ret);
+   }
+
+   return ret ? CMD_RET_FAILURE : 0;
+}
+
+#define DISP_LINE_LEN  16
+
+int do_fpga_md(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+   unsigned int k;
+   ulong   addr, length;
+   int rc = 0;
+   u16 linebuf[DISP_LINE_LEN / sizeof(u16)];
+   ulong nbytes;
+
+   /*
+* We 

[U-Boot] [PATCH 48/51] ihs_mdio: Make DM-compatible

[Mario Six]

Make the ihs_mdio driver DM-compatible, while retaining the old
functionality for not-yet-converted boards.

Signed-off-by: Mario Six 
---

 board/gdsys/common/ihs_mdio.c | 49 ++-
 board/gdsys/common/ihs_mdio.h |  5 +
 2 files changed, 49 insertions(+), 5 deletions(-)

diff --git a/board/gdsys/common/ihs_mdio.c b/board/gdsys/common/ihs_mdio.c
index 4e3bcd406f..4609e9f8c2 100644
--- a/board/gdsys/common/ihs_mdio.c
+++ b/board/gdsys/common/ihs_mdio.c
@@ -5,15 +5,25 @@
  * SPDX-License-Identifier:GPL-2.0+
  */
 
-#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
-
 #include 
 
-#include 
 #include 
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
+#include 
+#else
+#include 
+#endif
 
 #include "ihs_mdio.h"
 
+#ifndef CONFIG_GDSYS_LEGACY_DRIVERS
+enum {
+   REG_MDIO_CONTROL = 0x0,
+   REG_MDIO_ADDR_DATA = 0x2,
+   REG_MDIO_RX_DATA = 0x4,
+};
+#endif
+
 static int ihs_mdio_idle(struct mii_dev *bus)
 {
struct ihs_mdio_info *info = bus->priv;
@@ -21,7 +31,11 @@ static int ihs_mdio_idle(struct mii_dev *bus)
unsigned int ctr = 0;
 
do {
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
FPGA_GET_REG(info->fpga, mdio.control, &val);
+#else
+   val = fpga_in_le16(info->fpga, info->base + REG_MDIO_CONTROL);
+#endif
udelay(100);
if (ctr++ > 10)
return -1;
@@ -40,9 +54,17 @@ static int ihs_mdio_reset(struct mii_dev *bus)
 static int ihs_mdio_address(struct ihs_mdio_info *info, int addr, int dev_addr,
int regnum)
 {
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
FPGA_SET_REG(info->fpga, mdio.address_data, regnum);
FPGA_SET_REG(info->fpga, mdio.control,
 ((addr & 0x1f) << 5) | (dev_addr & 0x1f) | (0 << 10));
+#else
+   fpga_out_le16(info->fpga, info->base + REG_MDIO_ADDR_DATA, regnum);
+   fpga_out_le16(info->fpga, info->base + REG_MDIO_CONTROL,
+ ((addr & 0x1f) << 5) |
+  (dev_addr & 0x1f) |
+  (0 << 10));
+#endif
 
return 0;
 }
@@ -60,15 +82,26 @@ static int ihs_mdio_read(struct mii_dev *bus, int addr, int 
dev_addr,
ihs_mdio_idle(bus);
}
 
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
FPGA_SET_REG(info->fpga, mdio.control,
 ((addr & 0x1f) << 5) |
  ((info->clause45 ? dev_addr : regnum) & 0x1f) |
  (2 << 10));
+#else
+   fpga_out_le16(info->fpga, info->base + REG_MDIO_CONTROL,
+ ((addr & 0x1f) << 5) |
+  ((info->clause45 ? dev_addr : regnum) & 0x1f) |
+  (2 << 10));
+#endif
 
/* wait for rx data available */
udelay(100);
 
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
FPGA_GET_REG(info->fpga, mdio.rx_data, &val);
+#else
+   val = fpga_in_le16(info->fpga, info->base + REG_MDIO_RX_DATA);
+#endif
 
return val;
 }
@@ -85,11 +118,19 @@ static int ihs_mdio_write(struct mii_dev *bus, int addr, 
int dev_addr,
ihs_mdio_idle(bus);
}
 
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
FPGA_SET_REG(info->fpga, mdio.address_data, value);
FPGA_SET_REG(info->fpga, mdio.control,
 ((addr & 0x1f) << 5) |
  ((info->clause45 ? dev_addr : regnum) & 0x1f) |
  (1 << 10));
+#else
+   fpga_out_le16(info->fpga, info->base + REG_MDIO_ADDR_DATA, value);
+   fpga_out_le16(info->fpga, info->base + REG_MDIO_CONTROL,
+ ((addr & 0x1f) << 5) |
+  ((info->clause45 ? dev_addr : regnum) & 0x1f) |
+  (1 << 10));
+#endif
 
return 0;
 }
@@ -112,5 +153,3 @@ int ihs_mdio_init(struct ihs_mdio_info *info)
 
return mdio_register(bus);
 }
-
-#endif /* CONFIG_GDSYS_LEGACY_DRIVERS */
diff --git a/board/gdsys/common/ihs_mdio.h b/board/gdsys/common/ihs_mdio.h
index 372f07569c..e787dc1642 100644
--- a/board/gdsys/common/ihs_mdio.h
+++ b/board/gdsys/common/ihs_mdio.h
@@ -9,7 +9,12 @@
 #define _IHS_MDIO_H_
 
 struct ihs_mdio_info {
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
u32 fpga;
+#else
+   struct udevice *fpga;
+   int base;
+#endif
char *name;
bool clause45;
 };
-- 
2.11.0

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[U-Boot] [PATCH 45/51] gdsys: cmd_ioloop: Make DM compatible

[Mario Six]

Make the ioloop command DM compatible, while keeping the old
functionality for not-yet-converted boards.

Signed-off-by: Mario Six 
---

 board/gdsys/common/cmd_ioloop.c | 241 ++--
 1 file changed, 234 insertions(+), 7 deletions(-)

diff --git a/board/gdsys/common/cmd_ioloop.c b/board/gdsys/common/cmd_ioloop.c
index 2ea8bc8670..b767c4d174 100644
--- a/board/gdsys/common/cmd_ioloop.c
+++ b/board/gdsys/common/cmd_ioloop.c
@@ -11,12 +11,27 @@
 
 #include 
 
+#ifndef CONFIG_GDSYS_LEGACY_DRIVERS
+#include 
+#include 
+#include 
+#include 
+#endif /* !CONFIG_GDSYS_LEGACY_DRIVERS */
+
 enum status_print_type {
STATUS_LOUD = 0,
STATUS_SILENT = 1,
 };
 
 enum {
+   IRQ_CPU_TRANSMITBUFFER_FREE_STATUS = BIT(5),
+   IRQ_CPU_PACKET_TRANSMITTED_EVENT = BIT(6),
+   IRQ_NEW_CPU_PACKET_RECEIVED_EVENT = BIT(7),
+   IRQ_CPU_RECEIVE_DATA_AVAILABLE_STATUS = BIT(8),
+};
+
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
+enum {
STATE_TX_PACKET_BUILDING = BIT(0),
STATE_TX_TRANSMITTING = BIT(1),
STATE_TX_BUFFER_FULL = BIT(2),
@@ -39,13 +54,6 @@ enum {
CTRL_FLUSH_TRANSMIT_BUFFER = BIT(15),
 };
 
-enum {
-   IRQ_CPU_TRANSMITBUFFER_FREE_STATUS = BIT(5),
-   IRQ_CPU_PACKET_TRANSMITTED_EVENT = BIT(6),
-   IRQ_NEW_CPU_PACKET_RECEIVED_EVENT = BIT(7),
-   IRQ_CPU_RECEIVE_DATA_AVAILABLE_STATUS = BIT(8),
-};
-
 struct io_generic_packet {
u16 target_address;
u16 source_address;
@@ -53,11 +61,16 @@ struct io_generic_packet {
u8 bc;
u16 packet_length;
 } __attribute__((__packed__));
+#endif /* CONFIG_GDSYS_LEGACY_DRIVERS */
 
 unsigned long long rx_ctr;
 unsigned long long tx_ctr;
 unsigned long long err_ctr;
+#ifndef CONFIG_GDSYS_LEGACY_DRIVERS
+struct udevice *dev;
+#endif /* !CONFIG_GDSYS_LEGACY_DRIVERS */
 
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
 static void io_check_status(uint fpga, u16 status, enum status_print_type type)
 {
u16 mask = STATE_RX_DIST_ERR | STATE_RX_LENGTH_ERR |
@@ -90,7 +103,15 @@ static void io_check_status(uint fpga, u16 status, enum 
status_print_type type)
if (status & STATE_TX_ERR)
printf("TX_ERR\n");
 }
+#else
+static void io_check_status(struct udevice *dev, enum status_print_type type)
+{
+   if (ioep_reset_status(dev, type == STATUS_LOUD))
+   err_ctr++;
+}
+#endif /* CONFIG_GDSYS_LEGACY_DRIVERS */
 
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
 static void io_send(uint fpga, uint size)
 {
uint k;
@@ -112,7 +133,27 @@ static void io_send(uint fpga, uint size)
 
tx_ctr++;
 }
+#else
+static void io_send(struct udevice *dev, uint size)
+{
+   uint k;
+   u16 buffer[128];
+   struct io_generic_packet header = {
+   .source_address = 1,
+   .packet_type = 1,
+   .packet_length = size,
+   };
+
+   for (k = 0; k < size; ++k)
+   buffer[k] = k;
+
+   ioep_send(dev, &header, buffer);
+
+   tx_ctr++;
+}
+#endif /* CONFIG_GDSYS_LEGACY_DRIVERS */
 
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
 static void io_receive(uint fpga)
 {
u16 rx_tx_status;
@@ -130,7 +171,18 @@ static void io_receive(uint fpga)
FPGA_GET_REG(fpga, ep.rx_tx_status, &rx_tx_status);
}
 }
+#else
+static void io_receive(struct udevice *dev)
+{
+   u16 buffer[128];
+   struct io_generic_packet header;
 
+   if (!ioep_receive(dev, &header, buffer))
+   rx_ctr++;
+}
+#endif /* CONFIG_GDSYS_LEGACY_DRIVERS */
+
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
 static void io_reflect(uint fpga)
 {
u16 buffer[128];
@@ -160,7 +212,20 @@ static void io_reflect(uint fpga)
 
tx_ctr++;
 }
+#else
+static void io_reflect(struct udevice *dev)
+{
+   u16 buffer[128];
+   struct io_generic_packet header;
+
+   if (ioep_receive(dev, &header, buffer))
+   return;
+
+   ioep_send(dev, &header, buffer);
+}
+#endif /* CONFIG_GDSYS_LEGACY_DRIVERS */
 
+#ifdef CONFIG_GDSYS_LEGACY_DRIVERS
 /*
  * FPGA io-endpoint reflector
  *
@@ -217,9 +282,54 @@ int do_ioreflect(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
 
return 0;
 }
+#else
+/*
+ * FPGA io-endpoint reflector
+ *
+ * Syntax:
+ * ioreflect {reportrate}
+ */
+int do_ioreflect(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+   struct gdsys_soc_child_platdata *pplat = dev_get_parent_platdata(dev);
+   uint rate = 0;
+   unsigned long long last_seen = 0;
+
+   /* Enable receive path */
+   ioep_enable_receive(dev);
+
+   /* Set device address to dummy 1*/
+   ioep_set_address(dev, 1);
+
+   rx_ctr = 0; tx_ctr = 0; err_ctr = 0;
+
+   while (1) {
+   uint top_int;
+
+   fpga_get_reg(pplat->fpga, "top-interrupt", &top_int);
+   io_check_status(dev, STATUS_SILENT);
+   if ((top_int & IRQ_CPU_RECEIVE_DATA_AVAILABLE_STATUS) &&
+   (top_int & IRQ_CPU_TRANSMITBUF

[U-Boot] [PATCH 49/51] gazerbeam: Import Linux DT

[Mario Six]

Import the Linux device tree for the Gazerbeam board.

Signed-off-by: Mario Six 
---

 arch/powerpc/dts/gazerbeam.dts | 539 +
 arch/powerpc/dts/gdsys/gazerbeam-base.dtsi | 205 +++
 arch/powerpc/dts/gdsys/mpc8308.dtsi| 243 +
 3 files changed, 987 insertions(+)
 create mode 100644 arch/powerpc/dts/gazerbeam.dts
 create mode 100644 arch/powerpc/dts/gdsys/gazerbeam-base.dtsi
 create mode 100644 arch/powerpc/dts/gdsys/mpc8308.dtsi

diff --git a/arch/powerpc/dts/gazerbeam.dts b/arch/powerpc/dts/gazerbeam.dts
new file mode 100644
index 00..35b7af4173
--- /dev/null
+++ b/arch/powerpc/dts/gazerbeam.dts
@@ -0,0 +1,539 @@
+/*
+ * Gazerbeam CON Device Tree Source
+ *
+ * (C) Copyright 2015
+ * Dirk Eibach, Guntermann & Drunck GmbH, eib...@gdsys.de
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/include/ "gdsys/mpc8308.dtsi"
+
+/include/ "gdsys/gazerbeam-base.dtsi"
+
+/ {
+};
+
+&board_lbc {
+   FPGA0:iocon_uart@1,0 {
+   reg = <0x1 0x0 0x10>;
+   interrupts = <48 0x8>;
+   interrupt-parent = <&ipic>;
+   };
+
+   FPGA1:iocon_uart@2,0 {
+   reg = <0x2 0x0 0x10>;
+   interrupts = <17 0x8>;
+   interrupt-parent = <&ipic>;
+   };
+};
+
+&FPGA0 {
+   compatible = "gdsys,iocon_fpga";
+   #gpio-cells = <2>;
+   gpio-controller;
+   bus = <&FPGA0BUS>;
+   unit_id = <0>;
+   fpga-type = <1>;
+   rs232_base = <0x0050>;
+   usb_base = <0x0080>;
+   audio_base = <0x0040>;
+   /*
+* for every interrupt source there must be a dataset specifying
+* 1. type (1: standard)
+* 2. status register offset
+* 3. mask register offset
+* 4. default mask
+*/
+   fpga_interrupt_sources =
+   <1 0x000a 0x000c 0x4000>, /* 0: TOP_INTERRUPT */
+   <1 0x001c 0x001e 0x>; /* 1: EXTENDED_INTERRUPT */
+   /*
+* for every interrupt there must be a dataset specifying
+* 1. type (1: status, 2: event)
+* 2. interrupt source index
+* 3. interrupt register bit
+* 4. mask register bit
+*/
+#fpga_interrupt_map-cells = <4>;
+   fpga_interrupt_map =
+   <1 0 14 14>, /*  0: EXTENDED_INTERRUPT */
+   <1 0  0  0>, /*  1: VIDEO 0 */
+   <1 0  1  1>, /*  2: VIDEO 1 */
+   <1 0  2  2>, /*  3: VIDEO IC 0 */
+   <1 0  3  3>, /*  4: VIDEO IC 1 */
+   <1 0  4  4>, /*  5: IIC MAIN */
+   <1 0  6  6>, /*  6: IIC VIDEO 0 */
+   <1 0  7  7>, /*  7: IIC VIDEO 1 */
+   <1 1  0  0>, /*  8: OSD 0 */
+   <1 1  1  1>, /*  9: OSD 1 */
+   <1 1  2  2>, /* 10: SPDIF 0 */
+   <1 1  3  3>, /* 11: SPDIF 1 */
+   <1 0 12 12>, /* 12: COMM 0 */
+   <1 0 13 13>, /* 13: COMM 1 */
+   <1 0 10 10>, /* 14: COMM 2 */
+   <1 0 11 11>, /* 15: COMM 3 */
+   <2 0  5  5>, /* 16: MDIO */
+   <1 0  8  8>, /* 17: PHY */
+   <1 1  4  4>, /* 18: RS232 */
+   <1 1  5  5>, /* 19: AUDIO */
+   <1 1  8  8>, /* 20: PROC_AUDIO */
+   <1 1  7  7>, /* 21: USB/ETH-UART INT */
+   <2 1 10 10>, /* 22: AXI Bridge 0 */
+   <2 1 11 11>, /* 23: AXI Bridge 1 */
+   <2 1  9  9>, /* 24: USB/ETH-Secondary IIC */
+   <>;
+};
+
+&FPGA1 {
+   compatible = "gdsys,iocon_fpga";
+   #gpio-cells = <2>;
+   gpio-controller;
+   bus = <&FPGA1BUS>;
+   unit_id = <1>;
+   fpga-type = <1>;
+   rs232_base = <0x0050>;
+   usb_base = <0x0070>;
+   audio_base = <0x0040>;
+   /*
+* for every interrupt source there must be a dataset specifying
+* 1. type (1: standard)
+* 2. status register offset
+* 3. mask register offset
+* 4. default mask
+*/
+   fpga_interrupt_sources =
+   <1 0x000a 0x000c 0x4000>, /* 0: TOP_INTERRUPT */
+   <1 0x001c 0x001e 0x>; /* 1: EXTENDED_INTERRUPT */
+   /*
+* for every interrupt there must be a dataset specifying
+* 1. type (1: status, 2: event)
+* 2. interrupt source index
+* 3. interrupt register bit
+* 4. mask register bit
+*/
+#fpga_interrupt_map-cells = <4>;
+   fpga_interrupt_map =
+   <1 0 14 14>, /*  0: EXTENDED_INTERRUPT */
+   <1 0  0  0>, /*  1: VIDEO 0 */
+   <1 0  1  1>, /*  2: VIDEO 1 */
+   <1 0  2  2>, /*  3: VIDEO IC 0 */
+   <1 0  3  3>, /*  4: VIDEO IC 1 */
+   <1 0  

[U-Boot] [PATCH 34/51] transmitter: Add Xilinx LogiCore DP TX

[Mario Six]

Add a driver for the TX side of the Xilinx LogiCore DisplayPort IP core.

Signed-off-by: Mario Six 
---

 drivers/transmitter/Kconfig|6 +
 drivers/transmitter/Makefile   |1 +
 drivers/transmitter/logicore_dp_dpcd.h |  342 +
 drivers/transmitter/logicore_dp_tx.c   | 1984 
 drivers/transmitter/logicore_dp_tx.h   |   40 +
 drivers/transmitter/logicore_dp_tx_regif.h |  365 +
 6 files changed, 2738 insertions(+)
 create mode 100644 drivers/transmitter/logicore_dp_dpcd.h
 create mode 100644 drivers/transmitter/logicore_dp_tx.c
 create mode 100644 drivers/transmitter/logicore_dp_tx.h
 create mode 100644 drivers/transmitter/logicore_dp_tx_regif.h

diff --git a/drivers/transmitter/Kconfig b/drivers/transmitter/Kconfig
index 64ca08f8b8..e5613586a3 100644
--- a/drivers/transmitter/Kconfig
+++ b/drivers/transmitter/Kconfig
@@ -13,4 +13,10 @@ config SANDBOX_TRANSMITTER
help
  Enable the dummy transmitter for the sandbox.
 
+config LOGICORE_DP_TX
+   bool "Enable Logicore DP TX driver"
+   depends on DM
+   help
+ Enabled the driver for the Logicore DP TX display port transmitter.
+
 endif
diff --git a/drivers/transmitter/Makefile b/drivers/transmitter/Makefile
index b873e63e28..088922d992 100644
--- a/drivers/transmitter/Makefile
+++ b/drivers/transmitter/Makefile
@@ -7,3 +7,4 @@
 
 obj-y += transmitter-uclass.o
 obj-$(CONFIG_SANDBOX_TRANSMITTER) += sandbox_transmitter.o
+obj-$(CONFIG_LOGICORE_DP_TX) += logicore_dp_tx.o
diff --git a/drivers/transmitter/logicore_dp_dpcd.h 
b/drivers/transmitter/logicore_dp_dpcd.h
new file mode 100644
index 00..6858294551
--- /dev/null
+++ b/drivers/transmitter/logicore_dp_dpcd.h
@@ -0,0 +1,342 @@
+/*
+ * logicore_dp_dpcd.h
+ *
+ * DPCD interface definition for XILINX LogiCore DisplayPort v6.1
+ * based on Xilinx dp_v3_1 driver sources
+ *
+ * (C) Copyright 2016
+ * Dirk Eibach,  Guntermann & Drunck GmbH, dirk.eib...@gdsys.cc
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __GDSYS_LOGICORE_DP_DPCD_H__
+#define __GDSYS_LOGICORE_DP_DPCD_H__
+
+/* receiver capability field */
+#define DPCD_REV   0x0
+#define DPCD_MAX_LINK_RATE 0x1
+#define DPCD_MAX_LANE_COUNT0x2
+#define DPCD_MAX_DOWNSPREAD0x3
+#define DPCD_NORP_PWR_V_CAP0x4
+#define DPCD_DOWNSP_PRESENT0x5
+#define DPCD_ML_CH_CODING_CAP  0x6
+#define DPCD_DOWNSP_COUNT_MSA_OUI  0x7
+#defineDPCD_RX_PORT0_CAP_0 0x8
+#defineDPCD_RX_PORT0_CAP_1 0x9
+#defineDPCD_RX_PORT1_CAP_0 0xA
+#defineDPCD_RX_PORT1_CAP_1 0xB
+#define DPCD_I2C_SPEED_CTL_CAP 0xC
+#define DPCD_EDP_CFG_CAP   0xD
+#define DPCD_TRAIN_AUX_RD_INTERVAL 0xE
+#define DPCD_ADAPTER_CAP   0xF
+#define DPCD_FAUX_CAP  0x00020
+#define DPCD_MSTM_CAP  0x00021
+#define DPCD_NUM_AUDIO_EPS 0x00022
+#defineDPCD_AV_GRANULARITY 0x00023
+#define DPCD_AUD_DEC_LAT_7_0   0x00024
+#define DPCD_AUD_DEC_LAT_15_8  0x00025
+#define DPCD_AUD_PP_LAT_7_00x00026
+#define DPCD_AUD_PP_LAT_15_8   0x00027
+#define DPCD_VID_INTER_LAT 0x00028
+#define DPCD_VID_PROG_LAT  0x00029
+#define DPCD_REP_LAT   0x0002A
+#define DPCD_AUD_DEL_INS_7_0   0x0002B
+#define DPCD_AUD_DEL_INS_15_8  0x0002C
+#define DPCD_AUD_DEL_INS_23_16 0x0002D
+#define DPCD_GUID  0x00030
+#define DPCD_RX_GTC_VALUE_7_0  0x00054
+#define DPCD_RX_GTC_VALUE_15_8 0x00055
+#define DPCD_RX_GTC_VALUE_23_160x00056
+#define DPCD_RX_GTC_VALUE_31_240x00057
+#define DPCD_RX_GTC_MSTR_REQ   0x00058
+#define DPCD_RX_GTC_FREQ_LOCK_DONE 0x00059
+#define DPCD_DOWNSP_0_CAP  0x00080
+#define DPCD_DOWNSP_1_CAP 

[U-Boot] [PATCH 46/51] ihs_mdio: Add support to force clause45 access

[Mario Six]

Add support to ihs_mdio to force clause 45 access (in addition to
clause 22 access).

Signed-off-by: Mario Six 
---

 board/gdsys/common/ihs_mdio.c | 26 +++---
 board/gdsys/common/ihs_mdio.h |  1 +
 2 files changed, 24 insertions(+), 3 deletions(-)

diff --git a/board/gdsys/common/ihs_mdio.c b/board/gdsys/common/ihs_mdio.c
index d67ec7d38a..85a804d5cd 100644
--- a/board/gdsys/common/ihs_mdio.c
+++ b/board/gdsys/common/ihs_mdio.c
@@ -37,6 +37,16 @@ static int ihs_mdio_reset(struct mii_dev *bus)
return 0;
 }
 
+static int ihs_mdio_address(struct ihs_mdio_info *info, int addr, int dev_addr,
+int regnum)
+{
+   FPGA_SET_REG(info->fpga, mdio.address_data, regnum);
+   FPGA_SET_REG(info->fpga, mdio.control,
+((addr & 0x1f) << 5) | (dev_addr & 0x1f) | (0 << 10));
+
+   return 0;
+}
+
 static int ihs_mdio_read(struct mii_dev *bus, int addr, int dev_addr,
 int regnum)
 {
@@ -45,8 +55,13 @@ static int ihs_mdio_read(struct mii_dev *bus, int addr, int 
dev_addr,
 
ihs_mdio_idle(bus);
 
+   if (info->clause45) {
+   ihs_mdio_address(info, addr, dev_addr, regnum);
+   ihs_mdio_idle(bus);
+   }
+
FPGA_SET_REG(info->fpga, mdio.control,
-((addr & 0x1f) << 5) | (regnum & 0x1f) | (2 << 10));
+((addr & 0x1f) << 5) | ((info->clause45 ? dev_addr : 
regnum) & 0x1f) | (2 << 10));
 
/* wait for rx data available */
udelay(100);
@@ -63,9 +78,14 @@ static int ihs_mdio_write(struct mii_dev *bus, int addr, int 
dev_addr,
 
ihs_mdio_idle(bus);
 
+   if (info->clause45) {
+   ihs_mdio_address(info, addr, dev_addr, regnum);
+   ihs_mdio_idle(bus);
+   }
+
FPGA_SET_REG(info->fpga, mdio.address_data, value);
FPGA_SET_REG(info->fpga, mdio.control,
-((addr & 0x1f) << 5) | (regnum & 0x1f) | (1 << 10));
+((addr & 0x1f) << 5) | ((info->clause45 ? dev_addr : 
regnum) & 0x1f) | (1 << 10));
 
return 0;
 }
@@ -75,7 +95,7 @@ int ihs_mdio_init(struct ihs_mdio_info *info)
struct mii_dev *bus = mdio_alloc();
 
if (!bus) {
-   printf("Failed to allocate FSL MDIO bus\n");
+   printf("Failed to allocate IHS MDIO bus\n");
return -1;
}
 
diff --git a/board/gdsys/common/ihs_mdio.h b/board/gdsys/common/ihs_mdio.h
index 64b4049378..372f07569c 100644
--- a/board/gdsys/common/ihs_mdio.h
+++ b/board/gdsys/common/ihs_mdio.h
@@ -11,6 +11,7 @@
 struct ihs_mdio_info {
u32 fpga;
char *name;
+   bool clause45;
 };
 
 int ihs_mdio_init(struct ihs_mdio_info *info);
-- 
2.11.0

___
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U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot

[U-Boot] [PATCH 12/51] cfi_flash: Fix style violations

[Mario Six]

Fix style violations in the CFI flash driver.

Signed-off-by: Mario Six 
---

 drivers/mtd/cfi_flash.c | 889 
 1 file changed, 443 insertions(+), 446 deletions(-)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 048a51785e..18be3bee53 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -177,7 +177,9 @@ __maybe_weak u64 flash_read64(void *addr)
 
 /*---
  */
-#if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || 
(CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
+#if defined(CONFIG_ENV_IS_IN_FLASH) || \
+   defined(CONFIG_ENV_ADDR_REDUND) || \
+   (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
 flash_info_t *flash_get_info(ulong base)
 {
int i;
@@ -205,8 +207,8 @@ unsigned long flash_sector_size(flash_info_t *info, 
flash_sect_t sect)
 /*---
  * create an address based on the offset and the port width
  */
-static inline void *
-flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
+static inline void *flash_map(flash_info_t *info, flash_sect_t sect,
+ uint offset)
 {
unsigned int byte_offset = offset * info->portwidth;
 
@@ -214,7 +216,7 @@ flash_map (flash_info_t * info, flash_sect_t sect, uint 
offset)
 }
 
 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
-   unsigned int offset, void *addr)
+  unsigned int offset, void *addr)
 {
 }
 
@@ -230,16 +232,16 @@ static void flash_make_cmd(flash_info_t *info, u32 cmd, 
void *cmdbuf)
u32 cmd_le = cpu_to_le32(cmd);
 #endif
uchar val;
-   uchar *cp = (uchar *) cmdbuf;
+   uchar *cp = (uchar *)cmdbuf;
 
-   for (i = info->portwidth; i > 0; i--){
-   cword_offset = (info->portwidth-i)%info->chipwidth;
+   for (i = info->portwidth; i > 0; i--) {
+   cword_offset = (info->portwidth - i) % info->chipwidth;
 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
cp_offset = info->portwidth - i;
-   val = *((uchar*)&cmd_le + cword_offset);
+   val = *((uchar *)&cmd_le + cword_offset);
 #else
cp_offset = i - 1;
-   val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
+   val = *((uchar *)&cmd + sizeof(u32) - cword_offset - 1);
 #endif
cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
}
@@ -254,12 +256,12 @@ static void print_longlong (char *str, unsigned long long 
data)
int i;
char *cp;
 
-   cp = (char *) &data;
+   cp = (char *)&data;
for (i = 0; i < 8; i++)
-   sprintf (&str[i * 2], "%2.2x", *cp++);
+   sprintf(&str[i * 2], "%2.2x", *cp++);
 }
 
-static void flash_printqry (struct cfi_qry *qry)
+static void flash_printqry(struct cfi_qry *qry)
 {
u8 *p = (u8 *)qry;
int x, y;
@@ -271,6 +273,7 @@ static void flash_printqry (struct cfi_qry *qry)
debug(" ");
for (y = 0; y < 16; y++) {
unsigned char c = p[x + y];
+
if (c >= 0x20 && c <= 0x7e)
debug("%c", c);
else
@@ -281,45 +284,43 @@ static void flash_printqry (struct cfi_qry *qry)
 }
 #endif
 
-
 /*---
  * read a character at a port width address
  */
-static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
+static inline uchar flash_read_uchar(flash_info_t *info, uint offset)
 {
uchar *cp;
uchar retval;
 
-   cp = flash_map (info, 0, offset);
+   cp = flash_map(info, 0, offset);
 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
retval = flash_read8(cp);
 #else
retval = flash_read8(cp + info->portwidth - 1);
 #endif
-   flash_unmap (info, 0, offset, cp);
+   flash_unmap(info, 0, offset, cp);
return retval;
 }
 
 /*---
  * read a word at a port width address, assume 16bit bus
  */
-static inline ushort flash_read_word (flash_info_t * info, uint offset)
+static inline ushort flash_read_word(flash_info_t *info, uint offset)
 {
ushort *addr, retval;
 
-   addr = flash_map (info, 0, offset);
-   retval = flash_read16 (addr);
-   flash_unmap (info, 0, offset, addr);
+   addr = flash_map(info, 0, offset);
+   retval = flash_read16(addr);
+   flash_unmap(info, 0, offset, addr);
return retval;
 }
 
-
 /*---
  * read a long word by picking the least significant byte of each maximum
  * port size word. Swap for ppc format.
  */
-static ulong flash

[U-Boot] [PATCH 37/51] drivers: Add ihs_video_out driver

[Mario Six]

Add a driver for IHS OSDs on IHS FPGAs.

Signed-off-by: Mario Six 
---

 drivers/misc/Kconfig |   6 ++
 drivers/misc/Makefile|   1 +
 drivers/misc/ihs_video_out.c | 243 +++
 include/dm/uclass-id.h   |   1 +
 include/ihs_video_out.h  | 146 ++
 5 files changed, 397 insertions(+)
 create mode 100644 drivers/misc/ihs_video_out.c
 create mode 100644 include/ihs_video_out.h

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index c53f9f195e..c0e4b921b4 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -209,4 +209,10 @@ config IHS_AXI
help
  Support for IHS AXI bus.
 
+config IHS_VIDEO_OUT
+   bool "Enable IHS video out driver"
+   depends on MISC
+   help
+ Support for IHS video out.
+
 endmenu
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index a6c71acedd..eab539b739 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -54,3 +54,4 @@ obj-$(CONFIG_QFW) += qfw.o
 obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
 obj-$(CONFIG_IHS_FPGA) += ihs_fpga.o gdsys_soc.o
 obj-$(CONFIG_IHS_AXI) += ihs_axi.o
+obj-$(CONFIG_IHS_VIDEO_OUT) += ihs_video_out.o
diff --git a/drivers/misc/ihs_video_out.c b/drivers/misc/ihs_video_out.c
new file mode 100644
index 00..a7e855f054
--- /dev/null
+++ b/drivers/misc/ihs_video_out.c
@@ -0,0 +1,243 @@
+/*
+ * (C) Copyright 2017
+ * Mario Six,  Guntermann & Drunck GmbH, mario@gdsys.cc
+ *
+ * based on the gdsys osd driver, which is
+ *
+ * (C) Copyright 2010
+ * Dirk Eibach,  Guntermann & Drunck GmbH, eib...@gdsys.de
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "../transmitter/logicore_dp_tx.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum {
+   REG_VERSION = 0x00,
+   REG_FEATURES = 0x02,
+   REG_CONTROL = 0x04,
+   REG_XY_SIZE = 0x06,
+   REG_XY_SCALE = 0x08,
+   REG_X_POS = 0x0A,
+   REG_Y_POS = 0x0C,
+};
+
+struct ihs_video_out_priv {
+   int addr;
+   int osd_base;
+   int osd_buffer_base;
+   uint base_width;
+   uint base_height;
+   int sync_src;
+   struct udevice *dp_tx;
+   struct udevice *clk_gen;
+};
+
+UCLASS_DRIVER(ihs_video_out) = {
+   .id = UCLASS_IHS_VIDEO_OUT,
+   .name   = "ihs_video_out",
+   .flags  = DM_UC_FLAG_SEQ_ALIAS,
+};
+
+static const struct udevice_id ihs_video_out_ids[] = {
+   { .compatible = "gdsys,ihs_video_out" },
+   { }
+};
+
+int video_out_get_data(struct udevice *dev, struct ihs_video_out_data *data)
+{
+   struct ihs_video_out_ops *ops = ihs_video_out_get_ops(dev);
+
+   return ops->get_data(dev, data);
+}
+
+int video_out_set_mem(struct udevice *dev, uint x, uint y, u16 *buf,
+ size_t buflen)
+{
+   struct ihs_video_out_ops *ops = ihs_video_out_get_ops(dev);
+
+   return ops->set_mem(dev, x, y, buf, buflen);
+}
+
+int video_out_set_control(struct udevice *dev, u16 value)
+{
+   struct ihs_video_out_ops *ops = ihs_video_out_get_ops(dev);
+
+   return ops->set_control(dev, value);
+}
+
+int video_out_set_size(struct udevice *dev, u16 xy_size, u16 x_pos, u16 y_pos)
+{
+   struct ihs_video_out_ops *ops = ihs_video_out_get_ops(dev);
+
+   return ops->set_size(dev, xy_size, x_pos, y_pos);
+}
+
+void print_info(struct udevice *dev)
+{
+   struct ihs_video_out_priv *priv = dev_get_priv(dev);
+   struct gdsys_soc_child_platdata *pplat = dev_get_parent_platdata(dev);
+   u16 version;
+   u16 features;
+   u16 control = 0x49;
+
+   version = fpga_in_le16(pplat->fpga, priv->osd_base + REG_VERSION);
+   features = fpga_in_le16(pplat->fpga, priv->osd_base + REG_FEATURES);
+
+   if (priv->sync_src)
+   control |= ((priv->sync_src & 0x7) << 8);
+
+   fpga_out_le16(pplat->fpga, priv->osd_base + REG_CONTROL, control);
+
+   priv->base_width = ((features & 0x3f00) >> 8) + 1;
+   priv->base_height = (features & 0x001f) + 1;
+
+   printf("OSD-%s: Digital-OSD version %01d.%02d, %d x %d characters\n",
+  dev->name, version / 100, version % 100,
+  priv->base_width, priv->base_height);
+}
+
+int ihs_video_out_get_data(struct udevice *dev, struct ihs_video_out_data 
*data)
+{
+   struct ihs_video_out_priv *priv = dev_get_priv(dev);
+
+   data->width = priv->base_width;
+   data->height = priv->base_height;
+
+   return 0;
+}
+
+int ihs_video_out_set_mem(struct udevice *dev, uint x, uint y, u16 *buf,
+ size_t buflen)
+{
+   struct ihs_video_out_priv *priv = dev_get_priv(dev);
+   struct gdsys_soc_child_platdata *pplat = dev_get_parent_platdata(dev);
+   uint offset = y * priv->base_width + x;
+   uint k;
+
+   for (k = 0; k < buflen; ++k) {
+   if (offset + k >= priv->base_width * p

[U-Boot] [PATCH 39/51] drivers: Add gdsys_ioep driver

[Mario Six]

Add driver for the IHS IO endpoint on IHS FPGAs.

Signed-off-by: Mario Six 
---

 drivers/misc/Kconfig  |   6 +
 drivers/misc/Makefile |   1 +
 drivers/misc/gdsys_ioep.c | 301 ++
 include/dm/uclass-id.h|   1 +
 include/gdsys_ioep.h  | 196 ++
 5 files changed, 505 insertions(+)
 create mode 100644 drivers/misc/gdsys_ioep.c
 create mode 100644 include/gdsys_ioep.h

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index dd768e2a7a..f8885380d0 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -221,4 +221,10 @@ config GDSYS_RXAUI_CTRL
help
  Support gdsys FPGA's RXAUI control.
 
+config GDSYS_IOEP
+   bool "Enable gdsys IOEP driver"
+   depends on MISC
+   help
+ Support gdsys FPGA's IO endpoint driver.
+
 endmenu
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 3ff9e66da2..40788c9acc 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -56,3 +56,4 @@ obj-$(CONFIG_IHS_FPGA) += ihs_fpga.o gdsys_soc.o
 obj-$(CONFIG_IHS_AXI) += ihs_axi.o
 obj-$(CONFIG_IHS_VIDEO_OUT) += ihs_video_out.o
 obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o
+obj-$(CONFIG_GDSYS_IOEP) += gdsys_ioep.o
diff --git a/drivers/misc/gdsys_ioep.c b/drivers/misc/gdsys_ioep.c
new file mode 100644
index 00..5bf1796a40
--- /dev/null
+++ b/drivers/misc/gdsys_ioep.c
@@ -0,0 +1,301 @@
+/*
+ * (C) Copyright 2017
+ * Mario Six,  Guntermann & Drunck GmbH, mario@gdsys.cc
+ *
+ * based on the cmd_ioloop driver/command, which is
+ *
+ * (C) Copyright 2014
+ * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eib...@gdsys.cc
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum {
+   REG_TRANSMIT_DATA = 0x0,
+   REG_TX_CONTROL = 0x2,
+   REG_RECEIVE_DATA = 0x4,
+   REG_RX_TX_STATUS = 0x6,
+   REG_DEVICE_ADDRESS = 0xA,
+   REG_TARGET_ADDRESS = 0xC,
+   REG_INT_ENABLE = 0xE,
+};
+
+enum {
+   STATE_TX_PACKET_BUILDING = BIT(0),
+   STATE_TX_TRANSMITTING = BIT(1),
+   STATE_TX_BUFFER_FULL = BIT(2),
+   STATE_TX_ERR = BIT(3),
+   STATE_RECEIVE_TIMEOUT = BIT(4),
+   STATE_PROC_RX_STORE_TIMEOUT = BIT(5),
+   STATE_PROC_RX_RECEIVE_TIMEOUT = BIT(6),
+   STATE_RX_DIST_ERR = BIT(7),
+   STATE_RX_LENGTH_ERR = BIT(8),
+   STATE_RX_FRAME_CTR_ERR = BIT(9),
+   STATE_RX_FCS_ERR = BIT(10),
+   STATE_RX_PACKET_DROPPED = BIT(11),
+   STATE_RX_DATA_LAST = BIT(12),
+   STATE_RX_DATA_FIRST = BIT(13),
+   STATE_RX_DATA_AVAILABLE = BIT(15),
+};
+
+enum {
+   CTRL_PROC_RECEIVE_ENABLE = BIT(12),
+   CTRL_FLUSH_TRANSMIT_BUFFER = BIT(15),
+};
+
+enum {
+   IRQ_CPU_TRANSMITBUFFER_FREE_STATUS = BIT(5),
+   IRQ_CPU_PACKET_TRANSMITTED_EVENT = BIT(6),
+   IRQ_NEW_CPU_PACKET_RECEIVED_EVENT = BIT(7),
+   IRQ_CPU_RECEIVE_DATA_AVAILABLE_STATUS = BIT(8),
+};
+
+struct gdsys_ioep_priv {
+   int addr;
+};
+
+int ioep_enable_receive(struct udevice *dev)
+{
+   struct ioep_ops *ops = ioep_get_ops(dev);
+
+   return ops->enable_receive(dev);
+}
+
+int ioep_disable_receive(struct udevice *dev)
+{
+   struct ioep_ops *ops = ioep_get_ops(dev);
+
+   return ops->disable_receive(dev);
+}
+
+int ioep_send(struct udevice *dev, struct io_generic_packet *header, u16 *data)
+{
+   struct ioep_ops *ops = ioep_get_ops(dev);
+
+   return ops->send(dev, header, data);
+}
+
+int ioep_receive(struct udevice *dev, struct io_generic_packet *header,
+u16 *data)
+{
+   struct ioep_ops *ops = ioep_get_ops(dev);
+
+   return ops->receive(dev, header, data);
+}
+
+int ioep_set_address(struct udevice *dev, u16 addr)
+{
+   struct ioep_ops *ops = ioep_get_ops(dev);
+
+   return ops->set_address(dev, addr);
+}
+
+bool ioep_data_available(struct udevice *dev)
+{
+   struct ioep_ops *ops = ioep_get_ops(dev);
+
+   return ops->data_available(dev);
+}
+
+int ioep_reset_status(struct udevice *dev, bool print_status)
+{
+   struct ioep_ops *ops = ioep_get_ops(dev);
+
+   return ops->reset_status(dev, print_status);
+}
+
+UCLASS_DRIVER(ioep) = {
+   .id = UCLASS_IOEP,
+   .name   = "ioep",
+   .flags  = DM_UC_FLAG_SEQ_ALIAS,
+};
+
+int gdsys_ioep_enable_receive(struct udevice *dev)
+{
+   struct gdsys_ioep_priv *priv = dev_get_priv(dev);
+   struct gdsys_soc_child_platdata *pplat = dev_get_parent_platdata(dev);
+
+   fpga_out_le16(pplat->fpga, priv->addr + REG_TX_CONTROL,
+ CTRL_PROC_RECEIVE_ENABLE);
+
+   return 0;
+}
+
+int gdsys_ioep_disable_receive(struct udevice *dev)
+{
+   struct gdsys_ioep_priv *priv = dev_get_priv(dev);
+   struct gdsys_soc_child_platdata *pplat = dev_get_parent_platdata(dev);
+
+   fpga_out_le16(pplat->fpga, priv->addr + REG_TX_CONTROL,
+ ~CTRL_PROC_

[U-Boot] [PATCH 50/51] gazerbeam: Add u-boot specific dts include file

[Mario Six]

Add a U-Boot specific dts file, which encapsulates the needed
modifications to the Gazerbeam Linux device tree.

Signed-off-by: Mario Six 
---

 arch/powerpc/dts/gazerbeam.dts  |   2 +
 arch/powerpc/dts/gdsys/gazerbeam-uboot.dtsi | 192 
 2 files changed, 194 insertions(+)
 create mode 100644 arch/powerpc/dts/gdsys/gazerbeam-uboot.dtsi

diff --git a/arch/powerpc/dts/gazerbeam.dts b/arch/powerpc/dts/gazerbeam.dts
index 35b7af4173..df0081e5c4 100644
--- a/arch/powerpc/dts/gazerbeam.dts
+++ b/arch/powerpc/dts/gazerbeam.dts
@@ -537,3 +537,5 @@
};
 
 };
+
+/include/ "gdsys/gazerbeam-uboot.dtsi"
diff --git a/arch/powerpc/dts/gdsys/gazerbeam-uboot.dtsi 
b/arch/powerpc/dts/gdsys/gazerbeam-uboot.dtsi
new file mode 100644
index 00..37a5d78283
--- /dev/null
+++ b/arch/powerpc/dts/gdsys/gazerbeam-uboot.dtsi
@@ -0,0 +1,192 @@
+/ {
+   aliases {
+   i2c0 = &IIC;
+   i2c1 = &IIC2;
+   i2c2 = "/fpga0bus/fpga0_iic_main";
+   i2c3 = "/fpga0bus/fpga0_iic_video0";
+   i2c4 = "/fpga0bus/fpga0_iic_video1";
+   i2c5 = "/fpga0bus/fpga0_iic_usb";
+   };
+
+   REGMAP0: registermap {
+   compatible = "gdsys,ihs-fpga-regmap";
+   #address-cells = <2>;
+   #size-cells = <1>;
+
+   reflection-low@0,15 {
+   compatible = "reflection-low";
+   reg = <0x0 15 16>;
+   };
+
+   versions@2,15 {
+   compatible = "versions";
+   reg = <0x2 15 16>;
+   };
+
+   fpga-version@4,15 {
+   compatible = "fpga-version";
+   reg = <0x4 15 16>;
+   };
+
+   fpga-features@6,15 {
+   compatible = "fpga-features";
+   reg = <0x6 15 16>;
+   };
+
+   fpga-ext-features@8,15 {
+   compatible = "fpga-ext-features";
+   reg = <0x8 15 16>;
+   };
+
+   control@10,15 {
+   compatible = "control";
+   reg = <0x2 15 16>;
+   };
+
+   top-interrupt@A,15 {
+   compatible = "top-interrupt";
+   reg = <0xA 15 16>;
+   };
+   };
+};
+
+&FPGA0 {
+   regmap = <®MAP0>;
+
+   reset-gpios = <&IOPCA 26 0>;
+   done-gpios = <&GPIO_VB0 19 0>;
+   startupfin-gpios = <&gpio0 1 0 &gpio0 2 0>;
+};
+
+&FPGA0BUS {
+   ranges = <0x0 0xe060 0x4000>;
+   fpga = <&FPGA0>;
+
+   fpga0_rxaui@fc0 {
+   compatible = "gdsys,rxaui_ctrl";
+   reg = <0x0fc0 0x10>;
+   };
+
+   fpga0_rxaui@fd0 {
+   compatible = "gdsys,rxaui_ctrl";
+   reg = <0x0fd0 0x10>;
+   };
+
+   fpga0_rxaui@fe0 {
+   compatible = "gdsys,rxaui_ctrl";
+   reg = <0x0fe0 0x10>;
+   };
+
+   fpga0_rxaui@ff0 {
+   compatible = "gdsys,rxaui_ctrl";
+   reg = <0x0ff0 0x10>;
+   };
+
+   fpga0_video0 {
+   mode = "640_480_60";
+   };
+
+   fpga0_axi_video0 {
+   fpga0_dp_video0 {
+   clocks = <&fpga0_video0_clkgen>;
+   };
+   };
+
+   fpga0_iic_video0  {
+   fpga0_video0_clkgen {
+   #clock-cells = <0>;
+   };
+   };
+
+   fpga0_video1 {
+   mode = "640_480_60";
+   };
+
+   fpga0_axi_video1 {
+   fpga0_dp_video1 {
+   clocks = <&fpga0_video0_clkgen>;
+   };
+   };
+
+   fpga0_iic_video1  {
+   fpga0_video1_clkgen {
+   #clock-cells = <0>;
+   };
+   };
+};
+
+&FPGA1BUS {
+   fpga1_video0 {
+   mode = "640_480_60";
+   };
+
+   fpga1_axi_video0 {
+   fpga1_dp_video0 {
+   clocks = <&fpga0_video0_clkgen>;
+   };
+   };
+
+   fpga1_iic_video0  {
+   fpga1_video0_clkgen {
+   #clock-cells = <0>;
+   };
+   };
+
+   fpga1_video1 {
+   mode = "640_480_60";
+   };
+
+   fpga1_axi_video1 {
+   fpga1_dp_video1 {
+   clocks = <&fpga0_video0_clkgen>;
+   };
+   };
+
+   fpga1_iic_video1  {
+   fpga1_video1_clkgen {
+   #clock-cells = <0>;
+   };
+   };
+};
+
+&board_soc {
+   u-boot,dm-pre-reloc;
+};
+
+&IIC {
+   compatible = "fsl-i2c";
+   u-boot,dm-pre-reloc;
+
+   IOPCA: pca9698@20 {
+   u-boot,dm-pre-reloc;
+   };
+
+   PPCPCA: pca9698@22 {
+   u-boot,dm-pre-reloc;
+   };
+
+   at97sc3205t@29 {
+   u-boot,i2c-of

[U-Boot] [PATCH 51/51] mpc83xx: Add gazerbeam board

[Mario Six]

From: Dirk Eibach 

The gdsys gazerbeam board is based on a Freescale MPC8308 SOC.
It boots from NOR-Flash, kernel and rootfs are stored on
SD-Card.

On board peripherals include:
- 2x 10/100 Mbit/s Ethernet (optional)

Signed-off-by: Dirk Eibach 
Signed-off-by: Mario Six 
---

 arch/powerpc/cpu/mpc83xx/Kconfig |   3 +
 arch/powerpc/dts/.gitignore  |   1 +
 arch/powerpc/dts/Makefile|  15 +
 board/gdsys/common/Makefile  |   1 +
 board/gdsys/common/ioep-fpga.c   | 617 ++-
 board/gdsys/mpc8308/Kconfig  |  19 ++
 board/gdsys/mpc8308/MAINTAINERS  |   2 +
 board/gdsys/mpc8308/Makefile |   1 +
 board/gdsys/mpc8308/gazerbeam.c  | 332 +
 configs/gazerbeam_defconfig  |  76 +
 include/configs/gazerbeam.h  | 484 ++
 include/fdt_fixup.h  |   5 +
 12 files changed, 1416 insertions(+), 140 deletions(-)
 create mode 100644 arch/powerpc/dts/.gitignore
 create mode 100644 arch/powerpc/dts/Makefile
 create mode 100644 board/gdsys/mpc8308/gazerbeam.c
 create mode 100644 configs/gazerbeam_defconfig
 create mode 100644 include/configs/gazerbeam.h

diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig
index cdd21a253a..0790b47aa4 100644
--- a/arch/powerpc/cpu/mpc83xx/Kconfig
+++ b/arch/powerpc/cpu/mpc83xx/Kconfig
@@ -91,6 +91,9 @@ config TARGET_STRIDER
bool "Support strider"
select SYS_FSL_ERRATUM_ESDHC111
 
+config TARGET_GAZERBEAM
+   bool "Support gazerbeam"
+
 endchoice
 
 source "board/esd/vme8349/Kconfig"
diff --git a/arch/powerpc/dts/.gitignore b/arch/powerpc/dts/.gitignore
new file mode 100644
index 00..b60ed208c7
--- /dev/null
+++ b/arch/powerpc/dts/.gitignore
@@ -0,0 +1 @@
+*.dtb
diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile
new file mode 100644
index 00..7a0c61ffaa
--- /dev/null
+++ b/arch/powerpc/dts/Makefile
@@ -0,0 +1,15 @@
+#
+# SPDX-License-Identifier:  GPL-2.0+
+#
+
+dtb-$(CONFIG_TARGET_GAZERBEAM) += gazerbeam.dtb
+
+targets += $(dtb-y)
+
+DTC_FLAGS += -R 4 -p 0x1000
+
+PHONY += dtbs
+dtbs: $(addprefix $(obj)/, $(dtb-y))
+@:
+
+clean-files := *.dtb
diff --git a/board/gdsys/common/Makefile b/board/gdsys/common/Makefile
index 6f2fea207f..52561db2e1 100644
--- a/board/gdsys/common/Makefile
+++ b/board/gdsys/common/Makefile
@@ -13,3 +13,4 @@ obj-$(CONFIG_STRIDER) += mclink.o dp501.o phy.o ioep-fpga.o 
adv7611.o ch7301.o
 obj-$(CONFIG_STRIDER) += fanctrl.o
 obj-$(CONFIG_STRIDER_CON) += osd.o
 obj-$(CONFIG_STRIDER_CON_DP) += osd.o
+obj-$(CONFIG_TARGET_GAZERBEAM) += osd.o ihs_mdio.o ioep-fpga.o
diff --git a/board/gdsys/common/ioep-fpga.c b/board/gdsys/common/ioep-fpga.c
index a666b93445..24585672f6 100644
--- a/board/gdsys/common/ioep-fpga.c
+++ b/board/gdsys/common/ioep-fpga.c
@@ -11,231 +11,568 @@
 
 #include 
 
-enum {
-   UNITTYPE_MAIN_SERVER = 0,
-   UNITTYPE_MAIN_USER = 1,
-   UNITTYPE_VIDEO_SERVER = 2,
-   UNITTYPE_VIDEO_USER = 3,
+enum pcb_video_type {
+   PCB_DVI_SL,
+   PCB_DP_165MPIX,
+   PCB_DP_300MPIX,
+   PCB_HDMI,
+   PCB_DP_1_2,
+   PCB_HDMI_2_0,
 };
 
-enum {
-   UNITTYPEPCB_DVI = 0,
-   UNITTYPEPCB_DP_165 = 1,
-   UNITTYPEPCB_DP_300 = 2,
-   UNITTYPEPCB_HDMI = 3,
+enum pcb_transmission_type {
+   PCB_CAT_1G,
+   PCB_FIBER_3G,
+   PCB_CAT_10G,
+   PCB_FIBER_10G,
 };
 
-enum {
-   COMPRESSION_NONE = 0,
-   COMPRESSION_TYPE_1 = 1,
-   COMPRESSION_TYPE_1_2 = 3,
-   COMPRESSION_TYPE_1_2_3 = 7,
+enum carrier_speed {
+   CARRIER_SPEED_1G,
+   CARRIER_SPEED_3G,
+   CARRIER_SPEED_2_5G = CARRIER_SPEED_3G,
+   CARRIER_SPEED_10G,
 };
 
-enum {
-   AUDIO_NONE = 0,
-   AUDIO_TX = 1,
-   AUDIO_RX = 2,
-   AUDIO_RXTX = 3,
+enum ram_config {
+   RAM_DDR2_32BIT_295MBPS,
+   RAM_DDR3_32BIT_590MBPS,
+   RAM_DDR3_48BIT_590MBPS,
+   RAM_DDR3_64BIT_1800MBPS,
+   RAM_DDR3_48BIT_1800MBPS,
 };
 
-enum {
-   SYSCLK_147456 = 0,
+enum sysclock {
+   SYSCLK_147456,
 };
 
-enum {
-   RAM_DDR2_32 = 0,
-   RAM_DDR3_32 = 1,
-   RAM_DDR3_48 = 2,
+struct fpga_versions {
+   bool video_channel;
+   bool con_side;
+   enum pcb_video_type pcb_video_type;
+   enum pcb_transmission_type pcb_transmission_type;
+   unsigned int hw_version;
 };
 
-enum {
-   CARRIER_SPEED_1G = 0,
-   CARRIER_SPEED_2_5G = 1,
+struct fpga_features {
+   u8 video_channels;
+   u8 carriers;
+   enum carrier_speed carrier_speed;
+   enum ram_config ram_config;
+   enum sysclock sysclock;
+
+   bool pcm_tx;
+   bool pcm_rx;
+   bool spdif_tx;
+   bool spdif_rx;
+   bool usb2;
+   bool rs232;
+   bool compression_type1;
+   bool compression_type2;
+   bool compression_type3;
+   bool interlace;
+   bool osd;
+   bool compression_pipes;
 };
 
-bool ioep_fpga_has_osd(unsigned int fpga)
+#ifdef C

[U-Boot] [PATCH 47/51] ihs_mdio: Fix style violations

[Mario Six]

Fix some style violations in the ihs_mdio driver, and make the code more
readable where possible.

Signed-off-by: Mario Six 
---

 board/gdsys/common/ihs_mdio.c | 10 +++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/board/gdsys/common/ihs_mdio.c b/board/gdsys/common/ihs_mdio.c
index 85a804d5cd..4e3bcd406f 100644
--- a/board/gdsys/common/ihs_mdio.c
+++ b/board/gdsys/common/ihs_mdio.c
@@ -38,7 +38,7 @@ static int ihs_mdio_reset(struct mii_dev *bus)
 }
 
 static int ihs_mdio_address(struct ihs_mdio_info *info, int addr, int dev_addr,
-int regnum)
+   int regnum)
 {
FPGA_SET_REG(info->fpga, mdio.address_data, regnum);
FPGA_SET_REG(info->fpga, mdio.control,
@@ -61,7 +61,9 @@ static int ihs_mdio_read(struct mii_dev *bus, int addr, int 
dev_addr,
}
 
FPGA_SET_REG(info->fpga, mdio.control,
-((addr & 0x1f) << 5) | ((info->clause45 ? dev_addr : 
regnum) & 0x1f) | (2 << 10));
+((addr & 0x1f) << 5) |
+ ((info->clause45 ? dev_addr : regnum) & 0x1f) |
+ (2 << 10));
 
/* wait for rx data available */
udelay(100);
@@ -85,7 +87,9 @@ static int ihs_mdio_write(struct mii_dev *bus, int addr, int 
dev_addr,
 
FPGA_SET_REG(info->fpga, mdio.address_data, value);
FPGA_SET_REG(info->fpga, mdio.control,
-((addr & 0x1f) << 5) | ((info->clause45 ? dev_addr : 
regnum) & 0x1f) | (1 << 10));
+((addr & 0x1f) << 5) |
+ ((info->clause45 ? dev_addr : regnum) & 0x1f) |
+ (1 << 10));
 
return 0;
 }
-- 
2.11.0

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[U-Boot] [PATCH 43/51] gdsys: cmd_ioloop: Fix style violations

[Mario Six]

Fix some style violations in the ioloop command, and make the code more
readable where possible.

Signed-off-by: Mario Six 
---

 board/gdsys/common/cmd_ioloop.c | 78 -
 1 file changed, 38 insertions(+), 40 deletions(-)

diff --git a/board/gdsys/common/cmd_ioloop.c b/board/gdsys/common/cmd_ioloop.c
index 0e81c9d9e4..a052b24501 100644
--- a/board/gdsys/common/cmd_ioloop.c
+++ b/board/gdsys/common/cmd_ioloop.c
@@ -12,33 +12,33 @@
 #include 
 
 enum {
-   STATE_TX_PACKET_BUILDING = 1<<0,
-   STATE_TX_TRANSMITTING = 1<<1,
-   STATE_TX_BUFFER_FULL = 1<<2,
-   STATE_TX_ERR = 1<<3,
-   STATE_RECEIVE_TIMEOUT = 1<<4,
-   STATE_PROC_RX_STORE_TIMEOUT = 1<<5,
-   STATE_PROC_RX_RECEIVE_TIMEOUT = 1<<6,
-   STATE_RX_DIST_ERR = 1<<7,
-   STATE_RX_LENGTH_ERR = 1<<8,
-   STATE_RX_FRAME_CTR_ERR = 1<<9,
-   STATE_RX_FCS_ERR = 1<<10,
-   STATE_RX_PACKET_DROPPED = 1<<11,
-   STATE_RX_DATA_LAST = 1<<12,
-   STATE_RX_DATA_FIRST = 1<<13,
-   STATE_RX_DATA_AVAILABLE = 1<<15,
+   STATE_TX_PACKET_BUILDING = BIT(0),
+   STATE_TX_TRANSMITTING = BIT(1),
+   STATE_TX_BUFFER_FULL = BIT(2),
+   STATE_TX_ERR = BIT(3),
+   STATE_RECEIVE_TIMEOUT = BIT(4),
+   STATE_PROC_RX_STORE_TIMEOUT = BIT(5),
+   STATE_PROC_RX_RECEIVE_TIMEOUT = BIT(6),
+   STATE_RX_DIST_ERR = BIT(7),
+   STATE_RX_LENGTH_ERR = BIT(8),
+   STATE_RX_FRAME_CTR_ERR = BIT(9),
+   STATE_RX_FCS_ERR = BIT(10),
+   STATE_RX_PACKET_DROPPED = BIT(11),
+   STATE_RX_DATA_LAST = BIT(12),
+   STATE_RX_DATA_FIRST = BIT(13),
+   STATE_RX_DATA_AVAILABLE = BIT(15),
 };
 
 enum {
-   CTRL_PROC_RECEIVE_ENABLE = 1<<12,
-   CTRL_FLUSH_TRANSMIT_BUFFER = 1<<15,
+   CTRL_PROC_RECEIVE_ENABLE = BIT(12),
+   CTRL_FLUSH_TRANSMIT_BUFFER = BIT(15),
 };
 
 enum {
-   IRQ_CPU_TRANSMITBUFFER_FREE_STATUS = 1<<5,
-   IRQ_CPU_PACKET_TRANSMITTED_EVENT = 1<<6,
-   IRQ_NEW_CPU_PACKET_RECEIVED_EVENT = 1<<7,
-   IRQ_CPU_RECEIVE_DATA_AVAILABLE_STATUS = 1<<8,
+   IRQ_CPU_TRANSMITBUFFER_FREE_STATUS = BIT(5),
+   IRQ_CPU_PACKET_TRANSMITTED_EVENT = BIT(6),
+   IRQ_NEW_CPU_PACKET_RECEIVED_EVENT = BIT(7),
+   IRQ_CPU_RECEIVE_DATA_AVAILABLE_STATUS = BIT(8),
 };
 
 struct io_generic_packet {
@@ -53,7 +53,7 @@ unsigned long long rx_ctr;
 unsigned long long tx_ctr;
 unsigned long long err_ctr;
 
-static void io_check_status(unsigned int fpga, u16 status, bool silent)
+static void io_check_status(uint fpga, u16 status, bool silent)
 {
u16 mask = STATE_RX_DIST_ERR | STATE_RX_LENGTH_ERR |
   STATE_RX_FRAME_CTR_ERR | STATE_RX_FCS_ERR |
@@ -86,9 +86,9 @@ static void io_check_status(unsigned int fpga, u16 status, 
bool silent)
printf("TX_ERR\n");
 }
 
-static void io_send(unsigned int fpga, unsigned int size)
+static void io_send(uint fpga, uint size)
 {
-   unsigned int k;
+   uint k;
struct io_generic_packet packet = {
.source_address = 1,
.packet_type = 1,
@@ -108,9 +108,8 @@ static void io_send(unsigned int fpga, unsigned int size)
tx_ctr++;
 }
 
-static void io_receive(unsigned int fpga)
+static void io_receive(uint fpga)
 {
-   unsigned int k = 0;
u16 rx_tx_status;
 
FPGA_GET_REG(fpga, ep.rx_tx_status, &rx_tx_status);
@@ -124,17 +123,15 @@ static void io_receive(unsigned int fpga)
FPGA_GET_REG(fpga, ep.receive_data, &rx);
 
FPGA_GET_REG(fpga, ep.rx_tx_status, &rx_tx_status);
-
-   ++k;
}
 }
 
-static void io_reflect(unsigned int fpga)
+static void io_reflect(uint fpga)
 {
u16 buffer[128];
 
-   unsigned int k = 0;
-   unsigned int n;
+   uint k = 0;
+   uint n;
u16 rx_tx_status;
 
FPGA_GET_REG(fpga, ep.rx_tx_status, &rx_tx_status);
@@ -167,8 +164,8 @@ static void io_reflect(unsigned int fpga)
  */
 int do_ioreflect(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
-   unsigned int fpga;
-   unsigned int rate = 0;
+   uint fpga;
+   uint rate = 0;
unsigned long long last_seen = 0;
 
if (argc < 2)
@@ -182,10 +179,10 @@ int do_ioreflect(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
if (argc > 2)
rate = simple_strtoul(argv[2], NULL, 10);
 
-   /* enable receive path */
+   /* Enable receive path */
FPGA_SET_REG(fpga, ep.rx_tx_control, CTRL_PROC_RECEIVE_ENABLE);
 
-   /* set device address to dummy 1*/
+   /* Set device address to dummy 1*/
FPGA_SET_REG(fpga, ep.device_address, 1);
 
rx_ctr = 0; tx_ctr = 0; err_ctr = 0;
@@ -216,18 +213,19 @@ int do_ioreflect(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
return 0;
 }
 
+#define DISP_LINE_LEN  16
+
 /*
  * FPGA io-endpoint looptest
  *
  * Syntax:
  * ioloop {fpga} {size} {rate}
  */
-#define DISP_LINE_LEN  16
 int do_ioloop(cmd_

[U-Boot] [PATCH 29/51] i2c: ihs_i2c: Make DM compatible

[Mario Six]

Make the ihs_i2c driver DM-compatible; for legacy boards, the old functions are
retained within #ifdefs.

No board uses the new DM driver yet; this patch only lays the foundation for
future support.

Signed-off-by: Mario Six 
---

 drivers/i2c/Kconfig  |   6 ++
 drivers/i2c/ihs_i2c.c| 197 ++-
 scripts/config_whitelist.txt |   1 -
 3 files changed, 200 insertions(+), 4 deletions(-)

diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 8ac1cc6a15..12901f544e 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -201,6 +201,12 @@ config TEGRA186_BPMP_I2C
  by the BPMP, and can only be accessed by the main CPU via IPC
  requests to the BPMP. This driver covers the latter case.
 
+config SYS_I2C_IHS
+   bool "gdsys IHS I2C driver"
+   depends on DM_I2C
+   help
+ Support for gdsys IHS I2C driver on FPGA bus.
+
 source "drivers/i2c/muxes/Kconfig"
 
 endmenu
diff --git a/drivers/i2c/ihs_i2c.c b/drivers/i2c/ihs_i2c.c
index e066ad53db..6aeda52cfa 100644
--- a/drivers/i2c/ihs_i2c.c
+++ b/drivers/i2c/ihs_i2c.c
@@ -3,18 +3,38 @@
  * Dirk Eibach,  Guntermann & Drunck GmbH, eib...@gdsys.de
  *
  * SPDX-License-Identifier:GPL-2.0+
- *
- * NOTE: This driver should be converted to driver model before June 2017.
- * Please see doc/driver-model/i2c-howto.txt for instructions.
  */
 
 #include 
 #include 
+#ifdef CONFIG_DM_I2C
+#include 
+#include 
+#include 
+#else
 #include 
+#endif
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef CONFIG_DM_I2C
+struct ihs_i2c_priv {
+   uint speed;
+   phys_addr_t addr;
+};
+
+enum {
+   REG_INTERRUPT_STATUS = 0x00,
+   REG_INTERRUPT_ENABLE_CONTROL = 0x02,
+   REG_WRITE_MAILBOX_EXT = 0x04,
+   REG_WRITE_MAILBOX = 0x06,
+   REG_READ_MAILBOX_EXT = 0x08,
+   REG_READ_MAILBOX = 0x0A,
+};
+
+#else /* !CONFIG_DM_I2C */
 #ifdef CONFIG_SYS_I2C_IHS_DUAL
+
 #define I2C_SET_REG(fld, val) \
do { \
if (I2C_ADAP_HWNR & 0x10) \
@@ -39,6 +59,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define I2C_GET_REG(fld, val) \
FPGA_GET_REG(I2C_ADAP_HWNR, i2c0.fld, val)
 #endif
+#endif /* CONFIG_DM_I2C */
 
 enum {
I2CINT_ERROR_EV = BIT(13),
@@ -61,33 +82,67 @@ enum {
I2COP_READ = 1,
 };
 
+#ifdef CONFIG_DM_I2C
+static int wait_for_int(struct udevice *dev, int read)
+#else
 static int wait_for_int(bool read)
+#endif
 {
u16 val;
uint ctr = 0;
+#ifdef CONFIG_DM_I2C
+   struct ihs_i2c_priv *priv = dev_get_priv(dev);
+   struct gdsys_soc_child_platdata *pplat = dev_get_parent_platdata(dev);
+#endif
 
+#ifdef CONFIG_DM_I2C
+   val = fpga_in_le16(pplat->fpga,
+  priv->addr + REG_INTERRUPT_STATUS);
+#else
I2C_GET_REG(interrupt_status, &val);
+#endif
/* Wait until error or receive/transmit interrupt was raised */
while (!(val & (I2CINT_ERROR_EV
   | (read ? I2CINT_RECEIVE_EV : I2CINT_TRANSMIT_EV {
udelay(10);
if (ctr++ > 5000)
return 1;
+#ifdef CONFIG_DM_I2C
+   val = fpga_in_le16(pplat->fpga,
+  priv->addr + REG_INTERRUPT_STATUS);
+#else
I2C_GET_REG(interrupt_status, &val);
+#endif
}
 
return (val & I2CINT_ERROR_EV) ? 1 : 0;
 }
 
+#ifdef CONFIG_DM_I2C
+static int ihs_i2c_transfer(struct udevice *dev, uchar chip,
+   uchar *buffer, int len, int read, bool is_last)
+#else
 static int ihs_i2c_transfer(uchar chip, uchar *buffer, int len, bool read,
bool is_last)
+#endif
 {
u16 val;
+#ifdef CONFIG_DM_I2C
+   struct ihs_i2c_priv *priv = dev_get_priv(dev);
+   struct gdsys_soc_child_platdata *pplat = dev_get_parent_platdata(dev);
+#endif
 
/* Clear interrupt status */
+#ifdef CONFIG_DM_I2C
+   fpga_out_le16(pplat->fpga, priv->addr + REG_INTERRUPT_STATUS,
+ I2CINT_ERROR_EV | I2CINT_RECEIVE_EV | I2CINT_TRANSMIT_EV);
+   val = fpga_in_le16(pplat->fpga,
+  priv->addr + REG_INTERRUPT_STATUS);
+#else
I2C_SET_REG(interrupt_status, I2CINT_ERROR_EV
 | I2CINT_RECEIVE_EV | I2CINT_TRANSMIT_EV);
I2C_GET_REG(interrupt_status, &val);
+#endif
 
/* If we want to write and have data, write the bytes to the mailbox */
if (!read && len) {
@@ -95,22 +150,45 @@ static int ihs_i2c_transfer(uchar chip, uchar *buffer, int 
len, bool read,
 
if (len > 1)
val |= buffer[1] << 8;
+#ifdef CONFIG_DM_I2C
+   fpga_out_le16(pplat->fpga,
+ priv->addr + REG_WRITE_MAILBOX_EXT, val);
+#else
I2C_SET_REG(write_mailbox_ext, val);
+#endif
}
 
+#ifdef CONFIG_DM_I2C
+   fpga_out_le16(pplat->fpga, priv->addr + REG_WRITE_MAILBOX,
+ I2CMB_NATIVE
+ | (read ? I2CMB

[U-Boot] [PATCH 24/51] gdsys: mpc8308: Move SYS_FPGA{0, 1}_{BASE, SIZE} to Kconfig

[Mario Six]

Move CONFIG_SYS_FPGA0_BASE, CONFIG_SYS_FPGA0_SIZE, CONFIG_SYS_FPGA1_BASE, and
CONFIG_SYS_FPGA1_SIZE to Kconfig.

Signed-off-by: Mario Six 
---

 board/gdsys/mpc8308/Kconfig  | 23 +++
 include/configs/hrcon.h  |  7 ---
 include/configs/strider.h|  7 ---
 scripts/config_whitelist.txt |  2 --
 4 files changed, 23 insertions(+), 16 deletions(-)

diff --git a/board/gdsys/mpc8308/Kconfig b/board/gdsys/mpc8308/Kconfig
index cb29c25c65..c0247214a9 100644
--- a/board/gdsys/mpc8308/Kconfig
+++ b/board/gdsys/mpc8308/Kconfig
@@ -1,3 +1,26 @@
+
+config SYS_FPGA0_BASE
+   hex
+   default E060
+   help
+ The base address of the first FPGA's register map.
+
+config SYS_FPGA0_SIZE
+   hex
+   default 1
+   help
+ The base address of the first FPGA's register map.
+
+config SYS_FPGA1_BASE
+   hex
+   help
+ The base address of the second FPGA's register map.
+
+config SYS_FPGA1_SIZE
+   hex
+   help
+ The base address of the second FPGA's register map.
+
 if TARGET_HRCON
 
 config SYS_BOARD
diff --git a/include/configs/hrcon.h b/include/configs/hrcon.h
index 405129b7e2..5db623d28e 100644
--- a/include/configs/hrcon.h
+++ b/include/configs/hrcon.h
@@ -243,12 +243,6 @@
 #define CONFIG_SYS_FLASH_ERASE_TOUT6 /* Flash Erase Timeout (ms) */
 #define CONFIG_SYS_FLASH_WRITE_TOUT500 /* Flash Write Timeout (ms) */
 
-/*
- * FPGA
- */
-#define CONFIG_SYS_FPGA0_BASE  0xE060
-#define CONFIG_SYS_FPGA0_SIZE  1 /* FPGA size is 1M */
-
 /* Window base at FPGA base */
 #define CONFIG_SYS_LBLAWBAR1_PRELIMCONFIG_SYS_FPGA0_BASE
 #define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_1MB)
@@ -266,7 +260,6 @@
| OR_GPCM_TRLX_SET \
| OR_GPCM_EHTR_SET)
 
-#define CONFIG_SYS_FPGA_BASE(k)CONFIG_SYS_FPGA0_BASE
 #define CONFIG_SYS_FPGA_DONE(k)0x0010
 
 #define CONFIG_SYS_FPGA_COUNT  1
diff --git a/include/configs/strider.h b/include/configs/strider.h
index 994ac73e13..8487a188a7 100644
--- a/include/configs/strider.h
+++ b/include/configs/strider.h
@@ -243,12 +243,6 @@
 #define CONFIG_SYS_FLASH_ERASE_TOUT6 /* Flash Erase Timeout (ms) */
 #define CONFIG_SYS_FLASH_WRITE_TOUT500 /* Flash Write Timeout (ms) */
 
-/*
- * FPGA
- */
-#define CONFIG_SYS_FPGA0_BASE  0xE060
-#define CONFIG_SYS_FPGA0_SIZE  1 /* FPGA size is 1M */
-
 /* Window base at FPGA base */
 #define CONFIG_SYS_LBLAWBAR1_PRELIMCONFIG_SYS_FPGA0_BASE
 #define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_1MB)
@@ -265,7 +259,6 @@
| OR_GPCM_TRLX_CLEAR \
| OR_GPCM_EHTR_CLEAR)
 
-#define CONFIG_SYS_FPGA_BASE(k)CONFIG_SYS_FPGA0_BASE
 #define CONFIG_SYS_FPGA_DONE(k)0x0010
 
 #define CONFIG_SYS_FPGA_COUNT  1
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 4c136a6502..64a4b1190e 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -3086,8 +3086,6 @@ CONFIG_SYS_FORM_PMC
 CONFIG_SYS_FORM_PMC_XMC
 CONFIG_SYS_FORM_VME
 CONFIG_SYS_FORM_XMC
-CONFIG_SYS_FPGA0_BASE
-CONFIG_SYS_FPGA0_SIZE
 CONFIG_SYS_FPGAREG_DATE
 CONFIG_SYS_FPGAREG_DIPSW
 CONFIG_SYS_FPGAREG_FREQ
-- 
2.11.0

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[U-Boot] [PATCH 40/51] cmd: Add ihs osd commands

[Mario Six]

Add command to query information from and write text to IHS OSDs.

Signed-off-by: Mario Six 
---

 cmd/Kconfig   |   6 +++
 cmd/Makefile  |   1 +
 cmd/ihs_osd.c | 167 ++
 3 files changed, 174 insertions(+)
 create mode 100644 cmd/ihs_osd.c

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 6425c425d6..b632049022 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -933,6 +933,12 @@ config CMD_DISPLAY
  displayed on a simple board-specific display. Implement
  display_putc() to use it.
 
+config CMD_IHS_OSD
+   bool "ihs osd"
+   help
+ Enable the 'osd' command which allows to query information from and
+ write text data to a gdsys OSD.
+
 config CMD_LED
bool "led"
default y if LED
diff --git a/cmd/Makefile b/cmd/Makefile
index 243f9f45d4..c30511982b 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -62,6 +62,7 @@ obj-$(CONFIG_CMD_FS_GENERIC) += fs.o
 obj-$(CONFIG_CMD_FUSE) += fuse.o
 obj-$(CONFIG_CMD_GETTIME) += gettime.o
 obj-$(CONFIG_CMD_GPIO) += gpio.o
+obj-$(CONFIG_CMD_IHS_OSD) += ihs_osd.o
 obj-$(CONFIG_CMD_I2C) += i2c.o
 obj-$(CONFIG_CMD_IOTRACE) += iotrace.o
 obj-$(CONFIG_CMD_HASH) += hash.o
diff --git a/cmd/ihs_osd.c b/cmd/ihs_osd.c
new file mode 100644
index 00..01ef3eee83
--- /dev/null
+++ b/cmd/ihs_osd.c
@@ -0,0 +1,167 @@
+/*
+ * (C) Copyright 2017
+ * Mario Six,  Guntermann & Drunck GmbH, mario@gdsys.cc
+ *
+ * based on the gdsys osd driver, which is
+ *
+ * (C) Copyright 2010
+ * Dirk Eibach,  Guntermann & Drunck GmbH, eib...@gdsys.de
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define MAX_VIDEOMEM_WIDTH 64
+#define MAX_VIDEOMEM_HEIGHT 32
+#define MAX_X_CHARS 53
+#define MAX_Y_CHARS 26
+
+size_t hexstr_to_u16_array(char *hexstr, u16 *array, size_t arrsize)
+{
+   size_t pos;
+
+   for (pos = 0; pos < arrsize; ++pos) {
+   char substr[5];
+
+   memcpy(substr, hexstr, 4);
+   substr[4] = 0;
+   *array = simple_strtoul(substr, NULL, 16);
+
+   hexstr += 4;
+   array++;
+   if (*hexstr == 0)
+   break;
+   }
+
+   return pos;
+}
+
+int do_osd_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+   struct udevice *dev;
+   uint x, y;
+   uint count;
+   char *hexstr;
+   u16 buffer[MAX_VIDEOMEM_WIDTH];
+   size_t buflen;
+
+   if ((argc < 4) || (strlen(argv[3]) % 4)) {
+   cmd_usage(cmdtp);
+   return 1;
+   }
+
+   x = simple_strtoul(argv[1], NULL, 16);
+   y = simple_strtoul(argv[2], NULL, 16);
+   hexstr = argv[3];
+   count = (argc > 4) ? simple_strtoul(argv[4], NULL, 16) : 1;
+
+   buflen = hexstr_to_u16_array(hexstr, buffer, MAX_VIDEOMEM_WIDTH);
+
+   for (uclass_find_first_device(UCLASS_IHS_VIDEO_OUT, &dev);
+dev;
+uclass_find_next_device(&dev)) {
+   uint k;
+
+   for (k = 0; k < count; ++k)
+   video_out_set_mem(dev, x + k * buflen, y, buffer,
+ buflen);
+
+   video_out_set_control(dev, 0x0049);
+   }
+
+   return 0;
+}
+
+static int do_osd_print(cmd_tbl_t *cmdtp, int flag, int argc,
+   char * const argv[])
+{
+   struct udevice *dev;
+   u16 buffer[MAX_VIDEOMEM_WIDTH];
+   uint x, y, charcount, len;
+   u8 color;
+   uint k;
+   char *text;
+
+   if (argc < 5) {
+   cmd_usage(cmdtp);
+   return 1;
+   }
+
+   x = simple_strtoul(argv[1], NULL, 16);
+   y = simple_strtoul(argv[2], NULL, 16);
+   color = simple_strtoul(argv[3], NULL, 16);
+   text = argv[4];
+   charcount = strlen(text);
+   len = min(charcount, (uint)MAX_VIDEOMEM_WIDTH);
+
+   for (uclass_find_first_device(UCLASS_IHS_VIDEO_OUT, &dev);
+dev;
+uclass_find_next_device(&dev)) {
+   int res;
+
+   for (k = 0; k < len; ++k)
+   buffer[k] = (text[k] << 8) | color;
+
+   res = video_out_set_mem(dev, x, y, buffer, len);
+
+   if (res < 0)
+   return res;
+
+   video_out_set_control(dev, 0x0049);
+   }
+
+   return 0;
+}
+
+int do_osd_size(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+   struct udevice *dev;
+   uint x, y;
+
+   if (argc < 3) {
+   cmd_usage(cmdtp);
+   return 1;
+   }
+
+   x = simple_strtoul(argv[1], NULL, 16);
+   y = simple_strtoul(argv[2], NULL, 16);
+
+   if (!x || (x > 64) || (x > MAX_X_CHARS) ||
+   !y || (y > 32) || (y > MAX_Y_CHARS)) {
+   cmd_usage(cmdtp);
+   return 1;
+   }
+
+   for (uclass_find_first_device(UCLASS_IHS_VIDEO_OUT, &dev);
+ 

[U-Boot] [PATCH 30/51] i2c: ihs_i2c: Factor out send_buffer method

[Mario Six]

Simplify the driver logic by extracting a common send_buffer method.

Signed-off-by: Mario Six 
---

 drivers/i2c/ihs_i2c.c | 50 ++
 1 file changed, 26 insertions(+), 24 deletions(-)

diff --git a/drivers/i2c/ihs_i2c.c b/drivers/i2c/ihs_i2c.c
index 6aeda52cfa..aa15608065 100644
--- a/drivers/i2c/ihs_i2c.c
+++ b/drivers/i2c/ihs_i2c.c
@@ -198,32 +198,48 @@ static int ihs_i2c_transfer(uchar chip, uchar *buffer, 
int len, bool read,
 }
 
 #ifdef CONFIG_DM_I2C
-static int ihs_i2c_address(struct udevice *dev, uchar chip, u8 *addr, int 
alen, bool hold_bus)
+static int ihs_i2c_send_buffer(struct udevice *dev, uchar chip, u8 *data, int 
len, bool hold_bus, int read)
 #else
-static int ihs_i2c_address(uchar chip, u8 *addr, int alen, bool hold_bus)
+static int ihs_i2c_send_buffer(uchar chip, u8 *data, int len, bool hold_bus,
+  int read)
 #endif
 {
-   while (alen) {
-   int transfer = min(alen, 2);
-   bool is_last = alen <= transfer;
+   while (len) {
+   int transfer = min(len, 2);
+   bool is_last = len <= transfer;
 
 #ifdef CONFIG_DM_I2C
-   if (ihs_i2c_transfer(dev, chip, addr, transfer, I2COP_WRITE,
+   if (ihs_i2c_transfer(dev, chip, data, transfer, read,
 hold_bus ? false : is_last))
return 1;
 #else
-   if (ihs_i2c_transfer(chip, addr, transfer, I2COP_WRITE,
+   if (ihs_i2c_transfer(chip, data, transfer, read,
 hold_bus ? false : is_last))
return 1;
 #endif
 
-   alen -= transfer;
+   data += transfer;
+   len -= transfer;
}
 
return 0;
 }
 
 #ifdef CONFIG_DM_I2C
+static int ihs_i2c_address(struct udevice *dev, uchar chip, u8 *addr, int alen,
+  bool hold_bus)
+#else
+static int ihs_i2c_address(uchar chip, u8 *addr, int alen, bool hold_bus)
+#endif
+{
+#ifdef CONFIG_DM_I2C
+   return ihs_i2c_send_buffer(dev, chip, addr, alen, hold_bus, 
I2COP_WRITE);
+#else
+   return ihs_i2c_send_buffer(chip, addr, alen, hold_bus, I2COP_WRITE);
+#endif
+}
+
+#ifdef CONFIG_DM_I2C
 static int ihs_i2c_access(struct udevice *dev, uchar chip, u8 *addr,
  int alen, uchar *buffer, int len, int read)
 #else
@@ -240,25 +256,11 @@ static int ihs_i2c_access(struct i2c_adapter *adap, uchar 
chip, u8 *addr,
return 1;
 #endif
 
-   while (len) {
-   int transfer = min(len, 2);
-   bool is_last = len <= transfer;
-
 #ifdef CONFIG_DM_I2C
-   if (ihs_i2c_transfer(dev, chip, buffer, transfer, read,
-is_last))
-   return 2;
+   return ihs_i2c_send_buffer(dev, chip, buffer, len, false, read);
 #else
-   if (ihs_i2c_transfer(chip, buffer, transfer, read,
-is_last))
-   return 2;
+   return ihs_i2c_send_buffer(chip, buffer, len, false, read);
 #endif
-
-   buffer += transfer;
-   len -= transfer;
-   }
-
-   return 0;
 }
 
 #ifdef CONFIG_DM_I2C
-- 
2.11.0

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[U-Boot] [PATCH 21/51] common: Extend board-specific DT fixup

[Mario Six]

Commit 2a79275 ("dm: Add callback to modify the device tree")
implemented a board-specific callback that can modify U-Boot's device
tree before relocation to accomodate a range of hardware variations of
certain boards.

However, this approach only turns out to be useful when the copy of the
device tree before relocation is actually writeable. If e.g. a device
boots out of a NOR flash, this scheme does not work, since the
modification of the flash's contents is not possible, and the unmodified
device tree is relocated and used by U-Boot.

To circumvent this problem, we split the modification process into two
phases.

In phase one we only collect information about the board by querying the
hardware (reading GPIO values, probing I2C chips, etc.), and store the
obtained information in a special, board-specific structure that is part
of the global data structure. This phase runs prior to relocation, and
utilizes the pre-relocation DM to query hardware information.

In phase two, we read the information back from the structure, and do
the actual manipulation of the device tree. This phase occurs *after*
the relocation of the U-Boot image, but before the driver model is
initialized from the device tree. Since the device tree lives in RAM
alongside the U-Boot image after relocation, the tree is definitely
writeable at this point.

Each phase is implemented by a board-specific callback function: phase
one by board_fix_fdt_get_info, which takes no arguments, and phase two
by board_fix_fdt_change, which takes the writeable device tree blob as
its sole argument. Since the structure where the gathered hardware
information is stored is necessarily board-dependent, we create a
include file where the boards utilizing the functionality can define
their individually needed structures.

This commit also adapts the controlcenterdc board's fixup function to
the new scheme.

Signed-off-by: Mario Six 
---

 board/gdsys/a38x/controlcenterdc.c |  20 +-
 common/board_f.c   |   6 +-
 common/board_r.c   |  10 +++
 doc/driver-model/fdt-fixup.txt | 129 -
 include/asm-generic/global_data.h  |   7 ++
 include/common.h   |   3 +-
 include/fdt_fixup.h|   5 ++
 7 files changed, 130 insertions(+), 50 deletions(-)
 create mode 100644 include/fdt_fixup.h

diff --git a/board/gdsys/a38x/controlcenterdc.c 
b/board/gdsys/a38x/controlcenterdc.c
index 32168d3576..05e18bac4c 100644
--- a/board/gdsys/a38x/controlcenterdc.c
+++ b/board/gdsys/a38x/controlcenterdc.c
@@ -236,7 +236,7 @@ int board_late_init(void)
return 0;
 }
 
-int board_fix_fdt(void *rw_fdt_blob)
+int board_fix_fdt_get_info(void)
 {
struct udevice *bus = NULL;
uint k;
@@ -254,7 +254,23 @@ int board_fix_fdt(void *rw_fdt_blob)
snprintf(name, 64,
 "/soc/internal-regs/i2c@11000/pca9698@%02x", k);
 
-   if (!dm_i2c_simple_probe(bus, k))
+   gd->board_fixup_data.chip_exists[k - 0x21] = 
dm_i2c_simple_probe(bus, k);
+   }
+
+   return 0;
+}
+
+int board_fix_fdt_change(void *rw_fdt_blob)
+{
+   struct of_board_fixup_data data = gd->board_fixup_data;
+   uint k;
+   char name[64];
+
+   for (k = 0x21; k <= 0x26; k++) {
+   snprintf(name, 64,
+"/soc/internal-regs/i2c@11000/pca9698@%02x", k);
+
+   if (!data.chip_exists[k - 0x21])
fdt_disable_by_ofname(rw_fdt_blob, name);
}
 
diff --git a/common/board_f.c b/common/board_f.c
index b258a1a73c..b835bd22bc 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -660,9 +660,9 @@ static int setup_reloc(void)
 }
 
 #ifdef CONFIG_OF_BOARD_FIXUP
-static int fix_fdt(void)
+static int fix_fdt_get_info(void)
 {
-   return board_fix_fdt((void *)gd->fdt_blob);
+   return board_fix_fdt_get_info();
 }
 #endif
 
@@ -887,7 +887,7 @@ static const init_fnc_t init_sequence_f[] = {
 #endif
display_new_sp,
 #ifdef CONFIG_OF_BOARD_FIXUP
-   fix_fdt,
+   fix_fdt_get_info,
 #endif
INIT_FUNC_WATCHDOG_RESET
reloc_fdt,
diff --git a/common/board_r.c b/common/board_r.c
index 199cadbed1..25f27f0843 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -694,6 +694,13 @@ static int run_main_loop(void)
return 0;
 }
 
+#ifdef CONFIG_OF_BOARD_FIXUP
+static int fix_fdt_change(void)
+{
+   return board_fix_fdt_change((void *)gd->fdt_blob);
+}
+#endif
+
 /*
  * Over time we hope to remove these functions with code fragments and
  * stub funtcions, and instead call the relevant function directly.
@@ -731,6 +738,9 @@ static init_fnc_t init_sequence_r[] = {
 #ifdef CONFIG_OF_LIVE
initr_of_live,
 #endif
+#ifdef CONFIG_OF_BOARD_FIXUP
+   fix_fdt_change,
+#endif
 #ifdef CONFIG_DM
initr_dm,
 #endif
diff --git a/doc/driver-model/fdt-fixup.txt b/doc/driver-model/fdt-fixup.txt
index 70344bd2c3..9a9467edd8 100644
--- a/doc/driver-m

[U-Boot] [PATCH 33/51] drivers: Add transmitter uclass

[Mario Six]

This patch adds a simple transmitter uclass meant for DVI or DisplayPort
transmitters. The only driver functionality implemented are power_on and
power_off methods for powering the transmitter device on and off,
respectively.

Signed-off-by: Mario Six 
---

 arch/sandbox/dts/sandbox.dts  |  4 ++
 arch/sandbox/dts/test.dts |  4 ++
 configs/sandbox_defconfig |  2 +
 drivers/Kconfig   |  2 +
 drivers/Makefile  |  1 +
 drivers/transmitter/Kconfig   | 16 +++
 drivers/transmitter/Makefile  |  9 
 drivers/transmitter/sandbox_transmitter.c | 74 +++
 drivers/transmitter/transmitter-uclass.c  | 36 +++
 include/dm/uclass-id.h|  1 +
 include/transmitter.h | 49 
 test/dm/Makefile  |  1 +
 test/dm/transmitter.c | 31 +
 13 files changed, 230 insertions(+)
 create mode 100644 drivers/transmitter/Kconfig
 create mode 100644 drivers/transmitter/Makefile
 create mode 100644 drivers/transmitter/sandbox_transmitter.c
 create mode 100644 drivers/transmitter/transmitter-uclass.c
 create mode 100644 include/transmitter.h
 create mode 100644 test/dm/transmitter.c

diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts
index 0aba6c9a6d..0e84b840e7 100644
--- a/arch/sandbox/dts/sandbox.dts
+++ b/arch/sandbox/dts/sandbox.dts
@@ -238,6 +238,10 @@
compatible = "google,sandbox-tpm";
};
 
+   transmitter {
+   compatible = "sandbox,transmitter";
+   };
+
triangle {
compatible = "demo-shape";
colour = "cyan";
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 65b2f8ecda..36255809d3 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -392,6 +392,10 @@
clock-frequency = <100>;
};
 
+   transmitter {
+   compatible = "sandbox,transmitter";
+   };
+
uart0: serial {
compatible = "sandbox,serial";
u-boot,dm-pre-reloc;
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 7a1b9ef052..7e1eebee67 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -167,6 +167,8 @@ CONFIG_TIMER=y
 CONFIG_TIMER_EARLY=y
 CONFIG_SANDBOX_TIMER=y
 CONFIG_TPM_TIS_SANDBOX=y
+CONFIG_TRANSMITTER=y
+CONFIG_SANDBOX_TRANSMITTER=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_EMUL=y
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 2e03133c43..2d15e4ea09 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -90,6 +90,8 @@ source "drivers/timer/Kconfig"
 
 source "drivers/tpm/Kconfig"
 
+source "drivers/transmitter/Kconfig"
+
 source "drivers/usb/Kconfig"
 
 source "drivers/video/Kconfig"
diff --git a/drivers/Makefile b/drivers/Makefile
index 8624bd86f1..37cd6396fa 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -87,6 +87,7 @@ obj-y += sound/
 obj-y += spmi/
 obj-y += sysreset/
 obj-y += timer/
+obj-y += transmitter/
 obj-y += tpm/
 obj-y += video/
 obj-y += watchdog/
diff --git a/drivers/transmitter/Kconfig b/drivers/transmitter/Kconfig
new file mode 100644
index 00..64ca08f8b8
--- /dev/null
+++ b/drivers/transmitter/Kconfig
@@ -0,0 +1,16 @@
+#
+# Transmitter drivers configuration
+#
+
+menuconfig TRANSMITTER
+   bool "DVI/DP Transmitters"
+
+if TRANSMITTER
+
+config SANDBOX_TRANSMITTER
+   bool "Enable sandbox transmitter driver"
+   depends on DM
+   help
+ Enable the dummy transmitter for the sandbox.
+
+endif
diff --git a/drivers/transmitter/Makefile b/drivers/transmitter/Makefile
new file mode 100644
index 00..b873e63e28
--- /dev/null
+++ b/drivers/transmitter/Makefile
@@ -0,0 +1,9 @@
+#
+# (C) Copyright 2017
+# Mario Six,  Guntermann & Drunck GmbH, mario@gdsys.cc
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += transmitter-uclass.o
+obj-$(CONFIG_SANDBOX_TRANSMITTER) += sandbox_transmitter.o
diff --git a/drivers/transmitter/sandbox_transmitter.c 
b/drivers/transmitter/sandbox_transmitter.c
new file mode 100644
index 00..cb4c1e81e8
--- /dev/null
+++ b/drivers/transmitter/sandbox_transmitter.c
@@ -0,0 +1,74 @@
+/*
+ * (C) Copyright 2017
+ * Mario Six,  Guntermann & Drunck GmbH, mario@gdsys.cc
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+
+struct sandbox_transmitter_priv {
+   int power_state;
+};
+
+void sandbox_transmitter_set_state(struct udevice *dev, int power_state)
+{
+   struct sandbox_transmitter_priv *priv = dev_get_priv(dev);
+
+   priv->power_state = power_state;
+}
+
+int sandbox_transmitter_get_state(struct udevice *dev)
+{
+   struct sandbox_transmitter_priv *priv = dev_get_priv(dev);
+
+   return priv->power_state;
+}
+
+int sandbox_transmitter_power_on(struct udevice *dev, void *dat

[U-Boot] [PATCH 44/51] gdsys: cmd_ioloop: Introduce commenting enum

[Mario Six]

Replace the boolean parameter of io_check_status that controls whether
the status is printed or not with a documenting enum.

Signed-off-by: Mario Six 
---

 board/gdsys/common/cmd_ioloop.c | 13 +
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/board/gdsys/common/cmd_ioloop.c b/board/gdsys/common/cmd_ioloop.c
index a052b24501..2ea8bc8670 100644
--- a/board/gdsys/common/cmd_ioloop.c
+++ b/board/gdsys/common/cmd_ioloop.c
@@ -11,6 +11,11 @@
 
 #include 
 
+enum status_print_type {
+   STATUS_LOUD = 0,
+   STATUS_SILENT = 1,
+};
+
 enum {
STATE_TX_PACKET_BUILDING = BIT(0),
STATE_TX_TRANSMITTING = BIT(1),
@@ -53,7 +58,7 @@ unsigned long long rx_ctr;
 unsigned long long tx_ctr;
 unsigned long long err_ctr;
 
-static void io_check_status(uint fpga, u16 status, bool silent)
+static void io_check_status(uint fpga, u16 status, enum status_print_type type)
 {
u16 mask = STATE_RX_DIST_ERR | STATE_RX_LENGTH_ERR |
   STATE_RX_FRAME_CTR_ERR | STATE_RX_FCS_ERR |
@@ -67,7 +72,7 @@ static void io_check_status(uint fpga, u16 status, bool 
silent)
err_ctr++;
FPGA_SET_REG(fpga, ep.rx_tx_status, status);
 
-   if (silent)
+   if (type == STATUS_SILENT)
return;
 
if (status & STATE_RX_PACKET_DROPPED)
@@ -194,7 +199,7 @@ int do_ioreflect(cmd_tbl_t *cmdtp, int flag, int argc, char 
* const argv[])
FPGA_GET_REG(fpga, top_interrupt, &top_int);
FPGA_GET_REG(fpga, ep.rx_tx_status, &rx_tx_status);
 
-   io_check_status(fpga, rx_tx_status, true);
+   io_check_status(fpga, rx_tx_status, STATUS_SILENT);
if ((top_int & IRQ_CPU_RECEIVE_DATA_AVAILABLE_STATUS) &&
(top_int & IRQ_CPU_TRANSMITBUFFER_FREE_STATUS))
io_reflect(fpga);
@@ -261,7 +266,7 @@ int do_ioloop(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
FPGA_GET_REG(fpga, top_interrupt, &top_int);
FPGA_GET_REG(fpga, ep.rx_tx_status, &rx_tx_status);
 
-   io_check_status(fpga, rx_tx_status, false);
+   io_check_status(fpga, rx_tx_status, STATUS_LOUD);
if (top_int & IRQ_CPU_TRANSMITBUFFER_FREE_STATUS)
io_send(fpga, size);
if (top_int & IRQ_CPU_RECEIVE_DATA_AVAILABLE_STATUS)
-- 
2.11.0

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[U-Boot] [PATCH 41/51] cmd: Add ihs axi command

[Mario Six]

Add a command to debug the IHS AXI bus.

Signed-off-by: Mario Six 
---

 cmd/Kconfig   |   5 ++
 cmd/Makefile  |   2 +
 cmd/ihs_axi.c | 257 ++
 3 files changed, 264 insertions(+)
 create mode 100644 cmd/ihs_axi.c

diff --git a/cmd/Kconfig b/cmd/Kconfig
index b632049022..4bbe9d435c 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -753,6 +753,11 @@ config CMD_SATA
  Attachment, where AT refers to an IBM AT (Advanced Technology)
  computer released in 1984.
 
+config CMD_IHS_AXI
+   bool "axi"
+   help
+ Enable the GDSYS IHS AXI command for accessing the AXI bus.
+
 endmenu
 
 
diff --git a/cmd/Makefile b/cmd/Makefile
index c30511982b..0baaf76b47 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -144,6 +144,8 @@ obj-$(CONFIG_CMD_DFU) += dfu.o
 obj-$(CONFIG_CMD_GPT) += gpt.o
 obj-$(CONFIG_CMD_ETHSW) += ethsw.o
 
+obj-$(CONFIG_CMD_IHS_AXI) += ihs_axi.o
+
 # Power
 obj-$(CONFIG_CMD_PMIC) += pmic.o
 obj-$(CONFIG_CMD_REGULATOR) += regulator.o
diff --git a/cmd/ihs_axi.c b/cmd/ihs_axi.c
new file mode 100644
index 00..336c239fae
--- /dev/null
+++ b/cmd/ihs_axi.c
@@ -0,0 +1,257 @@
+/*
+ * (C) Copyright 2016
+ * Dirk Eibach,  Guntermann & Drunck GmbH, dirk.eib...@gdsys.cc
+ *
+ * (C) Copyright 2017
+ * Mario Six,  Guntermann & Drunck GmbH, mario@gdsys.cc
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static struct udevice *axi_cur_bus;
+static uint dp_last_addr;
+static uint dp_last_length = 0x40;
+
+static void show_bus(struct udevice *bus)
+{
+   struct udevice *dev;
+
+   printf("Bus %d:\t%s", bus->req_seq, bus->name);
+   if (device_active(bus))
+   printf("  (active %d)", bus->seq);
+   printf("\n");
+   for (device_find_first_child(bus, &dev);
+dev;
+device_find_next_child(&dev)) {
+   //struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
+
+   //printf("   %02x: %s, offset len %x, flags %x\n",
+  //chip->chip_addr, dev->name, chip->offset_len,
+  //chip->flags);
+   printf("  %s\n", dev->name);
+   }
+}
+
+static int do_axi_show_bus(cmd_tbl_t *cmdtp, int flag, int argc,
+  char * const argv[])
+{
+   if (argc == 1) {
+   /* show all busses */
+   struct udevice *bus;
+   struct uclass *uc;
+   int ret;
+
+   ret = uclass_get(UCLASS_IHS_AXI, &uc);
+   if (ret)
+   return CMD_RET_FAILURE;
+   uclass_foreach_dev(bus, uc)
+   show_bus(bus);
+   } else {
+   int i;
+
+   /* show specific bus */
+   i = simple_strtoul(argv[1], NULL, 10);
+
+   struct udevice *bus;
+   int ret;
+
+   ret = uclass_get_device_by_seq(UCLASS_IHS_AXI, i, &bus);
+   if (ret) {
+   printf("Invalid bus %d: err=%d\n", i, ret);
+   return CMD_RET_FAILURE;
+   }
+   show_bus(bus);
+   }
+
+   return 0;
+}
+
+static int cmd_axi_set_bus_num(unsigned int busnum)
+{
+   struct udevice *bus;
+   int ret;
+
+   ret = uclass_get_device_by_seq(UCLASS_IHS_AXI, busnum, &bus);
+   if (ret) {
+   debug("%s: No bus %d\n", __func__, busnum);
+   return ret;
+   }
+   axi_cur_bus = bus;
+
+   return 0;
+}
+
+static int axi_get_cur_bus(struct udevice **busp)
+{
+   if (!axi_cur_bus) {
+   puts("No AXI bus selected\n");
+   return ENODEV;
+   }
+   *busp = axi_cur_bus;
+
+   return 0;
+}
+
+static int do_axi_bus_num(cmd_tbl_t *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+   int ret = 0;
+   int bus_no;
+
+   if (argc == 1) {
+   /* querying current setting */
+   struct udevice *bus;
+
+   if (!axi_get_cur_bus(&bus))
+   bus_no = bus->seq;
+   else
+   bus_no = -1;
+   printf("Current bus is %d\n", bus_no);
+   } else {
+   bus_no = simple_strtoul(argv[1], NULL, 10);
+   printf("Setting bus to %d\n", bus_no);
+
+   ret = cmd_axi_set_bus_num(bus_no);
+
+   if (ret)
+   printf("Failure changing bus number (%d)\n", ret);
+   }
+
+   return ret ? CMD_RET_FAILURE : 0;
+}
+
+#define DISP_LINE_LEN  16
+
+int do_axi_md(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+   unsigned int k;
+   ulong   addr, length;
+   int rc = 0;
+   u32 linebuf[DISP_LINE_LEN / sizeof(u32)];
+   ulong nbytes;
+
+   /*
+* We use the last specified parameters, unless new ones are
+* entered.
+*/
+   ad

[U-Boot] [PATCH 13/51] cfi_flash: Clean up code some more

[Mario Six]

Fix some more style violations (mostly mis-indented case statements),
and reduce the scope of some variables.

Signed-off-by: Mario Six 
---

 drivers/mtd/cfi_flash.c | 610 
 1 file changed, 305 insertions(+), 305 deletions(-)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 18be3bee53..2445632580 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -183,10 +183,10 @@ __maybe_weak u64 flash_read64(void *addr)
 flash_info_t *flash_get_info(ulong base)
 {
int i;
-   flash_info_t *info;
 
for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
-   info = &flash_info[i];
+   flash_info_t *info = &flash_info[i];
+
if (info->size && info->start[0] <= base &&
base <= info->start[0] + info->size - 1)
return info;
@@ -226,8 +226,6 @@ static inline void flash_unmap(flash_info_t *info, 
flash_sect_t sect,
 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
 {
int i;
-   int cword_offset;
-   int cp_offset;
 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
u32 cmd_le = cpu_to_le32(cmd);
 #endif
@@ -235,7 +233,8 @@ static void flash_make_cmd(flash_info_t *info, u32 cmd, 
void *cmdbuf)
uchar *cp = (uchar *)cmdbuf;
 
for (i = info->portwidth; i > 0; i--) {
-   cword_offset = (info->portwidth - i) % info->chipwidth;
+   int cp_offset;
+   int cword_offset = (info->portwidth - i) % info->chipwidth;
 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
cp_offset = info->portwidth - i;
val = *((uchar *)&cmd_le + cword_offset);
@@ -1072,96 +1071,94 @@ int flash_erase(flash_info_t *info, int s_first, int 
s_last)
}
 
for (sect = s_first; sect <= s_last; sect++) {
+#ifdef CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
+   int k;
+   int size;
+   int erased;
+   u32 *flash;
+#endif
+
if (ctrlc()) {
printf("\n");
return 1;
}
 
-   if (info->protect[sect] == 0) { /* not protected */
-#ifdef CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
-   int k;
-   int size;
-   int erased;
-   u32 *flash;
+   if (info->protect[sect] != 0)
+   continue;
 
-   /*
-* Check if whole sector is erased
-*/
-   size = flash_sector_size(info, sect);
-   erased = 1;
-   flash = (u32 *)info->start[sect];
-   /* divide by 4 for longword access */
-   size = size >> 2;
-   for (k = 0; k < size; k++) {
-   if (flash_read32(flash++) != 0x) {
-   erased = 0;
-   break;
-   }
-   }
-   if (erased) {
-   if (flash_verbose)
-   putc(',');
-   continue;
+#ifdef CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
+   /*
+* Check if whole sector is erased
+*/
+   size = flash_sector_size(info, sect);
+   erased = 1;
+   flash = (u32 *)info->start[sect];
+   /* divide by 4 for longword access */
+   size = size >> 2;
+   for (k = 0; k < size; k++) {
+   if (flash_read32(flash++) != 0x) {
+   erased = 0;
+   break;
}
+   }
+   if (erased) {
+   if (flash_verbose)
+   putc(',');
+   continue;
+   }
 #endif
-   switch (info->vendor) {
-   case CFI_CMDSET_INTEL_PROG_REGIONS:
-   case CFI_CMDSET_INTEL_STANDARD:
-   case CFI_CMDSET_INTEL_EXTENDED:
-   flash_write_cmd(info, sect, 0,
-   FLASH_CMD_CLEAR_STATUS);
-   flash_write_cmd(info, sect, 0,
-   FLASH_CMD_BLOCK_ERASE);
-   flash_write_cmd(info, sect, 0,
-   FLASH_CMD_ERASE_CONFIRM);
-   break;
-   case CFI_CMDSET_AMD_STANDARD:
-   case CFI_CMDSET_AMD_EXTENDED:
-   flash_unlock

[U-Boot] [PATCH 36/51] drivers: Add ihs_axi driver

[Mario Six]

Add a driver for the IHS AXI bus on IHS FPGAs.

Signed-off-by: Mario Six 
---

 drivers/misc/Kconfig   |   7 ++
 drivers/misc/Makefile  |   1 +
 drivers/misc/ihs_axi.c | 208 +
 include/dm/uclass-id.h |   1 +
 include/ihs_axi.h  |  69 
 5 files changed, 286 insertions(+)
 create mode 100644 drivers/misc/ihs_axi.c
 create mode 100644 include/ihs_axi.h

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 8b59a444ce..c53f9f195e 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -202,4 +202,11 @@ config IHS_FPGA
depends on MISC
help
  Support for IHS FPGA.
+
+config IHS_AXI
+   bool "Enable IHS AXI driver"
+   depends on MISC
+   help
+ Support for IHS AXI bus.
+
 endmenu
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index d2e46fc7d6..a6c71acedd 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -53,3 +53,4 @@ obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
 obj-$(CONFIG_QFW) += qfw.o
 obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
 obj-$(CONFIG_IHS_FPGA) += ihs_fpga.o gdsys_soc.o
+obj-$(CONFIG_IHS_AXI) += ihs_axi.o
diff --git a/drivers/misc/ihs_axi.c b/drivers/misc/ihs_axi.c
new file mode 100644
index 00..07150e2262
--- /dev/null
+++ b/drivers/misc/ihs_axi.c
@@ -0,0 +1,208 @@
+/*
+ * (C) Copyright 2016
+ * Dirk Eibach,  Guntermann & Drunck GmbH, dirk.eib...@gdsys.cc
+ *
+ * (C) Copyright 2017
+ * Mario Six,  Guntermann & Drunck GmbH, mario@gdsys.cc
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum {
+   REG_INTERRUPT_STATUS = 0x00,
+   REG_INTERRUPT_ENABLE_CONTROL = 0x02,
+   REG_ADDRESS_LSB = 0x04,
+   REG_ADDRESS_MSB = 0x06,
+   REG_WRITE_DATA_LSB = 0x08,
+   REG_WRITE_DATA_MSB = 0x0A,
+   REG_READ_DATA_LSB = 0x0C,
+   REG_READ_DATA_MSB = 0x0E,
+};
+
+struct ihs_axi_priv {
+   fdt_addr_t addr;
+};
+
+enum {
+   STATUS_EVENT_MASK = GENMASK(15, 12),
+
+   STATUS_READ_COMPLETE_EVENT = BIT(15),
+   STATUS_WRITE_COMPLETE_EVENT = BIT(14),
+   STATUS_TIMEOUT_EVENT = BIT(13),
+   STATUS_ERROR_EVENT = BIT(12),
+   STATUS_AXI_INT = BIT(11),
+   STATUS_READ_DATA_AVAILABLE = BIT(7),
+   STATUS_BUSY = BIT(6),
+   STATUS_INIT_DONE = BIT(5),
+};
+
+enum {
+   CONTROL_EVENT_ENABLE_MASK = GENMASK(15, 11),
+   CONTROL_CMD_MASK = GENMASK(3, 0),
+
+   CONTROL_READ_COMPLETE_EVENT_ENABLE = BIT(15),
+   CONTROL_WRITE_COMPLETE_EVENT_ENABLE = BIT(14),
+   CONTROL_TIMEOUT_EVENT_ENABLE = BIT(13),
+   CONTROL_ERROR_EVENT_ENABLE = BIT(12),
+   CONTROL_AXI_INT_ENABLE = BIT(11),
+
+   CONTROL_CMD_NOP = 0x0,
+   CONTROL_CMD_WRITE = 0x8,
+   CONTROL_CMD_WRITE_POST_INC = 0x9,
+   CONTROL_CMD_READ = 0xa,
+   CONTROL_CMD_READ_POST_INC = 0xb,
+
+};
+
+static int axi_transfer(struct udevice *bus, u32 address, u16 cmd,
+   u16 complete_flag)
+{
+   struct ihs_axi_priv *priv = dev_get_priv(bus);
+   struct gdsys_soc_child_platdata *pplat = dev_get_parent_platdata(bus);
+   u16 wait_mask = complete_flag | STATUS_TIMEOUT_EVENT |
+   STATUS_ERROR_EVENT;
+   u16 status;
+   uint k;
+
+   cmd &= CONTROL_CMD_MASK;
+
+   fpga_out_le16(pplat->fpga, priv->addr + REG_ADDRESS_LSB,
+ address & 0x);
+   fpga_out_le16(pplat->fpga, priv->addr + REG_ADDRESS_MSB,
+ (address >> 16) & 0x);
+
+   fpga_out_le16(pplat->fpga, priv->addr + REG_INTERRUPT_STATUS,
+ wait_mask);
+   fpga_out_le16(pplat->fpga, priv->addr + REG_INTERRUPT_ENABLE_CONTROL,
+ cmd);
+
+   for (k = 10; k > 0; --k) {
+   status = fpga_in_le16(pplat->fpga,
+ priv->addr + REG_INTERRUPT_STATUS);
+   if (status & wait_mask)
+   break;
+   udelay(1);
+   }
+
+   if (!k)
+   status = fpga_in_le16(pplat->fpga,
+ priv->addr + REG_INTERRUPT_STATUS);
+
+   if (status & complete_flag)
+   return 0;
+
+   if (status & STATUS_ERROR_EVENT)
+   return -EIO;
+
+   return -ETIMEDOUT;
+}
+
+int axi_read(struct udevice *dev, u32 address, u32 *data)
+{
+   struct ihs_axi_ops *ops = ihs_axi_get_ops(dev);
+
+   return ops->read(dev, address, data);
+}
+
+int axi_write(struct udevice *dev, u32 address, u32 data)
+{
+   struct ihs_axi_ops *ops = ihs_axi_get_ops(dev);
+
+   return ops->write(dev, address, data);
+}
+
+/*
+ * API
+ */
+
+int ihs_axi_read(struct udevice *dev, u32 address, u32 *data)
+{
+   struct ihs_axi_priv *priv = dev_get_priv(dev);
+   struct gdsys_soc_child_platdata *pplat = dev_get_parent_platdata(dev);
+   int res = 0;
+   u16 

[U-Boot] [PATCH 16/51] gpio: mpc85xx_gpio: Make compatible with MPC8XXX

[Mario Six]

Since the GPIO controllers on MPC8XXX just vary in the number of pins
offered, the DM driver for the MPC85XX SoC can be used for the whole
family.

To reflect this, we rename the mpc85xx_gpio driver to the more generic
mpc8xxx_gpio, and add the needed mpc8xxx_gpio_plat structure to the
mpc83xx gpio.h.

Hence, this driver now also serves as a GPIO DM-driver for the MPC83XX
platform.

Signed-off-by: Mario Six 
---

 arch/powerpc/include/asm/arch-mpc83xx/gpio.h |   8 +
 arch/powerpc/include/asm/arch-mpc85xx/gpio.h |   2 +-
 drivers/gpio/Kconfig |   9 +-
 drivers/gpio/Makefile|   2 +-
 drivers/gpio/mpc85xx_gpio.c  | 253 -
 drivers/gpio/mpc8xxx_gpio.c  | 274 +++
 6 files changed, 287 insertions(+), 261 deletions(-)
 delete mode 100644 drivers/gpio/mpc85xx_gpio.c
 create mode 100644 drivers/gpio/mpc8xxx_gpio.c

diff --git a/arch/powerpc/include/asm/arch-mpc83xx/gpio.h 
b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h
index 40ef2151b8..6ec4f00022 100644
--- a/arch/powerpc/include/asm/arch-mpc83xx/gpio.h
+++ b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h
@@ -19,7 +19,15 @@
 
 #define MAX_NUM_GPIOS (32 * MPC83XX_GPIO_CTRLRS)
 
+struct mpc8xxx_gpio_plat {
+   ulong addr;
+   unsigned long size;
+   uint ngpios;
+};
+
+#ifndef DM_GPIO
 void mpc83xx_gpio_init_f(void);
 void mpc83xx_gpio_init_r(void);
+#endif /* DM_GPIO */
 
 #endif /* MPC83XX_GPIO_H_ */
diff --git a/arch/powerpc/include/asm/arch-mpc85xx/gpio.h 
b/arch/powerpc/include/asm/arch-mpc85xx/gpio.h
index 76faa22c8b..b2ba31e623 100644
--- a/arch/powerpc/include/asm/arch-mpc85xx/gpio.h
+++ b/arch/powerpc/include/asm/arch-mpc85xx/gpio.h
@@ -18,7 +18,7 @@
 #include 
 #endif
 
-struct mpc85xx_gpio_plat {
+struct mpc8xxx_gpio_plat {
ulong addr;
unsigned long size;
uint ngpios;
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 15135e538d..4e37e2179e 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -239,11 +239,11 @@ config DM_PCA953X
  Now, max 24 bits chips and PCA953X compatible chips are
  supported
 
-config MPC85XX_GPIO
-   bool "Freescale MPC85XX GPIO driver"
+config MPC8XXX_GPIO
+   bool "Freescale MPC8XXX GPIO driver"
depends on DM_GPIO
help
- This driver supports the built-in GPIO controller of MPC85XX CPUs.
+ This driver supports the built-in GPIO controller of MPC8XXX CPUs.
  Each GPIO bank is identified by its own entry in the device tree,
  i.e.
 
@@ -261,7 +261,4 @@ config MPC85XX_GPIO
  Aside from the standard functions of input/output mode, and output
  value setting, the open-drain feature, which can configure individual
  GPIOs to work as open-drain outputs, is supported.
-
- The driver has been tested on MPC85XX, but it is likely that other
- PowerQUICC III devices will work as well.
 endmenu
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 8937e99b47..3f38555ab0 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -37,7 +37,7 @@ obj-$(CONFIG_DA8XX_GPIO)  += da8xx_gpio.o
 obj-$(CONFIG_DM644X_GPIO)  += da8xx_gpio.o
 obj-$(CONFIG_ALTERA_PIO)   += altera_pio.o
 obj-$(CONFIG_MPC83XX_GPIO) += mpc83xx_gpio.o
-obj-$(CONFIG_MPC85XX_GPIO) += mpc85xx_gpio.o
+obj-$(CONFIG_MPC8XXX_GPIO) += mpc8xxx_gpio.o
 obj-$(CONFIG_SH_GPIO_PFC)  += sh_pfc.o
 obj-$(CONFIG_OMAP_GPIO)+= omap_gpio.o
 obj-$(CONFIG_DB8500_GPIO)  += db8500_gpio.o
diff --git a/drivers/gpio/mpc85xx_gpio.c b/drivers/gpio/mpc85xx_gpio.c
deleted file mode 100644
index 4566c091b7..00
--- a/drivers/gpio/mpc85xx_gpio.c
+++ /dev/null
@@ -1,253 +0,0 @@
-/*
- * (C) Copyright 2016
- * Mario Six, Guntermann & Drunck GmbH, s...@gdsys.de
- *
- * based on arch/powerpc/include/asm/mpc85xx_gpio.h, which is
- *
- * Copyright 2010 eXMeritus, A Boeing Company
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-
-#include 
-#include 
-#include 
-#include 
-
-DECLARE_GLOBAL_DATA_PTR;
-
-struct ccsr_gpio {
-   u32 gpdir;
-   u32 gpodr;
-   u32 gpdat;
-   u32 gpier;
-   u32 gpimr;
-   u32 gpicr;
-};
-
-struct mpc85xx_gpio_data {
-   /* The bank's register base in memory */
-   struct ccsr_gpio __iomem *base;
-   /* The address of the registers; used to identify the bank */
-   ulong addr;
-   /* The GPIO count of the bank */
-   uint gpio_count;
-   /* The GPDAT register cannot be used to determine the value of output
-* pins on MPC8572/MPC8536, so we shadow it and use the shadowed value
-* for output pins
-*/
-   u32 dat_shadow;
-};
-
-inline u32 gpio_mask(uint gpio)
-{
-   return (1U << (31 - (gpio)));
-}
-
-static inline u32 mpc85xx_gpio_get_val(struct ccsr_gpio *base, u32 mask)
-{
-   return in_be32(&base->gpdat) & mask;
-}
-
-static in

[U-Boot] [PATCH 35/51] drivers: Add ICS8N3QV01 driver

[Mario Six]

Add a driver for the ICS8N3QV01 Quad-Frequency Programmable VCXO.

Signed-off-by: Mario Six 
---

 drivers/clk/Kconfig  |   6 ++
 drivers/clk/Makefile |   1 +
 drivers/clk/ics8n3qv01.c | 184 +++
 3 files changed, 191 insertions(+)
 create mode 100644 drivers/clk/ics8n3qv01.c

diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 44da716b26..f6f3810b64 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -56,4 +56,10 @@ source "drivers/clk/uniphier/Kconfig"
 source "drivers/clk/exynos/Kconfig"
 source "drivers/clk/at91/Kconfig"
 
+config ICS8N3QV01
+   bool "Enable ICS8N3QV01 VCXO driver"
+   depends on CLK
+   help
+ Support for the ICS8N3QV01 VCXO.
+
 endmenu
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 2746a8016a..d7cc486d23 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -21,3 +21,4 @@ obj-$(CONFIG_CLK_BCM6345) += clk_bcm6345.o
 obj-$(CONFIG_CLK_BOSTON) += clk_boston.o
 obj-$(CONFIG_ARCH_ASPEED) += aspeed/
 obj-$(CONFIG_STM32F7) += clk_stm32f7.o
+obj-$(CONFIG_ICS8N3QV01) += ics8n3qv01.o
diff --git a/drivers/clk/ics8n3qv01.c b/drivers/clk/ics8n3qv01.c
new file mode 100644
index 00..f5f4b74982
--- /dev/null
+++ b/drivers/clk/ics8n3qv01.c
@@ -0,0 +1,184 @@
+/*
+ * (C) Copyright 2017
+ * Mario Six,  Guntermann & Drunck GmbH, mario@gdsys.cc
+ *
+ * based on the gdsys osd driver, which is
+ *
+ * (C) Copyright 2010
+ * Dirk Eibach,  Guntermann & Drunck GmbH, eib...@gdsys.de
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+const long long ICS8N3QV01_FREF = 114285000;
+const long long ICS8N3QV01_FREF_LL = 114285000LL;
+const long long ICS8N3QV01_F_DEFAULT_0 = 15625LL;
+const long long ICS8N3QV01_F_DEFAULT_1 = 12500LL;
+const long long ICS8N3QV01_F_DEFAULT_2 = 1LL;
+const long long ICS8N3QV01_F_DEFAULT_3 = 25175000LL;
+
+struct ics8n3qv01_priv {
+   ulong rate;
+};
+
+static uint ics8n3qv01_get_fout_calc(struct udevice *dev, uint index)
+{
+   u64 n, mint, mfrac;
+   u8 reg_a, reg_b, reg_c, reg_d, reg_f;
+   u64 fout_calc;
+
+   if (index > 3)
+   return 0;
+
+   reg_a = dm_i2c_reg_read(dev, 0 + index);
+   reg_b = dm_i2c_reg_read(dev, 4 + index);
+   reg_c = dm_i2c_reg_read(dev, 8 + index);
+   reg_d = dm_i2c_reg_read(dev, 12 + index);
+   reg_f = dm_i2c_reg_read(dev, 20 + index);
+
+   mint = ((reg_a >> 1) & 0x1f) | (reg_f & 0x20);
+   mfrac = ((reg_a & 0x01) << 17) | (reg_b << 9) | (reg_c << 1)
+   | (reg_d >> 7);
+   n = reg_d & 0x7f;
+
+   fout_calc = (mint * ICS8N3QV01_FREF_LL
++ mfrac * ICS8N3QV01_FREF_LL / 262144LL
++ ICS8N3QV01_FREF_LL / 524288LL
++ n / 2)
+   / n
+   * 100
+   / (100 - 100);
+
+   return fout_calc;
+}
+
+static void ics8n3qv01_calc_parameters(uint fout, uint *_mint, uint *_mfrac,
+  uint *_n)
+{
+   uint n, foutiic, fvcoiic, mint;
+   u64 mfrac;
+
+   n = (221500U + fout / 2) / fout;
+   if ((n & 1) && (n > 5))
+   n -= 1;
+
+   foutiic = fout - (fout / 1);
+   fvcoiic = foutiic * n;
+
+   mint = fvcoiic / 114285000;
+   if ((mint < 17) || (mint > 63))
+   printf("ics8n3qv01_calc_parameters: cannot determine mint\n");
+
+   mfrac = ((u64)fvcoiic % 114285000LL) * 262144LL
+   / 114285000LL;
+
+   *_mint = mint;
+   *_mfrac = mfrac;
+   *_n = n;
+}
+
+static ulong ics8n3qv01_set_rate(struct clk *clk, ulong fout)
+{
+   struct ics8n3qv01_priv *priv = dev_get_priv(clk->dev);
+   uint n, mint, mfrac, fout_calc;
+   u64 fout_prog;
+   long long off_ppm;
+   u8 reg0, reg4, reg8, reg12, reg18, reg20;
+
+   priv->rate = fout;
+
+   fout_calc = ics8n3qv01_get_fout_calc(clk->dev, 1);
+   off_ppm = (fout_calc - ICS8N3QV01_F_DEFAULT_1) * 100
+ / ICS8N3QV01_F_DEFAULT_1;
+   printf("%s: PLL is off by %lld ppm\n", clk->dev->name, off_ppm);
+   fout_prog = (u64)fout * (u64)fout_calc
+   / ICS8N3QV01_F_DEFAULT_1;
+   ics8n3qv01_calc_parameters(fout_prog, &mint, &mfrac, &n);
+
+   reg0 = dm_i2c_reg_read(clk->dev, 0) & 0xc0;
+   reg0 |= (mint & 0x1f) << 1;
+   reg0 |= (mfrac >> 17) & 0x01;
+   dm_i2c_reg_write(clk->dev, 0, reg0);
+
+   reg4 = mfrac >> 9;
+   dm_i2c_reg_write(clk->dev, 4, reg4);
+
+   reg8 = mfrac >> 1;
+   dm_i2c_reg_write(clk->dev, 8, reg8);
+
+   reg12 = mfrac << 7;
+   reg12 |= n & 0x7f;
+   dm_i2c_reg_write(clk->dev, 12, reg12);
+
+   reg18 = dm_i2c_reg_read(clk->dev, 18) & 0x03;
+   reg18 |= 0x20;
+   dm_i2c_reg_write(clk->dev, 18, reg18);
+
+   reg20 = dm_i2c_reg_read(clk->dev, 20) & 0x1f;
+   reg20 |= mint & (1 << 5);
+   

[U-Boot] [PATCH 19/51] common: board_f: Fix style violations

[Mario Six]

Fix some style violations in the board_f file.

Signed-off-by: Mario Six 
---

 common/board_f.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/common/board_f.c b/common/board_f.c
index ffa84e3566..b258a1a73c 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -50,7 +50,7 @@
 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
 #undef XTRN_DECLARE_GLOBAL_DATA_PTR
 #define XTRN_DECLARE_GLOBAL_DATA_PTR   /* empty = allocate here */
-DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
+DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR);
 #else
 DECLARE_GLOBAL_DATA_PTR;
 #endif
@@ -137,7 +137,7 @@ static int display_text_info(void)
 #endif
 
debug("U-Boot code: %08lX -> %08lX  BSS: -> %08lX\n",
-   text_base, bss_start, bss_end);
+ text_base, bss_start, bss_end);
 #endif
 
return 0;
@@ -311,7 +311,7 @@ static int reserve_logbuffer(void)
/* reserve kernel log buffer */
gd->relocaddr -= LOGBUFF_RESERVE;
debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
-   gd->relocaddr);
+ gd->relocaddr);
 #endif
 
return 0;
@@ -436,7 +436,7 @@ static int reserve_malloc(void)
 {
gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
debug("Reserving %dk for malloc() at: %08lx\n",
-   TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
+ TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
return 0;
 }
 
@@ -466,7 +466,7 @@ static int reserve_global_data(void)
gd->start_addr_sp -= sizeof(gd_t);
gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
debug("Reserving %zu Bytes for Global Data at: %08lx\n",
-   sizeof(gd_t), gd->start_addr_sp);
+ sizeof(gd_t), gd->start_addr_sp);
return 0;
 }
 
-- 
2.11.0

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[U-Boot] [PATCH 38/51] gdsys: drivers: Add gdsys_rxaui_ctrl driver

[Mario Six]

Add a driver for RXAUI control on IHS FPGAs.

Signed-off-by: Mario Six 
---

 drivers/misc/Kconfig|   6 +++
 drivers/misc/Makefile   |   1 +
 drivers/misc/gdsys_rxaui_ctrl.c | 107 
 include/dm/uclass-id.h  |   1 +
 include/gdsys_rxaui_ctrl.h  |  66 +
 5 files changed, 181 insertions(+)
 create mode 100644 drivers/misc/gdsys_rxaui_ctrl.c
 create mode 100644 include/gdsys_rxaui_ctrl.h

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index c0e4b921b4..dd768e2a7a 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -215,4 +215,10 @@ config IHS_VIDEO_OUT
help
  Support for IHS video out.
 
+config GDSYS_RXAUI_CTRL
+   bool "Enable gdsys RXAUI control driver"
+   depends on MISC
+   help
+ Support gdsys FPGA's RXAUI control.
+
 endmenu
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index eab539b739..3ff9e66da2 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -55,3 +55,4 @@ obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
 obj-$(CONFIG_IHS_FPGA) += ihs_fpga.o gdsys_soc.o
 obj-$(CONFIG_IHS_AXI) += ihs_axi.o
 obj-$(CONFIG_IHS_VIDEO_OUT) += ihs_video_out.o
+obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o
diff --git a/drivers/misc/gdsys_rxaui_ctrl.c b/drivers/misc/gdsys_rxaui_ctrl.c
new file mode 100644
index 00..37fe76b857
--- /dev/null
+++ b/drivers/misc/gdsys_rxaui_ctrl.c
@@ -0,0 +1,107 @@
+/*
+ * (C) Copyright 2015
+ * Dirk Eibach,  Guntermann & Drunck GmbH, eib...@gdsys.de
+ *
+ * (C) Copyright 2017
+ * Mario Six,  Guntermann & Drunck GmbH, mario@gdsys.cc
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum {
+   REG_RXAUI_GEN_CNT = 0x0,
+   REG_RXAUI_ERR_CNT = 0x2,
+   REG_RXAUI_SUCC_CNT = 0x4,
+   REG_RXAUI_STATUS = 0x6,
+   REG_RXAUI_CTRL_0 = 0x8,
+   REG_RXAUI_CTRL_1 = 0xA,
+};
+
+struct gdsys_rxaui_ctrl_priv {
+   int addr;
+};
+
+int rxaui_disable_polarity_inversion(struct udevice *dev)
+{
+   struct rxaui_ctrl_ops *ops = rxaui_ctrl_get_ops(dev);
+
+   return ops->disable_polarity_inversion(dev);
+}
+
+int rxaui_enable_polarity_inversion(struct udevice *dev)
+{
+   struct rxaui_ctrl_ops *ops = rxaui_ctrl_get_ops(dev);
+
+   return ops->enable_polarity_inversion(dev);
+}
+
+UCLASS_DRIVER(rxaui_ctrl) = {
+   .id = UCLASS_RXAUI_CTRL,
+   .name   = "rxaui_ctrl",
+   .flags  = DM_UC_FLAG_SEQ_ALIAS,
+};
+
+int gdsys_rxaui_disable_polarity_inversion(struct udevice *dev)
+{
+   struct gdsys_rxaui_ctrl_priv *priv = dev_get_priv(dev);
+   struct gdsys_soc_child_platdata *pplat = dev_get_parent_platdata(dev);
+   u16 val;
+
+   val = fpga_in_le16(pplat->fpga,
+  priv->addr + REG_RXAUI_CTRL_1);
+   fpga_out_le16(pplat->fpga, priv->addr + REG_RXAUI_CTRL_1,
+ val & ~0x7800);
+
+   return 0;
+}
+
+int gdsys_rxaui_enable_polarity_inversion(struct udevice *dev)
+{
+   struct gdsys_rxaui_ctrl_priv *priv = dev_get_priv(dev);
+   struct gdsys_soc_child_platdata *pplat = dev_get_parent_platdata(dev);
+   u16 val;
+
+   val = fpga_in_le16(pplat->fpga,
+  priv->addr + REG_RXAUI_CTRL_1);
+   fpga_out_le16(pplat->fpga, priv->addr + REG_RXAUI_CTRL_1,
+ val | 0x7800);
+
+   return 0;
+}
+
+static const struct rxaui_ctrl_ops gdsys_rxaui_ctrl_ops = {
+   .disable_polarity_inversion = gdsys_rxaui_disable_polarity_inversion,
+   .enable_polarity_inversion = gdsys_rxaui_enable_polarity_inversion,
+};
+
+int gdsys_rxaui_ctrl_probe(struct udevice *dev)
+{
+   struct gdsys_rxaui_ctrl_priv *priv = dev_get_priv(dev);
+
+   priv->addr = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
+   "reg", -1);
+
+   return 0;
+}
+
+static const struct udevice_id gdsys_rxaui_ctrl_ids[] = {
+   { .compatible = "gdsys,rxaui_ctrl" },
+   { }
+};
+
+U_BOOT_DRIVER(gdsys_rxaui_ctrl) = {
+   .name   = "gdsys_rxaui_ctrl",
+   .id = UCLASS_RXAUI_CTRL,
+   .ops= &gdsys_rxaui_ctrl_ops,
+   .of_match   = gdsys_rxaui_ctrl_ids,
+   .probe  = gdsys_rxaui_ctrl_probe,
+   .priv_auto_alloc_size = sizeof(struct gdsys_rxaui_ctrl_priv),
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index a40185d2bb..35e478cc74 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -73,6 +73,7 @@ enum uclass_id {
UCLASS_REMOTEPROC,  /* Remote Processor device */
UCLASS_RESET,   /* Reset controller device */
UCLASS_RTC, /* Real time clock device */
+   UCLASS_RXAUI_CTRL,  /* gdsys RXAUI control device */
UCLASS_SCSI,/* SCSI device */
UCLASS_SERIAL,

[U-Boot] [PATCH 31/51] gdsys: mpc8308: Add FPGA flavor option

[Mario Six]

More recent versions of IHS FPGAs feature a different memory layout.

Add a Kconfig option to differentiate between the legacy layout, and the
new layout (which is used on the upcoming "Gazerbeam" and later boards).

Signed-off-by: Mario Six 
---

 board/gdsys/mpc8308/Kconfig | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/board/gdsys/mpc8308/Kconfig b/board/gdsys/mpc8308/Kconfig
index e913e94b3a..80ac1a0f8a 100644
--- a/board/gdsys/mpc8308/Kconfig
+++ b/board/gdsys/mpc8308/Kconfig
@@ -55,6 +55,17 @@ config GDSYS_LEGACY_DRIVERS
 
 endif
 
+choice
+   prompt "FPGA flavor selection"
+
+config SYS_FPGA_FLAVOR_LEGACY
+   bool "Legacy flavor"
+
+config SYS_FPGA_FLAVOR_GAZERBEAM
+   bool "Gazerbeam flavor"
+
+endchoice
+
 config CMD_IOLOOP
bool "Enable 'ioloop' and 'ioreflect' commands"
help
-- 
2.11.0

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[U-Boot] [PATCH 18/51] cmd: mdio: Add 'driver' subcommand

[Mario Six]

For debug purposes it is sometimes useful to have the ability to
interact with the driver functionality of a phy from the command line
(e.g. to manually issue startup, configuration, or shutdown commands to
the phy device).

This patch adds such a command, which allows issuing the following
commands to a phy:
 * getting the driver's name
 * running the phy's configuration procedure (via calling phy_config)
 * running the phy's startup procedure (via calling phy_startup)
 * running the phy's shutdown procedure (via calling phy_shutdown)

Signed-off-by: Mario Six 
---

 cmd/Kconfig |  6 ++
 cmd/mdio.c  | 65 +
 2 files changed, 71 insertions(+)

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 322e466313..6425c425d6 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -835,6 +835,12 @@ config CMD_MII
help
  Enable MII utility commands.
 
+config CMD_MII_DRIVER
+   bool "mii driver"
+   depends on CMD_MII
+   help
+ Enable MII driver utility command.
+
 config CMD_PING
bool "ping"
help
diff --git a/cmd/mdio.c b/cmd/mdio.c
index 3f11963006..abd763ef1c 100644
--- a/cmd/mdio.c
+++ b/cmd/mdio.c
@@ -180,6 +180,37 @@ static int extract_phy_range(char *const argv[], int argc, 
struct mii_dev **bus,
return extract_range(argv[0], addrlo, addrhi);
 }
 
+#ifdef CONFIG_CMD_MII_DRIVER
+static struct phy_device *extract_phydev(char *const argv[], int argc)
+{
+   struct phy_device *phydev;
+   struct mii_dev *bus;
+   int addr;
+
+   if (argc == 1) {
+   phydev = mdio_phydev_for_ethname(argv[0]);
+
+   if (phydev)
+   return phydev;
+
+   bus = mdio_get_current_dev();
+   } else {
+   bus = miiphy_get_dev_by_name(argv[0]);
+   }
+
+   if (!bus)
+   return NULL;
+
+   addr = simple_strtol(argv[1], NULL, 0);
+   if (addr >= PHY_MAX_ADDR)
+   return NULL;
+
+   phydev = bus->phymap[addr];
+
+   return phydev;
+}
+#endif
+
 /*  */
 static int do_mdio(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 {
@@ -212,6 +243,36 @@ static int do_mdio(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
if (flag & CMD_FLAG_REPEAT)
op[0] = last_op[0];
 
+#ifdef CONFIG_CMD_MII_DRIVER
+   if (op[0] == 'd') {
+   if ((argc < 4) || (argc > 5) || (strlen(argv[2]) < 2))
+   return CMD_RET_USAGE;
+
+   phydev = extract_phydev(&argv[3], argc - 3);
+   if (!phydev)
+   return CMD_RET_USAGE;
+
+   switch (argv[2][1]) {
+   case 'e': /* g'e't */
+   printf("driver: ");
+   if (phydev->drv)
+   printf("%s", phydev->drv->name);
+   printf("\n");
+   break;
+   case 'o': /* c'o'nfig */
+   phy_config(phydev);
+   break;
+   case 't': /* s't'artup */
+   phy_startup(phydev);
+   break;
+   case 'h': /* s'h'utdown */
+   phy_shutdown(phydev);
+   break;
+   }
+   return 0;
+   }
+#endif
+
if (strlen(argv[1]) > 1) {
op[1] = argv[1][1];
if (op[1] == 'x') {
@@ -304,6 +365,10 @@ U_BOOT_CMD(
"read PHY's extended register at .\n"
"mdio wx  [.]  - "
"write PHY's extended register at .\n"
+#ifdef CONFIG_CMD_MII_DRIVER
+   "mdio driver   - "
+   " phy driver\n"
+#endif
" may be:\n"
" \n"
"   \n"
-- 
2.11.0

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[U-Boot] [PATCH 27/51] gdsys:phy: Adapt fixup_88e1518() to latest Release Notes

[Mario Six]

From: Dirk Eibach 

The initialization sequence described in the latest Release Notes
MV-S302033-00 for the Marvell 88E1518 phy omits two register writes.

Use this new sequence for the setup of this phy.

Signed-off-by: Dirk Eibach 
Signed-off-by: Mario Six 
---

 board/gdsys/common/phy.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/board/gdsys/common/phy.c b/board/gdsys/common/phy.c
index fb92658178..e45f923fed 100644
--- a/board/gdsys/common/phy.c
+++ b/board/gdsys/common/phy.c
@@ -46,8 +46,6 @@ struct mii_setupcmd fixup_88e1518[] = {
{ MIICMD_SET, 16, 0x214d },
{ MIICMD_SET, 17, 0xcc0c },
{ MIICMD_SET, 16, 0x2159 },
-   { MIICMD_SET, 22, 0x00fb },
-   { MIICMD_SET,  7, 0xc00d },
{ MIICMD_SET, 22, 0x },
 };
 
-- 
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[U-Boot] [PATCH 20/51] common: board_r: Fix style violations

[Mario Six]

Fix some style violations in the board_r file.

Signed-off-by: Mario Six 
---

 common/board_r.c | 27 ++-
 1 file changed, 14 insertions(+), 13 deletions(-)

diff --git a/common/board_r.c b/common/board_r.c
index ecca1edb04..199cadbed1 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -161,9 +161,9 @@ static int initr_reloc_global_data(void)
 #endif
 #ifdef CONFIG_OF_EMBED
/*
-   * The fdt_blob needs to be moved to new relocation address
-   * incase of FDT blob is embedded with in image
-   */
+* The fdt_blob needs to be moved to new relocation address
+* incase of FDT blob is embedded with in image
+*/
gd->fdt_blob += gd->reloc_off;
 #endif
 #ifdef CONFIG_EFI_LOADER
@@ -368,14 +368,16 @@ static int initr_flash(void)
print_size(flash_size, "");
 #ifdef CONFIG_SYS_FLASH_CHECKSUM
/*
-   * Compute and print flash CRC if flashchecksum is set to 'y'
-   *
-   * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
-   */
+* Compute and print flash CRC if flashchecksum is set to 'y'
+*
+* NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
+*/
if (getenv_yesno("flashchecksum") == 1) {
+   const uchar flash_base = CONFIG_SYS_FLASH_BASE;
+
printf("  CRC: %08X", crc32(0,
-   (const unsigned char *) CONFIG_SYS_FLASH_BASE,
-   flash_size));
+   flash_base,
+   flash_size));
}
 #endif /* CONFIG_SYS_FLASH_CHECKSUM */
putc('\n');
@@ -392,7 +394,6 @@ static int initr_flash(void)
update_flash_size(flash_size);
 #endif
 
-
 #if defined(CONFIG_OXC) || defined(CONFIG_RMU)
/* flash mapped at end of memory map */
bd->bi_flashoffset = CONFIG_SYS_TEXT_BASE + flash_size;
@@ -657,7 +658,7 @@ int initr_mem(void)
/* Also take the logbuffer into account (pram is in kB) */
pram += (LOGBUFF_LEN + LOGBUFF_OVERHEAD) / 1024;
 # endif
-   sprintf(memsz, "%ldk", (long int) ((gd->ram_size / 1024) - pram));
+   sprintf(memsz, "%ldk", (long int)((gd->ram_size / 1024) - pram));
setenv("mem", memsz);
 
return 0;
@@ -710,7 +711,7 @@ static init_fnc_t init_sequence_r[] = {
initr_caches,
/* Note: For Freescale LS2 SoCs, new MMU table is created in DDR.
 *   A temporary mapping of IFC high region is since removed,
-*   so environmental variables in NOR flash is not availble
+*   so environmental variables in NOR flash is not available
 *   until board_init() is called below to remap IFC to high
 *   region.
 */
@@ -775,7 +776,7 @@ static init_fnc_t init_sequence_r[] = {
 #if defined(CONFIG_PCI) && defined(CONFIG_SYS_EARLY_PCI_INIT)
/*
 * Do early PCI configuration _before_ the flash gets initialised,
-* because PCU ressources are crucial for flash access on some boards.
+* because PCU resources are crucial for flash access on some boards.
 */
initr_pci,
 #endif
-- 
2.11.0

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[U-Boot] [PATCH 26/51] strider, hrcon: Reset CAT phy on CON2 module

[Mario Six]

From: Dirk Eibach 

The phy on the CON2 module needs a defined reset pulse of at least 10 ms
to work reliably.

Signed-off-by: Dirk Eibach 
Signed-off-by: Mario Six 
---

 board/gdsys/mpc8308/hrcon.c   | 30 ++
 board/gdsys/mpc8308/strider.c | 24 
 2 files changed, 54 insertions(+)

diff --git a/board/gdsys/mpc8308/hrcon.c b/board/gdsys/mpc8308/hrcon.c
index bbe93a3488..d2acd1a677 100644
--- a/board/gdsys/mpc8308/hrcon.c
+++ b/board/gdsys/mpc8308/hrcon.c
@@ -58,6 +58,26 @@ struct {
u8 addr;
 } hrcon_fans[] = CONFIG_HRCON_FANS;
 
+#ifdef CONFIG_HRCON_DH
+struct {
+   u8 bus;
+   u8 addr;
+   u16 mask;
+} rgmii2_reset[] = { { 0, 0x23, 0x0100},
+{10, 0x23, 0x0100},
+{11, 0x23, 0x0100},
+{12, 0x23, 0x0100} };
+#else
+struct {
+   u8 bus;
+   u8 addr;
+   u16 mask;
+} rgmii2_reset[] = { {0, 0x23, 0x0100},
+{6, 0x23, 0x0100},
+{7, 0x23, 0x0100},
+{8, 0x23, 0x0100} };
+#endif
+
 int fpga_set_reg(u32 fpga, u16 *reg, off_t regoff, u16 data)
 {
int res;
@@ -160,6 +180,16 @@ int last_stage_init(void)
MCFPGA_RESET_N);
}
 
+   if (hw_type_cat && ch0_rgmii2_present) {
+   i2c_set_bus_num(rgmii2_reset[0].bus);
+   pca953x_set_val(rgmii2_reset[0].addr, rgmii2_reset[0].mask, 0);
+   pca953x_set_dir(rgmii2_reset[0].addr, rgmii2_reset[0].mask, 0);
+   mdelay(10);
+   pca953x_set_dir(rgmii2_reset[0].addr, rgmii2_reset[0].mask,
+   rgmii2_reset[0].mask);
+   i2c_set_bus_num(0);
+   }
+
if (hw_type_cat) {
uint mux_ch;
int retval;
diff --git a/board/gdsys/mpc8308/strider.c b/board/gdsys/mpc8308/strider.c
index ac785da8e6..e838913268 100644
--- a/board/gdsys/mpc8308/strider.c
+++ b/board/gdsys/mpc8308/strider.c
@@ -61,6 +61,17 @@ struct {
u8 addr;
 } strider_fans[] = CONFIG_STRIDER_FANS;
 
+#if defined(CONFIG_STRIDER_CON) || defined(CONFIG_STRIDER_CON_DP)
+struct {
+   u8 bus;
+   u8 addr;
+   u16 mask;
+} sgmii2_reset[] = { { 0, 0x23, 0x0100},
+{10, 0x23, 0x0100},
+{11, 0x23, 0x0100},
+{12, 0x23, 0x0100} };
+#endif
+
 int fpga_set_reg(u32 fpga, u16 *reg, off_t regoff, u16 data)
 {
int res;
@@ -178,6 +189,18 @@ int last_stage_init(void)
MCFPGA_RESET_N);
}
 
+#if defined(CONFIG_STRIDER_CON) || defined(CONFIG_STRIDER_CON_DP)
+   if (hw_type_cat && ch0_sgmii2_present) {
+   i2c_set_bus_num(sgmii2_reset[0].bus);
+   pca953x_set_val(sgmii2_reset[0].addr, sgmii2_reset[0].mask, 0);
+   pca953x_set_dir(sgmii2_reset[0].addr, sgmii2_reset[0].mask, 0);
+   mdelay(10);
+   pca953x_set_dir(sgmii2_reset[0].addr, sgmii2_reset[0].mask,
+   sgmii2_reset[0].mask);
+   i2c_set_bus_num(0);
+   }
+#endif
+
if (hw_type_cat) {
int retval;
struct mii_dev *mdiodev = mdio_alloc();
@@ -261,6 +284,7 @@ int last_stage_init(void)
ch7301_probe(k, false);
dp501_probe(k, false);
 #endif
+
if (hw_type_cat) {
int retval;
struct mii_dev *mdiodev = mdio_alloc();
-- 
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[U-Boot] [PATCH 32/51] drivers: Add ihs_fpga and gdsys_soc drivers

[Mario Six]

This patch adds DM drivers for IHS FPGAs and their associated busses, as
well as uclasses for both.

Signed-off-by: Mario Six 
---

 drivers/misc/Kconfig |   6 +
 drivers/misc/Makefile|   1 +
 drivers/misc/gdsys_soc.c |  51 +++
 drivers/misc/ihs_fpga.c  | 871 +++
 include/dm/uclass-id.h   |   2 +
 include/gdsys_soc.h  |  29 ++
 include/ihs_fpga.h   | 111 ++
 7 files changed, 1071 insertions(+)
 create mode 100644 drivers/misc/gdsys_soc.c
 create mode 100644 drivers/misc/ihs_fpga.c
 create mode 100644 include/gdsys_soc.h
 create mode 100644 include/ihs_fpga.h

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index d1ddbbe157..8b59a444ce 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -196,4 +196,10 @@ config I2C_EEPROM
depends on MISC
help
  Enable a generic driver for EEPROMs attached via I2C.
+
+config IHS_FPGA
+   bool "Enable IHS FPGA driver"
+   depends on MISC
+   help
+ Support for IHS FPGA.
 endmenu
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 10265c8fb4..d2e46fc7d6 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -52,3 +52,4 @@ obj-$(CONFIG_FSL_DEVICE_DISABLE) += fsl_devdis.o
 obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
 obj-$(CONFIG_QFW) += qfw.o
 obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
+obj-$(CONFIG_IHS_FPGA) += ihs_fpga.o gdsys_soc.o
diff --git a/drivers/misc/gdsys_soc.c b/drivers/misc/gdsys_soc.c
new file mode 100644
index 00..34b06d44bd
--- /dev/null
+++ b/drivers/misc/gdsys_soc.c
@@ -0,0 +1,51 @@
+/*
+ * (C) Copyright 2017
+ * Mario Six,  Guntermann & Drunck GmbH, mario@gdsys.cc
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int gdsys_soc_child_post_bind(struct udevice *dev)
+{
+   struct gdsys_soc_child_platdata *pplat = dev_get_parent_platdata(dev);
+   struct udevice *fpga;
+
+   if (uclass_get_device_by_phandle(UCLASS_IHS_FPGA, dev->parent, "fpga",
+&fpga)) {
+   printf("%s: Could not find 'fpga' phandle.\n",
+  dev->parent->name);
+   return 1;
+   }
+
+   pplat->fpga = fpga;
+
+   return 0;
+}
+
+UCLASS_DRIVER(gdsys_soc) = {
+   .id = UCLASS_GDSYS_SOC,
+   .name   = "gdsys_soc",
+   .post_probe = dm_scan_fdt_dev,
+   .child_post_bind = gdsys_soc_child_post_bind,
+   .per_child_platdata_auto_alloc_size =
+   sizeof(struct gdsys_soc_child_platdata),
+};
+
+static const struct udevice_id gdsys_soc_ids[] = {
+   { .compatible = "gdsys,soc" },
+   { /* sentinel */ }
+};
+
+U_BOOT_DRIVER(gdsys_soc_bus) = {
+   .name   = "gdsys_soc_bus",
+   .id = UCLASS_GDSYS_SOC,
+   .of_match   = gdsys_soc_ids,
+};
diff --git a/drivers/misc/ihs_fpga.c b/drivers/misc/ihs_fpga.c
new file mode 100644
index 00..a2b5d3f58c
--- /dev/null
+++ b/drivers/misc/ihs_fpga.c
@@ -0,0 +1,871 @@
+/*
+ * (C) Copyright 2017
+ * Mario Six,  Guntermann & Drunck GmbH, mario@gdsys.cc
+ *
+ * based on the ioep-fpga driver, which is
+ *
+ * (C) Copyright 2014
+ * Dirk Eibach,  Guntermann & Drunck GmbH, eib...@gdsys.de
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct reg_spec {
+   uint addr;
+   uint shift;
+   ulong mask;
+};
+
+struct ihs_fpga_priv {
+   u8 *regs;
+   fdt_addr_t addr;
+   struct gpio_desc reset_gpio;
+   struct gpio_desc done_gpio;
+   struct gpio_desc startupfin_gpios[2];
+   int regmap_node;
+   bool has_osd;
+};
+
+const u16 reflection_testpattern = 0xdede;
+
+enum pcb_video_type {
+   PCB_DVI_SL,
+   PCB_DP_165MPIX,
+   PCB_DP_300MPIX,
+   PCB_HDMI,
+   PCB_DP_1_2,
+   PCB_HDMI_2_0,
+};
+
+enum pcb_transmission_type {
+   PCB_CAT_1G,
+   PCB_FIBER_3G,
+   PCB_CAT_10G,
+   PCB_FIBER_10G,
+};
+
+enum carrier_speed {
+   CARRIER_SPEED_1G,
+   CARRIER_SPEED_3G,
+   CARRIER_SPEED_2_5G = CARRIER_SPEED_3G,
+   CARRIER_SPEED_10G,
+};
+
+enum ram_config {
+   RAM_DDR2_32BIT_295MBPS,
+   RAM_DDR3_32BIT_590MBPS,
+   RAM_DDR3_48BIT_590MBPS,
+   RAM_DDR3_64BIT_1800MBPS,
+   RAM_DDR3_48BIT_1800MBPS,
+};
+
+enum sysclock {
+   SYSCLK_147456,
+};
+
+struct fpga_versions {
+   bool video_channel;
+   bool con_side;
+   enum pcb_video_type pcb_video_type;
+   enum pcb_transmission_type pcb_transmission_type;
+   unsigned int hw_version;
+};
+
+struct fpga_features {
+   u8 video_channels;
+   u8 carriers;
+   enum carrier_speed carrier_speed;
+   enum ram_config ram_config;
+   enum sysclock sysclock;
+
+   bool pc

[U-Boot] [PATCH 09/51] phy: Support Marvell 88X2242

[Mario Six]

From: Dirk Eibach 

Implement support for the Marvell Alaska X 88X2242P Integrated Dual-port
and Quad-port Multi-speed Ethernet Transceivers.

Signed-off-by: Dirk Eibach 
Signed-off-by: Mario Six 
---

 drivers/net/phy/Kconfig   |  67 
 drivers/net/phy/Makefile  |   1 +
 drivers/net/phy/marvell.c |   1 -
 drivers/net/phy/mv88x2.c  | 846 ++
 drivers/net/phy/mv88x2.h  |  12 +
 drivers/net/phy/phy.c |   3 +
 include/phy.h |   1 +
 7 files changed, 930 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/phy/mv88x2.c
 create mode 100644 drivers/net/phy/mv88x2.h

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 0230852244..bb21be197f 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -55,6 +55,73 @@ config PHY_LXT
 config PHY_MARVELL
bool "Marvell Ethernet PHYs support"
 
+
+if PHY_MARVELL
+
+config BOARD_M88E1510_CONFIG
+   bool "M88E1510 board-specific callback"
+
+endif
+
+config PHY_MV88X2
+   depends on PHYLIB_10G
+   bool "Marvell 88X2 PHYs support"
+
+if PHY_MV88X2
+
+config BOARD_MV88X2_CONFIG
+   bool "MV88X2 board-specific callback"
+
+config MV88X2_DEBUG_REGS
+   bool "Debug register printing"
+
+config MV88X2_LINE_10GBASE_R
+   bool "Enable Line 10GBASE-R support"
+
+config MV88X2_HOST_10GBASE_X2
+   bool "Enable Host 10GBASE-X2 support"
+
+config MV88X2_X2_DISPARITY
+   bool "Enable 10GBASE-X2 disparity"
+
+config MV88X2_LED0_BLINK
+   int "LED0 blink behavior"
+   range 0 11
+   default 0
+
+config MV88X2_LED0_SOLID
+   int "LED0 solid behavior"
+   range 0 7
+   default 0
+
+config MV88X2_LED1_BLINK
+   int "LED1 blink behavior"
+   range 0 11
+   default 0
+
+config MV88X2_LED1_SOLID
+   int "LED1 solid behavior"
+   range 0 7
+   default 0
+
+config MV88X2_HOST_LANE_MUX_2_PORT
+   hex "Host side lane muxing (2 ports)"
+   default 0x0
+
+config MV88X2_HOST_LANE_MUX_4_PORT
+   hex "Host side lane muxing (4 ports)"
+   default 0x0
+
+config MV88X2_SFI_POL
+   hex "SFI polarity"
+   default 0x0
+
+config MV88X2_XFI_POL
+   hex "XFI polarity"
+   default 0x0
+
+endif
+
 config PHY_MICREL
bool "Micrel Ethernet PHYs support"
help
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 88c00a5cd3..631797a1f0 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -20,6 +20,7 @@ obj-$(CONFIG_PHY_ET1011C) += et1011c.o
 obj-$(CONFIG_PHY_LXT) += lxt.o
 obj-$(CONFIG_PHY_MARVELL) += marvell.o
 obj-$(CONFIG_PHY_MICREL) += micrel.o
+obj-$(CONFIG_PHY_MV88X2) += mv88x2.o
 obj-$(CONFIG_PHY_NATSEMI) += natsemi.o
 obj-$(CONFIG_PHY_REALTEK) += realtek.o
 obj-$(CONFIG_PHY_SMSC) += smsc.o
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index 8eddf70c68..66107a8af3 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -720,6 +720,5 @@ int phy_marvell_init(void)
phy_register(&M88E1510_driver);
phy_register(&M88E1518_driver);
phy_register(&M88E1680_driver);
-
return 0;
 }
diff --git a/drivers/net/phy/mv88x2.c b/drivers/net/phy/mv88x2.c
new file mode 100644
index 00..9d04197e47
--- /dev/null
+++ b/drivers/net/phy/mv88x2.c
@@ -0,0 +1,846 @@
+/*
+ * Driver for Marvell 88X2 PHYs
+ * Support for Revision A devices is not included.
+ *
+ * (C) Copyright 2016
+ * Dirk Eibach,  Guntermann & Drunck GmbH, eib...@gdsys.de
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "mv88x2.h"
+
+enum {
+   MGD_2140M_A1= 0x1b, /* 88X2140M_A1 */
+
+   MGD_22x2M   = 0x31, /* 88X22x2M */
+   MGD_2242_B0 = 0x311,/* 88X2242_B0 */
+   MGD_2242M_A0= 0x312,/* 88X2242M_A0 (MGD_22x2M + rev=2) */
+   MGD_2242M_B0= 0x313,/* 88X2242M_B0 (MGD_22x2M + rev=3) */
+   MGD__B0 = 0x315,/* 88X_B0 (MGD_22x2M + rev=5) */
+   MGD_M_B0= 0x317,/* 88XM_B0 (MGD_22x2M + rev=7) */
+
+   MGD_22x2P   = 0x19, /* 88X22x2P */
+   MGD_2242P_A0= 0x191,/* 88X2242P_A0 (MGD_22x2P + rev=1) */
+   MGD_P_A0= 0x199,/* 88XP_A0 (MGD_22x2P + rev=9) */
+};
+
+enum {
+   MGD_PCS_SPEED_40GBASE_R4= 0x70,
+   MGD_PCS_SPEED_10GBASE_R = 0x71,
+   MGD_PCS_SPEED_10GBASE_X2= 0x72,
+   MGD_PCS_SPEED_10GBASE_X4= 0x73,
+   MGD_PCS_SPEED_10GBASE_W = 0x74, /* line side only */
+   MGD_PCS_SPEED_20GBASE_R2= 0x75,
+   MGD_PCS_SPEED_20GBASE_X4= 0x76,
+   MGD_PCS_SPEED_2500BASE_X= 0X76,
+   MGD_PCS_SPEED_20GBASE_R8= 0x77, /* host side only */
+   MGD_PCS_SPEED_40GBASE_R8= 0x77, /* host side only */
+   MGD_PCS_SPEED_1000BASE_AN_OFF   = 0x7A,
+   MGD_PCS_SPEED_1000BASE_AN_ON= 0x7B,

[U-Boot] [PATCH 08/51] phy: Fix style violations

[Mario Six]

Fix some style violations in the generic PHY management code.

Signed-off-by: Mario Six 
---

 drivers/net/phy/phy.c | 83 +++
 1 file changed, 50 insertions(+), 33 deletions(-)

diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 08ec2f2ad6..a16bb6ca89 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -27,7 +27,7 @@ DECLARE_GLOBAL_DATA_PTR;
 /* Generic PHY support and helper functions */
 
 /**
- * genphy_config_advert - sanitize and advertise auto-negotation parameters
+ * genphy_config_advert - sanitize and advertise auto-negotiation parameters
  * @phydev: target phy_device struct
  *
  * Description: Writes MII_ADVERTISE with the appropriate values,
@@ -117,7 +117,6 @@ static int genphy_config_advert(struct phy_device *phydev)
return changed;
 }
 
-
 /**
  * genphy_setup_forced - configures/forces speed/duplex from @phydev
  * @phydev: target phy_device struct
@@ -130,14 +129,15 @@ static int genphy_setup_forced(struct phy_device *phydev)
int err;
int ctl = BMCR_ANRESTART;
 
-   phydev->pause = phydev->asym_pause = 0;
+   phydev->pause = 0;
+   phydev->asym_pause = 0;
 
-   if (SPEED_1000 == phydev->speed)
+   if (phydev->speed == SPEED_1000)
ctl |= BMCR_SPEED1000;
-   else if (SPEED_100 == phydev->speed)
+   else if (phydev->speed == SPEED_100)
ctl |= BMCR_SPEED100;
 
-   if (DUPLEX_FULL == phydev->duplex)
+   if (phydev->duplex == DUPLEX_FULL)
ctl |= BMCR_FULLDPLX;
 
err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
@@ -145,7 +145,6 @@ static int genphy_setup_forced(struct phy_device *phydev)
return err;
 }
 
-
 /**
  * genphy_restart_aneg - Enable and Restart Autonegotiation
  * @phydev: target phy_device struct
@@ -169,7 +168,6 @@ int genphy_restart_aneg(struct phy_device *phydev)
return ctl;
 }
 
-
 /**
  * genphy_config_aneg - restart auto-negotiation or write BMCR
  * @phydev: target phy_device struct
@@ -182,7 +180,7 @@ int genphy_config_aneg(struct phy_device *phydev)
 {
int result;
 
-   if (AUTONEG_ENABLE != phydev->autoneg)
+   if (phydev->autoneg != AUTONEG_ENABLE)
return genphy_setup_forced(phydev);
 
result = genphy_config_advert(phydev);
@@ -192,7 +190,8 @@ int genphy_config_aneg(struct phy_device *phydev)
 
if (result == 0) {
/* Advertisment hasn't changed, but maybe aneg was never on to
-* begin with?  Or maybe phy was isolated? */
+* begin with?  Or maybe phy was isolated?
+*/
int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
 
if (ctl < 0)
@@ -203,7 +202,8 @@ int genphy_config_aneg(struct phy_device *phydev)
}
 
/* Only restart aneg if we are advertising something different
-* than we were before.  */
+* than we were before.
+*/
if (result > 0)
result = genphy_restart_aneg(phydev);
 
@@ -240,7 +240,7 @@ int genphy_update_link(struct phy_device *phydev)
int i = 0;
 
printf("%s Waiting for PHY auto negotiation to complete",
-   phydev->dev->name);
+  phydev->dev->name);
while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
/*
 * Timeout reached ?
@@ -305,7 +305,8 @@ int genphy_parse_link(struct phy_device *phydev)
 */
gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
if (gblpa < 0) {
-   debug("Could not read MII_STAT1000. Ignoring 
gigabit capability\n");
+   debug("Could not read MII_STAT1000. ");
+   debug("Ignoring gigabit capability\n");
gblpa = 0;
}
gblpa &= phy_read(phydev,
@@ -338,8 +339,9 @@ int genphy_parse_link(struct phy_device *phydev)
if (lpa & LPA_100FULL)
phydev->duplex = DUPLEX_FULL;
 
-   } else if (lpa & LPA_10FULL)
+   } else if (lpa & LPA_10FULL) {
phydev->duplex = DUPLEX_FULL;
+   }
 
/*
 * Extended status may indicate that the PHY supports
@@ -571,7 +573,9 @@ static int phy_probe(struct phy_device *phydev)
 {
int err = 0;
 
-   phydev->advertising = phydev->supported = phydev->drv->features;
+   phydev->advertising = phydev->drv->features;
+   phydev->supported = phydev->drv->features;
+
phydev->mmds = phydev->drv->mmds;
 
if (phydev->drv->probe)
@@ -591,7 +595,7 @@ static struct phy_driver 
*generic_for_interface(phy_interface_t interface)
 }
 
 static struct phy_driver *get_phy_driver(struct phy_devi

[U-Boot] [PATCH 28/51] i2c: ihs_i2c: Prepare DM conversion

[Mario Six]

Prepare the function interface of the ihs_i2c driver for DM conversion
in a future patch.

While we're at it, fix some style violations, and make the code more readable.

Signed-off-by: Mario Six 
---

 drivers/i2c/ihs_i2c.c | 74 +++
 1 file changed, 45 insertions(+), 29 deletions(-)

diff --git a/drivers/i2c/ihs_i2c.c b/drivers/i2c/ihs_i2c.c
index 29612e69fe..e066ad53db 100644
--- a/drivers/i2c/ihs_i2c.c
+++ b/drivers/i2c/ihs_i2c.c
@@ -41,30 +41,38 @@ DECLARE_GLOBAL_DATA_PTR;
 #endif
 
 enum {
-   I2CINT_ERROR_EV = 1 << 13,
-   I2CINT_TRANSMIT_EV = 1 << 14,
-   I2CINT_RECEIVE_EV = 1 << 15,
+   I2CINT_ERROR_EV = BIT(13),
+   I2CINT_TRANSMIT_EV = BIT(14),
+   I2CINT_RECEIVE_EV = BIT(15),
 };
 
 enum {
+   I2CMB_READ = 0 << 10,
I2CMB_WRITE = 1 << 10,
+   I2CMB_1BYTE = 0 << 11,
I2CMB_2BYTE = 1 << 11,
+   I2CMB_DONT_HOLD_BUS = 0 << 13,
I2CMB_HOLD_BUS = 1 << 13,
I2CMB_NATIVE = 2 << 14,
 };
 
+enum {
+   I2COP_WRITE = 0,
+   I2COP_READ = 1,
+};
+
 static int wait_for_int(bool read)
 {
u16 val;
-   unsigned int ctr = 0;
+   uint ctr = 0;
 
I2C_GET_REG(interrupt_status, &val);
+   /* Wait until error or receive/transmit interrupt was raised */
while (!(val & (I2CINT_ERROR_EV
   | (read ? I2CINT_RECEIVE_EV : I2CINT_TRANSMIT_EV {
udelay(10);
-   if (ctr++ > 5000) {
+   if (ctr++ > 5000)
return 1;
-   }
I2C_GET_REG(interrupt_status, &val);
}
 
@@ -76,10 +84,12 @@ static int ihs_i2c_transfer(uchar chip, uchar *buffer, int 
len, bool read,
 {
u16 val;
 
+   /* Clear interrupt status */
I2C_SET_REG(interrupt_status, I2CINT_ERROR_EV
 | I2CINT_RECEIVE_EV | I2CINT_TRANSMIT_EV);
I2C_GET_REG(interrupt_status, &val);
 
+   /* If we want to write and have data, write the bytes to the mailbox */
if (!read && len) {
val = buffer[0];
 
@@ -98,6 +108,7 @@ static int ihs_i2c_transfer(uchar chip, uchar *buffer, int 
len, bool read,
if (wait_for_int(read))
return 1;
 
+   /* If we want to read, get the bytes from the mailbox */
if (read) {
I2C_GET_REG(read_mailbox_ext, &val);
buffer[0] = val & 0xff;
@@ -108,55 +119,44 @@ static int ihs_i2c_transfer(uchar chip, uchar *buffer, 
int len, bool read,
return 0;
 }
 
-static int ihs_i2c_address(uchar chip, uint addr, int alen, bool hold_bus)
+static int ihs_i2c_address(uchar chip, u8 *addr, int alen, bool hold_bus)
 {
-   int shift = (alen-1) * 8;
-
while (alen) {
int transfer = min(alen, 2);
-   uchar buf[2];
bool is_last = alen <= transfer;
 
-   buf[0] = addr >> shift;
-   if (alen > 1)
-   buf[1] = addr >> (shift - 8);
-
-   if (ihs_i2c_transfer(chip, buf, transfer, false,
+   if (ihs_i2c_transfer(chip, addr, transfer, I2COP_WRITE,
 hold_bus ? false : is_last))
return 1;
 
-   shift -= 16;
alen -= transfer;
}
 
return 0;
 }
 
-static int ihs_i2c_access(struct i2c_adapter *adap, uchar chip, uint addr,
- int alen, uchar *buffer, int len, bool read)
+static int ihs_i2c_access(struct i2c_adapter *adap, uchar chip, u8 *addr,
+ int alen, uchar *buffer, int len, int read)
 {
-   if (len <= 0)
-   return 1;
-
-   if (ihs_i2c_address(chip, addr, alen, len))
+   /* Don't hold the bus if length of data to send/receive is zero */
+   if (len <= 0 || ihs_i2c_address(chip, addr, alen, len))
return 1;
 
while (len) {
int transfer = min(len, 2);
+   bool is_last = len <= transfer;
 
if (ihs_i2c_transfer(chip, buffer, transfer, read,
-len <= transfer))
-   return 1;
+is_last))
+   return 2;
 
buffer += transfer;
-   addr += transfer;
len -= transfer;
}
 
return 0;
 }
 
-
 static void ihs_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
 {
 #ifdef CONFIG_SYS_I2C_INIT_BOARD
@@ -173,7 +173,7 @@ static int ihs_i2c_probe(struct i2c_adapter *adap, uchar 
chip)
 {
uchar buffer[2];
 
-   if (ihs_i2c_transfer(chip, buffer, 0, true, true))
+   if (ihs_i2c_transfer(chip, buffer, 0, I2COP_READ, true))
return 1;
 
return 0;
@@ -182,13 +182,29 @@ static int ihs_i2c_probe(struct i2c_adapter *adap, uchar 
chip)
 static int ihs_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
int ale

[U-Boot] [PATCH 23/51] gdsys: mpc8308: Use shadow register for output GPIO values

[Mario Six]

Since gpio output status on MPC8xxx cannot be read back, it has to be
buffered locally.

Signed-off-by: Dirk Eibach 
Signed-off-by: Mario Six 
---

 board/gdsys/mpc8308/hrcon.c   |  4 ++--
 board/gdsys/mpc8308/mpc8308.c | 19 +++
 board/gdsys/mpc8308/mpc8308.h |  3 +++
 board/gdsys/mpc8308/strider.c |  2 +-
 4 files changed, 25 insertions(+), 3 deletions(-)

diff --git a/board/gdsys/mpc8308/hrcon.c b/board/gdsys/mpc8308/hrcon.c
index e8898a793a..bbe93a3488 100644
--- a/board/gdsys/mpc8308/hrcon.c
+++ b/board/gdsys/mpc8308/hrcon.c
@@ -290,8 +290,8 @@ void mpc8308_setup_hw(void)
/*
 * set "startup-finished"-gpios
 */
-   setbits_be32(&immr->gpio[0].dir, (BIT(31 - 11) | BIT(31 - 12)));
-   setbits_be32(&immr->gpio[0].dat, BIT(31 - 12));
+   setbits_be32(&immr->gpio[0].dir, BIT(31 - 11) | BIT(31 - 12));
+   setbits_gpio0_out(BIT(31 - 12));
 }
 
 int mpc8308_get_fpga_done(uint fpga)
diff --git a/board/gdsys/mpc8308/mpc8308.c b/board/gdsys/mpc8308/mpc8308.c
index 0b1d4eab22..8d6a49f86a 100644
--- a/board/gdsys/mpc8308/mpc8308.c
+++ b/board/gdsys/mpc8308/mpc8308.c
@@ -25,6 +25,25 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+/* as gpio output status cannot be read back, we have to buffer it locally */
+u32 gpio0_out;
+
+void setbits_gpio0_out(u32 mask)
+{
+   immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
+
+   gpio0_out |= mask;
+   out_be32(&immr->gpio[0].dat, gpio0_out);
+}
+
+void clrbits_gpio0_out(u32 mask)
+{
+   immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
+
+   gpio0_out &= ~mask;
+   out_be32(&immr->gpio[0].dat, gpio0_out);
+}
+
 int get_fpga_state(uint dev)
 {
return gd->arch.fpga_state[dev];
diff --git a/board/gdsys/mpc8308/mpc8308.h b/board/gdsys/mpc8308/mpc8308.h
index dc07d564eb..1e4f24fb2a 100644
--- a/board/gdsys/mpc8308/mpc8308.h
+++ b/board/gdsys/mpc8308/mpc8308.h
@@ -1,6 +1,9 @@
 #ifndef __MPC8308_H_
 #define __MPC8308_H_
 
+void setbits_gpio0_out(u32 mask);
+void clrbits_gpio0_out(u32 mask);
+
 /* functions to be provided by board implementation */
 void mpc8308_init(void);
 void mpc8308_set_fpga_reset(unsigned state);
diff --git a/board/gdsys/mpc8308/strider.c b/board/gdsys/mpc8308/strider.c
index 5197d22f07..ac785da8e6 100644
--- a/board/gdsys/mpc8308/strider.c
+++ b/board/gdsys/mpc8308/strider.c
@@ -346,7 +346,7 @@ void mpc8308_setup_hw(void)
 * set "startup-finished"-gpios
 */
setbits_be32(&immr->gpio[0].dir, BIT(31 - 11) | BIT(31 - 12));
-   setbits_be32(&immr->gpio[0].dat, BIT(31 - 12));
+   setbits_gpio0_out(BIT(31 - 12));
 }
 
 int mpc8308_get_fpga_done(uint fpga)
-- 
2.11.0

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[U-Boot] [PATCH 10/51] net:phy:marvell Add hook for m88e1510 board config

[Mario Six]

From: Dirk Eibach 

m88e1510_config() is highly board-specific. So add an optional
callback board_m88e1510_config() configurable by
CONFIG_BOARD_M88E1510_CONFIG to support different hardware.

Signed-off-by: Dirk Eibach 
Signed-off-by: Mario Six 
---

 drivers/net/phy/marvell.c |  5 +
 include/marvell-phy.h | 10 ++
 2 files changed, 15 insertions(+)
 create mode 100644 include/marvell-phy.h

diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index 66107a8af3..b3d05d5af4 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #define PHY_AUTONEGOTIATE_TIMEOUT 5000
@@ -381,6 +382,9 @@ static int m88e1518_config(struct phy_device *phydev)
 /* Marvell 88E1510 */
 static int m88e1510_config(struct phy_device *phydev)
 {
+#ifdef CONFIG_BOARD_M88E1510_CONFIG
+   board_m88e1510_config(phydev);
+#else
/* Select page 3 */
phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1118_PHY_PAGE,
  MIIM_88E1118_PHY_LED_PAGE);
@@ -401,6 +405,7 @@ static int m88e1510_config(struct phy_device *phydev)
 
/* Reset page selection */
phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1118_PHY_PAGE, 0);
+#endif
 
return m88e1518_config(phydev);
 }
diff --git a/include/marvell-phy.h b/include/marvell-phy.h
new file mode 100644
index 00..1cfa5ed557
--- /dev/null
+++ b/include/marvell-phy.h
@@ -0,0 +1,10 @@
+#ifndef _MARVELL_PHY_H
+#define _MARVELL_PHY_H
+
+#include 
+
+void m88e1518_phy_writebits(struct phy_device *phydev,
+  u8 reg_num, u16 offset, u16 len, u16 data);
+int board_m88e1510_config(struct phy_device *phydev);
+
+#endif
-- 
2.11.0

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[U-Boot] [PATCH 14/51] cfi_flash: Always define cfi_flash_num_flash_banks

[Mario Six]

The variable cfi_flash_num_flash_banks is defined iff
CONFIG_SYS_MAX_FLASH_BANKS_DETECT is defined, but it is used
unconditionally in the function cfi_flash_init_dm. This leads to a
undefined variable compile error when CONFIG_SYS_MAX_FLASH_BANKS_DETECT
is not defined, but DM is enabled.

Fix this by always defining the cfi_flash_num_flash_banks variable.

Signed-off-by: Mario Six 
---

 drivers/mtd/cfi_flash.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 2445632580..4f9a88e2a3 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -91,6 +91,8 @@ static u16 cfi_flash_config_reg(int i)
 
 #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
 int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
+#else
+int cfi_flash_num_flash_banks;
 #endif
 
 #ifdef CONFIG_CFI_FLASH /* for driver model */
-- 
2.11.0

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[U-Boot] [PATCH 07/51] phy: Allow forcing clause 45 access

[Mario Six]

From: Dirk Eibach 

get_phy_device_by_mask() assumes that a clause 45 phy does not respond
to clause 22 requests. That is not true at least for Marvell 88X2242.
So allow forcing clause 45 access to prevent reading bogus device ids.

Signed-off-by: Dirk Eibach 
Signed-off-by: Mario Six 
---

 drivers/net/phy/phy.c | 12 +++-
 include/phy.h | 12 ++--
 2 files changed, 17 insertions(+), 7 deletions(-)

diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 97e0bc022b..08ec2f2ad6 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -707,7 +707,7 @@ static struct phy_device *search_for_existing_phy(struct 
mii_dev *bus,
 }
 
 static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
-   unsigned phy_mask, phy_interface_t interface)
+   unsigned phy_mask, phy_interface_t interface, bool force_c45)
 {
int i;
struct phy_device *phydev;
@@ -718,6 +718,8 @@ static struct phy_device *get_phy_device_by_mask(struct 
mii_dev *bus,
/* Try Standard (ie Clause 22) access */
/* Otherwise we have to try Clause 45 */
for (i = 0; i < 5; i++) {
+   if (!i && force_c45)
+   continue;
phydev = create_phy_by_mask(bus, phy_mask,
i ? i : MDIO_DEVAD_NONE, interface);
if (IS_ERR(phydev))
@@ -748,7 +750,7 @@ static struct phy_device *get_phy_device_by_mask(struct 
mii_dev *bus,
 static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
 phy_interface_t interface)
 {
-   return get_phy_device_by_mask(bus, 1 << addr, interface);
+   return get_phy_device_by_mask(bus, 1 << addr, interface, false);
 }
 
 int phy_reset(struct phy_device *phydev)
@@ -817,8 +819,8 @@ int miiphy_reset(const char *devname, unsigned char addr)
return phy_reset(phydev);
 }
 
-struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
-   phy_interface_t interface)
+struct phy_device *__phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
+   phy_interface_t interface, bool force_c45)
 {
/* Reset the bus */
if (bus->reset) {
@@ -828,7 +830,7 @@ struct phy_device *phy_find_by_mask(struct mii_dev *bus, 
unsigned phy_mask,
udelay(15000);
}
 
-   return get_phy_device_by_mask(bus, phy_mask, interface);
+   return get_phy_device_by_mask(bus, phy_mask, interface, force_c45);
 }
 
 #ifdef CONFIG_DM_ETH
diff --git a/include/phy.h b/include/phy.h
index 4f2094bdf0..75a9ae3314 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -227,8 +227,16 @@ static inline int is_10g_interface(phy_interface_t 
interface)
 
 int phy_init(void);
 int phy_reset(struct phy_device *phydev);
-struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
-   phy_interface_t interface);
+struct phy_device *__phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
+   phy_interface_t interface, bool force_c45);
+static inline struct phy_device *phy_find_by_mask(struct mii_dev *bus,
+   unsigned phy_mask, phy_interface_t interface) {
+   return __phy_find_by_mask(bus, phy_mask, interface, 0);
+}
+static inline struct phy_device *phy_find_by_mask_c45(struct mii_dev *bus,
+   unsigned phy_mask, phy_interface_t interface) {
+   return __phy_find_by_mask(bus, phy_mask, interface, 1);
+}
 #ifdef CONFIG_DM_ETH
 void phy_connect_dev(struct phy_device *phydev, struct udevice *dev);
 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
-- 
2.11.0

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[U-Boot] [PATCH 22/51] gdsys: mpc8308: Fix style violations

[Mario Six]

Fix some style violations in the gdsys MPC8308 board files, and make the
code more readable.

Signed-off-by: Mario Six 
---

 board/gdsys/mpc8308/hrcon.c   | 55 ++-
 board/gdsys/mpc8308/mpc8308.c | 12 +-
 board/gdsys/mpc8308/strider.c | 49 +++---
 3 files changed, 59 insertions(+), 57 deletions(-)

diff --git a/board/gdsys/mpc8308/hrcon.c b/board/gdsys/mpc8308/hrcon.c
index c6566e9196..e8898a793a 100644
--- a/board/gdsys/mpc8308/hrcon.c
+++ b/board/gdsys/mpc8308/hrcon.c
@@ -38,11 +38,11 @@ DECLARE_GLOBAL_DATA_PTR;
 #define MAX_MUX_CHANNELS 2
 
 enum {
-   MCFPGA_DONE = 1 << 0,
-   MCFPGA_INIT_N = 1 << 1,
-   MCFPGA_PROGRAM_N = 1 << 2,
-   MCFPGA_UPDATE_ENABLE_N = 1 << 3,
-   MCFPGA_RESET_N = 1 << 4,
+   MCFPGA_DONE = BIT(0),
+   MCFPGA_INIT_N = BIT(1),
+   MCFPGA_PROGRAM_N = BIT(2),
+   MCFPGA_UPDATE_ENABLE_N = BIT(3),
+   MCFPGA_RESET_N = BIT(4),
 };
 
 enum {
@@ -50,7 +50,7 @@ enum {
GPIO_MDIO = 1 << 15,
 };
 
-unsigned int mclink_fpgacount;
+uint mclink_fpgacount;
 struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR;
 
 struct {
@@ -110,7 +110,7 @@ int checkboard(void)
 
printf("HRCon %s", hw_type_cat ? "CAT" : "Fiber");
 
-   if (s != NULL) {
+   if (s) {
puts(", serial# ");
puts(s);
}
@@ -123,12 +123,11 @@ int checkboard(void)
 int last_stage_init(void)
 {
int slaves;
-   unsigned int k;
-   unsigned int mux_ch;
-   unsigned char mclink_controllers[] = { 0x3c, 0x3d, 0x3e };
+   uint k;
+   uchar mclink_controllers[] = { 0x3c, 0x3d, 0x3e };
u16 fpga_features;
bool hw_type_cat = pca9698_get_value(0x20, 20);
-   bool ch0_rgmii2_present = false;
+   bool ch0_rgmii2_present;
 
FPGA_GET_REG(0, fpga_features, &fpga_features);
 
@@ -140,16 +139,16 @@ int last_stage_init(void)
 
/* wait for FPGA done, then reset FPGA */
for (k = 0; k < ARRAY_SIZE(mclink_controllers); ++k) {
-   unsigned int ctr = 0;
+   uint ctr = 0;
 
if (i2c_probe(mclink_controllers[k]))
continue;
 
while (!(pca953x_get_val(mclink_controllers[k])
   & MCFPGA_DONE)) {
-   udelay(10);
+   mdelay(100);
if (ctr++ > 5) {
-   printf("no done for mclink_controller %d\n", k);
+   printf("no done for mclink_controller %u\n", k);
break;
}
}
@@ -162,8 +161,10 @@ int last_stage_init(void)
}
 
if (hw_type_cat) {
+   uint mux_ch;
int retval;
struct mii_dev *mdiodev = mdio_alloc();
+
if (!mdiodev)
return -ENOMEM;
strncpy(mdiodev->name, bb_miiphy_buses[0].name, MDIO_NAME_LEN);
@@ -182,7 +183,7 @@ int last_stage_init(void)
}
 
/* give slave-PLLs and Parade DP501 some time to be up and running */
-   udelay(50);
+   mdelay(500);
 
mclink_fpgacount = CONFIG_SYS_MCLINK_MAX;
slaves = mclink_probe();
@@ -210,6 +211,7 @@ int last_stage_init(void)
if (hw_type_cat) {
int retval;
struct mii_dev *mdiodev = mdio_alloc();
+
if (!mdiodev)
return -ENOMEM;
strncpy(mdiodev->name, bb_miiphy_buses[k].name,
@@ -236,17 +238,17 @@ int last_stage_init(void)
  * provide access to fpga gpios and controls (for I2C bitbang)
  * (these may look all too simple but make iocon.h much more readable)
  */
-void fpga_gpio_set(unsigned int bus, int pin)
+void fpga_gpio_set(uint bus, int pin)
 {
FPGA_SET_REG(bus >= 4 ? (bus - 4) : bus, gpio.set, pin);
 }
 
-void fpga_gpio_clear(unsigned int bus, int pin)
+void fpga_gpio_clear(uint bus, int pin)
 {
FPGA_SET_REG(bus >= 4 ? (bus - 4) : bus, gpio.clear, pin);
 }
 
-int fpga_gpio_get(unsigned int bus, int pin)
+int fpga_gpio_get(uint bus, int pin)
 {
u16 val;
 
@@ -255,7 +257,7 @@ int fpga_gpio_get(unsigned int bus, int pin)
return val & pin;
 }
 
-void fpga_control_set(unsigned int bus, int pin)
+void fpga_control_set(uint bus, int pin)
 {
u16 val;
 
@@ -263,7 +265,7 @@ void fpga_control_set(unsigned int bus, int pin)
FPGA_SET_REG(bus >= 4 ? (bus - 4) : bus, control, val | pin);
 }
 
-void fpga_control_clear(unsigned int bus, int pin)
+void fpga_control_clear(uint bus, int pin)
 {
u16 val;
 
@@ -276,7 +278,7 @@ void mpc8308_init(void)
pca9698_direction_output(0x20, 4, 1);
 }
 
-void mpc8308_set_fpga_reset(unsigned state)
+void mpc8308_set_fpga_reset(uint state)
 {
pca9698_set_value(0x20, 4, state ? 0 : 1);
 }
@@ -288,11 +290,11 @@ voi