On 6/5/2020 12:15 PM, Seymour J Metz wrote:
The S/370 PoOps mentions the vector facility and says "Vector operations are
described in the publication IBM System/370 Vector Operations, SA22-7125."
You can download it from
http://bitsavers.org/pdf/ibm/370/vectorFacility/SA22-7125-3_Vector_Operat
On 5/16/2020 12:30 PM, Dave Wade wrote:
CLOSEMAC CLOSE (),MF=L
I would code it this way:
CLOSEMAC CLOSE (*-*),MF=L
--
Phoenix Software International
Edward E. Jaffe
831 Parkview Drive North
El Segundo, CA 90245
https://www.phoenixsoftware.com/
On 5/1/2020 8:13 AM, Gary Weinhold wrote:
The programmer at our place who used this convention once said that he
learned much of his assembler programming style from JES2 source.
Does anyone know if JES2 used the *-* convention?
I just scanned SHASSRC on our system. It had 932 occurrences.
On 4/20/2020 9:40 AM, Paul Gilmartin wrote:
For such a case, I will always code:
DC CL8'&RQS. '
Does that truncate properly, but quietly if:
o &RQS is 8 bytes?
o &RQS is 9 bytes? (Should warn.)
Your "should warn" above is an incorrect assertion.
DC CL8'12345678901234567890' is perfectl
On 4/19/2020 11:24 PM, Windt, W.K.F. van der (Fred) wrote:
DCCL8'&RQS'
For such a case, I will always code:
DC CL8'&RQS. '
--
Phoenix Software International
Edward E. Jaffe
831 Parkview Drive North
El Segundo, CA 90245
https://www.phoenixsoftware.com/
--
On 1/30/2020 12:42 PM, Keith Moe wrote:
A big disadvantage of SPIE/ESPIE is that it cannot be used in supervisor state.
So you have to use ESTAE even if you know that you want to quickly recover with
no dump, LOGREC, etc., from PIC-4/10/11 (such as when chasing system control
blocks unlocked)
On 12/3/2019 11:07 AM, Paul Gilmartin wrote:
Are cross-CSECT relative branches supported? That feels like an
invitation to disaster: errors that can not be detected before
execution.
They have been supported since z/OS 1.7 or 1.8. Very handy to have!!!
--
Phoenix Software International
Edw
On 12/2/2019 12:02 PM, Tom Marchant wrote:
Locating your constants at the beginning of the program allows
you to do that without sacrificing a register.
Prezactly! That's what we do (using LOCTRs)...
--
Phoenix Software International
Edward E. Jaffe
831 Parkview Drive North
El Segundo, CA 9
On 12/2/2019 12:02 PM, Tom Marchant wrote:
Locating your constants at the beginning of the program allows
you to do that without sacrificing a register.
Prezactly! That's what we do (using LOCTRs)...
--
Phoenix Software International
Edward E. Jaffe
831 Parkview Drive North
El Segundo, CA 90
On 12/2/2019 7:58 AM, Kerry Liles wrote:
Or
LR 12,15
USING entrypointname,12
And, of course, R15 is not even loaded with the entry point address for
programs given control in AMODE(64) :-\
These days, one is expected to issue LARL/USING to your program
constants. There is gener
On 12/1/2019 5:59 AM, Don Higgins wrote:
All
Where do I find more info about new z15 instruction SORTL listed in Sept. APAR
but not in POP
I asked IBM about this pre-GA and was told that the doc was
*deliberately* left out of PoOp because there were not yet any
exploiters! WTF? How can any
On 6/5/2019 9:27 AM, John McKown wrote:
...I am now looking at the EXECUTABLE=NO
operand of the STORAGE OBTAIN. I already check the z/OS level "02.02.00" or
greater to dual path my assembly code. But I have also read that although
z/OS 2.3 will accept this operand, on anything less than a z14, i
On 4/3/2019 12:58 AM, Jonathan Scott wrote:
Ref: Your note of Tue, 2 Apr 2019 19:20:49 -0700
To check whether a machine operation code is supported in the
current OPTABLE, use the operation code attribute, O'opcode.
THANK YOU!
--
Phoenix Software International
Edward E. Jaffe
831 Parkview
I realize we have &SYSOPT_OPTABLE, but it's really hard to use because
it doesn't return monotonically-increasing values. It gives you
characters and 'UNI' < 'Z13' > 'ZS3'. I really want a built-in function
I can call to tell me if a mnemonic is legit:
LCLB &FLG
&FLG SETB OPTABL
that happening?
Peter
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On
Behalf Of Ed Jaffe
Sent: Friday, March 8, 2019 10:35 AM
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject: Re: Best practice using Conditional Assembly
On 3/7/2019 8:54 PM, Jon
On 3/7/2019 8:54 PM, Jon Perryman wrote:
Never use AREAD unless it's really needed and you are willing to code it
correctly. Circumventing the assembler is not helpful.
AREAD/AINSERT is arguably the most powerful single mechanism in all of
HLASM. We use it *everywhere* to build tables and we'
On 8/27/2018 4:45 AM, Charles Mills wrote:
Consider using the same list area for multiple services
Is that documented anywhere?
In other words, you are saying -- just to pick three macros that come to
mind -- I could issue an ATTACHX, an EXTRACT and a CLOSE and use the same
MF=L area for all (a
On 8/25/2018 6:06 AM, Peter Relson wrote:
You mention a "DSECT". I cannot think of any case where a list form
builds a DSECT. You might put a list form within a DSECT. But that is your
DSECT.
Indeed. Putting the list form in a DSECT is the preferred approach these
days since (almost?) every m
If you attended SHARE in St Louis, you were part of an
ahhhMAZING event!
If not, here is a taste of what you missed: https://youtu.be/kL3T_6NatqI
Catch up with us in Phoenix next March...
--
Phoenix Software International
Edward E. Jaffe
831 Parkview Drive North
El Segundo, CA 90245
ht
On 8/6/2018 8:23 AM, Keven wrote:
Ditto for
EX R0,*
except that you get a 0C3 program interrupt instead, which is usually a sign of
code scuttling itself and can be treated as such in recovery routines.
Yes, I used the 'EX R0,*' technique back in the 80s and early 90s before
We use 'Jxx *+2' which disturbs no registers and is guaranteed to fail
with an 0C1.
On 8/6/2018 3:10 AM, Jonathan Scott wrote:
J *+1 isn't even possible, as the hardware offset for relative
addressing is in halfwords.
For many years I have been using a conditional TRAP macro which
is equivalen
On 6/17/2018 7:47 AM, esst...@juno.com wrote:
.
Many Years ago I attended an MVS/XA structure and logic class.
.
In that class there were diagrams of the TCB Structure for Started Task, Batch
Jobs, and TSO logon address space.
I'm talking about the address space TCB structure (Region Control Tas
On 6/16/2018 5:53 PM, Farley, Peter x23353 wrote:
The PoP says for the Vector String instructions that "For all instructions that
optionally set the condition code, performance may be degraded if the condition code is
set."
Have you found that performance can be significantly (or at all) impro
On 6/16/2018 12:15 PM, Paul Gilmartin wrote:
I stand corrected. Thanks.
This architecture has grown beyond human ken. Let the compiler do it, and
hope the compiler author gets it right.
It's still understandable and VERY usable in hand-written code for real
HLASM programmers.
It just tak
On 6/14/2018 6:18 PM, Paul Gilmartin wrote:
Oops! From PoOps:
Proceeding from left to right, the elements of the second operand are
compared with the corresponding elements of the third operand and
optionally with zero.
"Corresponding element" is the problem.
If the second operan
On 6/14/2018 5:44 PM, Robin Vowels wrote:
- Original Message - From: "Ed Jaffe"
Sent: Friday, June 15, 2018 5:34 AM
BY FAR the fastest way HANDS DOWN -- if you're looking for 16 or
fewer characters -- is with the vector instructions...
How many words can you fit int
On 6/14/2018 3:05 PM, Ed Jaffe wrote:
LA R1,0(R15,1R1)
Of course, I intended to type LA R1,0(R15,R1)
--
Phoenix Software International
Edward E. Jaffe
831 Parkview Drive North
El Segundo, CA 90245
http://www.phoenixsoftware.com
On 6/14/2018 1:50 PM, Farley, Peter x23353 wrote:
Any way you could share a code example? Or at least pseudo code for the
technique?
Use VL to load 16 one-byte search arguments into (for example) V0
Use VLL to load 16 bytes (or how ever many remain if <16) of the string
into (for example) V1
BY FAR the fastest way HANDS DOWN -- if you're looking for 16 or fewer
characters -- is with the vector instructions...
On 6/14/2018 12:18 PM, Paul Gilmartin wrote:
Is there a modern, clever, efficient way to count words in a string where:
o A separator is or (+ others ad lib.)
o A word is a
On 5/28/2018 2:57 PM, Peter Relson wrote:
-- You might find that use of BAKR by the caller poses an unnecessary
dependency between the caller and the callee. Consider the alternative of
calling via BASR, and the callee deciding whether to save/restore regs via
BAKR/PR or via STMG(+STAM)/LMG(+LAM)
On 4/23/2018 12:41 AM, Jonathan Scott wrote:
[snip]
It would have been possible for HLASM to provide a simple fix for the
20-bit dependent USING case but we were holding it back because we felt
that compatibility considerations could limit our options for a more
general solution which was being d
On 4/22/2018 8:20 PM, Charles Mills wrote:
or I would not have posted!
Well, I've seen dumber questions.
Haha! So have I, but this is *ME* we're talking about! Just saying... LOL
--
Phoenix Software International
Edward E. Jaffe
831 Parkview Drive North
El Segundo, CA 90245
http://www.phoeni
On 4/22/2018 7:45 PM, Charles Mills wrote:
And if you make the filler X'4000' rather than X'8000', then it assembles
without error?
Haha! Indeed ... or I would not have posted!
This post is, of course, a simplified illustration of the problem. The
real world case that brought this to light d
208 DS XL7
.00 00 01 210 TinyArea DSECT ,
.00 211 TinyFlag DS XL1
. 213 END ,
Is there any way to make this work as documented?
Thanks,
Ed Jaffe
--
Phoenix So
Listen to me being interviewed on the Terminal Talk Podcast with Frank
DeGilio and Jeff Bisti! Amazingly, I didn't say anything that needed to
be bleeped out! LOL
http://terminaltalk.net/PodcastGenerator/?name=2018-03-25_episode_41_-_ed_jaffe_-_phoenix_software_-_3_26_2018.mp3
--
Phoenix Softwa
On 1/22/2018 7:44 AM, Jon Perryman wrote:
If anyone tells you C is superior to HLASM, don't believe it.
I agree with a lot of what you've written. We use SPMs for our coding
(with FLOWASM of course) and a LOT of powerful macros for calling
services, building tables, etc.
One thing I do like
On 12/23/2017 8:18 AM, Jon Perryman wrote:
People are clever and will find ways to abuse things if they are motivated.
Dynalloc can easily be exploited. It's not exploited because no one has been
motivated to exploit it.
Security risks are big news in this century and there have been some
*o
On 12/19/2017 1:16 PM, Charles Mills wrote:
Isn't there some issue with using SUSPEND or RESUME if the caller of the code
in question might hold locks and you have no control over that (such as in a
system exit)?
Haha! Yes, and that applies to WAIT and PAUSE as well. The secret is to
archite
On 12/18/2017 6:02 PM, Tony Harminc wrote:
I wouldn't want to have to argue the case for having an enabled
application program do spin loops. But we don't know the context this
code was found in; maybe it's part of an OS or a standalone program.
In my entire IT career, most of which has been s
On 12/18/2017 2:45 PM, esst...@juno.com wrote:
In the code fragment above why is the LT (Load and Test) instruction necessary ?
What was the author trying to accomplish after Compare and Swap ?
This is a spin lock, not a suspend lock.
--
Phoenix Software International
Edward E. Jaffe
831 Parkv
On 12/14/2017 12:03 PM, MELVYN MALTZ wrote:
Did you receive the original post ? If not...why ?
Irrelevant. Every spam filter is unique. Your experience with your
particular spam filter is unique to you on no one else...
--
Phoenix Software International
Edward E. Jaffe
831 Parkview Drive Nor
On 12/9/2017 3:38 PM, Phil Smith wrote:
Of course, so-called "high-level" languages like C should be so lucky as to have the
power of assembler macros! Their idea of a "macro" is really quite primitive.
Agreed! HLASM macros might very well be the most powerful pre-processor
language in existe
On 12/3/2017 8:44 PM, Sudershan Ravi wrote:
Hi,
Why do we use access registers?
Because it would damn-near impossible to reference data spaces and other
address spaces without them. LOL
--
Phoenix Software International
Edward E. Jaffe
831 Parkview Drive North
El Segundo, CA 90245
http://www
On 11/27/2017 11:52 AM, John McKown wrote:
Well, I don't do much basic I/O, so maybe I'm confused. But doesn't an
AMODE(31) program require more work than AMODE(24) or maybe I'm thinking
RMODE(31)? Or is that just for QSAM program (DCBE and so forth)?
Back in the day, you had to be in 24-bit
On 11/27/2017 11:22 AM, John McKown wrote:
BDAM is a "traditional" access method, like BSAM. So it cannot be _easily_
used by
AMODE(31),RMODE(31) programs.
Wht?! AMODE(31) callers were supported by the very, very first
release of DFSMS!
Gosh I can't remember how many decades ago that w
On 11/27/2017 10:48 AM, Sudershan Ravi wrote:
Why BDAM files are infrequently used? what are the complexities we face when we
do Direct Access of a file.
Before 3390s, disk geometry used to change every few years. That caused
a lot of folks to switch to VSAM.
--
Phoenix Software Internation
On 11/19/2017 9:45 AM, Charles Mills wrote:
Subtract?
Sort of. My impression -- and I would be happy if someone could definitively
confirm or correct me -- is that leap seconds are of course subtracted from
the TOD value, but the value in CVTLSO is negative, so adding CVTLSO
subtracts the leap s
On 10/18/2017 1:19 AM, Jonathan Scott wrote:
... We normally use code page 1047 for product code anyway,
where square brackets are hex AD and BD as in TEXT code pages and
the C/370 compiler. I think that the ASCII translation should
probably use 819 rather than 7-bit ASCII as the target code pag
On 10/12/2017 7:36 AM, Steve Smith wrote:
FWIW, we use local proprietary SPM set, so the syntax and expansions
aren't likely to be exactly like IBM's or yours.
We use IBM's. I heavily modified them and distributed those
modifications to interested parties back in the day.
Eventually, IBM acc
On 10/11/2017 2:18 PM, Steve Smith wrote:
The equivalent I have is DOWHILE,TROT,R14,R2,B'0001' -- the last
operand could be O, or it could be an UNTIL loop with NO (and any
other typical condition). But we allow bare condition-code masks,
too, especially for cases where the mnemonics aren't
On 10/11/2017 12:05 PM, Tony Harminc wrote:
The rightmost bits of the register that are not used to form the
address, which are bits 61-63 in the doubleword case and bits 52-63 in
the 4K-byte case, are
ignored but should contain zeros; otherwise, the program may not
operate compatibly in the fut
On 10/11/2017 12:05 PM, Tony Harminc wrote:
What do the DO and ENDDO macros do here? Do they generate a test for
CC=3 and loop? That seems like a lot of assumption to build into a DO
macro...
.4506 B982 36995 ¦ XGR R0,R0 Ensure no stop char
.
On 10/10/2017 1:52 PM, Ed Jaffe wrote:
Actually, that clarification is worth the cost of this exercise. So in
this particular case, so long as R0 isn't any of the obvious
two-character values C'00' - C'FF' it should work!
Thanks to input from Tony Harminc and othe
On 10/10/2017 12:20 PM, Steve Smith wrote:
D*** it, I used to know that! Great catch.
Rewind all that about CC=1. In *this* case, purely from a technical POV.
On Tue, Oct 10, 2017 at 3:14 PM, Tony Harminc wrote:
So it's the table *output* characters that are matched against the
character in
On 10/10/2017 10:47 AM, Tony Harminc wrote:
Ironically, for this example, assuming the table is the standard one
that converts each byte to its 2-byte hex character representation,
the mask bit will never make any difference to the processing at any
architectural level. You *do* have to ensure t
On 10/10/2017 6:54 AM, Steve Smith wrote:
IF the code to handle CC=1 is there, then you are right.
There was no such code, but that would be a case where "above board" use
of ACONTROL OPTABLE with surrounding PUSH/POP would be condoned. As we
raise our hardware minimums, we scan for ACONTROL
On 10/10/2017 7:45 AM, Paul Gilmartin wrote:
Slightly more feasible would be an option on LOCTR declaring that only
code or only data may oppear governed by that LOCTR, and that code LOCTRs must
not be overwritten.
I LIKE that!!!
Some non-z architectures have additional segment protection en
On 10/10/2017 2:49 AM, retired mainframer wrote:
Has your legal team considered the possibility of industrial sabotage? It
would be pretty hard to argue that this defective code was accidental.
It's funny. Someone joked about that just yesterday, wondering if this
person was collecting two s
On 10/9/2017 10:05 PM, Paul Gilmartin wrote:
Obviously, the right way to code this would have been to use ACONTROL OPTABLE
with surrounding PUSH/POP to get the newer TROT function. ...
Why would that be right? It's still inserting an instruction unsupported
at a hardware level you intend
Like most ISVs writing HLASM code, we use OPTABLE to ensure our
programmers don't accidentally use instructions that aren't available on
older machines that we must still support.
Currently, we're using OPTABLE(YOP) because our minimum supported OS is
z/OS 1.12. (It's not until z/OS 2.1 that w
On 9/15/2017 10:37 AM, Richard Kuebbing wrote:
Not just an adcon but a "real address"!
In real mode only. A virtual address otherwise...
--
Phoenix Software International
Edward E. Jaffe
831 Parkview Drive North
El Segundo, CA 90245
http://www.phoenixsoftware.com/
On 8/12/2017 3:35 PM, Charles Mills wrote:
Or phrasing the issue differently, I now have working queue management code
using CSG and CSST. It is hard for me to envision how TBEGIN would be so
advantageous that I would tear into this (tricky!) working code and re-write it
for a second logic pat
On 8/12/2017 2:20 PM, Charles Mills wrote:
Let me volunteer to be the dumb one here.
Note that use of transactional processing is inherently dual path.
You would still need the "other" path even if every machine in the world
already supported TBEGIN.
Why?
A non-constrained transaction needs
On 8/11/2017 6:31 AM, Blaicher, Christopher Y. wrote:
PLO is an expensive instruction. It can do a little or a lot. There are about
10 pages in the POP to describe it.
However, until transactional processing is supported in all environments,
ISV's, who never know what environment they are run
On 7/30/2017 9:57 PM, Charles Mills wrote:
Until the z13 (?), for example, NI, OI and XI
were interruptible within a reference to a single byte. NI is actually
fetch, AND, store. It could be interrupted between the fetch and the store.
So two processors doing NI or OI on the same byte could get "
On 7/30/2017 6:32 PM, Phil Smith wrote:
Robert Netzloff wrote:
Not sure, but is not MVCL interruptible?
Yes, that one is. Good catch! I've seen it happen, too. Makes sense: you MVCL
more than one page, and one of them is paged out, so it has to stop while the
page fault happens and it comes i
On 7/28/2017 2:29 PM, Ngan, Robert wrote:
There were severe restrictions on LOC=64 code before (mainly, must be
non-interruptible)
Those restrictions were lifted six years ago beginning with z/OS 1.13.
--
Edward E Jaffe
Phoenix Software International, Inc
831 Parkview Drive North
El Segundo,
On 7/27/2017 5:14 PM, Ngan, Robert wrote:
Just noticed that the z/OS 2.3 manuals mention EXECUTABLE=YES|NO parameter for
IARV64 GETSTOR requests.
Anyone have a summary of what kinds of code we can move above the bar in z/OS
2.3?
You can move code that invokes no services or invokes only servi
On 6/12/2017 7:14 PM, Paul Gilmartin wrote:
Doesn't the multiplicity of linkage conventions severely erode
the usefulness of tracebacks found in dumps? Or is there a
one-fits-all dump formatter that can recognize the various save
area formats found in a multi-language job step and make sense
On 6/12/2017 6:40 AM, Steve Smith wrote:
Regardless of the meaning of "standard", IBM does provide the IHASAVER
macro to assist with those choices.
I routinely make save areas 18D (or update from 18F) these days.
I make mine 36D to cover whatever format might be used now or in the
future...
On 1/17/2017 7:38 AM, somitcw wrote:
Does IBM plan to back-off the change from RXE to RXY and
go in a different direction or are they just sloppy about keeping
the first part of the manual insync with the rest?
According to Dan Greiner, the Principles of Operation is accurate and
IBM is neithe
On 1/13/2017 8:27 AM, Peter Hunkeler wrote:
I have an old macro I wrote in the late 80ies that generates code to invoke WTO
with variable text. Initially, the macro did not generate reentrant code. Then
I changed that quite a while ago, but did not care to separate the instructions
from the da
On 12/8/2016 10:35 AM, Ed Jaffe wrote:
He lives in Switzerland and works for L^z Labs -- the latest John
Moores kill-the-mainframe endeavor...
Haha! That superscripted 'z' didn't quite work in plain text. Anyway,
their web site URL is https://www.lzlabs.com/
--
Edward
He lives in Switzerland and works for L^z Labs -- the latest John Moores
kill-the-mainframe endeavor...
On 12/8/2016 1:36 AM, David Cole wrote:
I guess for most people, this is old new, but I've learned only
recently that Dave Bond is no longer involved at TachyonSoft. Does
anyone know how to
That page has been corrected so the "Click to Register" button now goes
to the right place...
On 11/16/2016 8:26 AM, Martin Truebner wrote:
To be percise the button for "register now" points to:
http://www.share.org/share-san-jose-2017-event-registration-start
which is wrong to some extent
M
The z/OS Bug Busterz SHARE Academy in Atlanta was a tremendous success,
but there was room for more attendees.
Many folks complained to me throughout the week that they didn't hear
about this amazing, Sunday deep-dive intensive until _after_ their
travel plans were already made and asked if it
On 10/18/2016 9:11 AM, Martin Truebner wrote:
I would expect SRST to be faster - but have no data to prove it.
SRST is much, much faster than TRT but still orders of magnitude slower
than the vector instructions.
--
Edward E Jaffe
Phoenix Software International, Inc
831 Parkview Drive North
On 8/29/2016 3:54 PM, esst...@juno.com wrote:
I thought LLGTR ensured a proper 64Bit Address
LLGT and LLGTR ensure a good 64-bit representation of a 31-bit address
by setting bits 0-33 to zeros.
--
Edward E Jaffe
Phoenix Software International, Inc
831 Parkview Drive North
El Segundo, CA 90
On 8/19/2016 11:47 AM, Ngan, Robert wrote:
Yes, I could use LAY instead of LARL
LAY requires base register coverage, so it's not really an acceptable
substitute for LARL.
, or I could use an aligned halfword length (which is what I've ended up doing
for now).
We pretty much always code D
On 8/16/2016 4:01 PM, Joseph Reichman wrote:
Can the IBM disassembler be invoked
By a another method then submitting a job
The disassembler I use most often these days is IPCS.
IP LIST address INSTR can disassemble any code found in a dump or active
memory.
--
Edward E Jaffe
Phoenix Softwar
On 6/28/2016 11:36 AM, Gord Tomlin wrote:
Another good reason to use a macro. The macro could include:
PUSH PRINT
PRINT NOGEN
bla bla bla
POP PRINT
Or even:
PUSH PRINT,NOPRINT
PRINT NOGEN,NOPRINT
bla bla bla
POP PRIN
On 5/17/2016 11:11 AM, Bernd Oppolzer wrote:
... there is only one base register
which covers the area after ENDPROC, allowing for up to 4 k of local
static variables
Assuming your programs use 20-bit displacements like ours do, then
you're really talking about 4K for areas that must be acces
On 4/18/2016 7:38 AM, Peter Relson wrote:
Loop
IEANTRT to retrieve the token
If RC indicates "token exists" then
Leave loop
Else if bad-RC then
error-exit
Obtain and fill in storage
Set up 16 byte token to locate that storage
IEANTCR to create the name/token
If RC i
On 4/4/2016 8:29 AM, Robin Vowels wrote:
As adding/subtracting something is going to set the CC,
the pipeline isn't going to be held up in any significant way.
That depends on what you mean by "significant."
The requirement to surface the CC to later instructions (usually
branches) creates a
On 4/4/2016 7:24 AM, Gary Weinhold wrote:
Even if there's no actual performance difference for these
instructions, wouldn't the "not setting the CC" possibly improve the
pipeline, since the hardware knows the next conditional branch does
not have to wait for this instruction to be evaluated for
On 4/2/2016 9:22 AM, Steve Smith wrote:
NILH, not NIHL!
LOL. I should have quit while I was ahead.
This one has been desk-checked. (I even corrected the misspelling of the
word "off"):
LOAD EPLOC==CL8'MSGTABLE' Load external message table
TMLL R0,X'0001'
On 4/2/2016 6:51 AM, Peter Relson wrote:
And of course none of the IBM-Main readers would ever rely on an
empirical test.
Haha! Of course not! ;-)
(But, ASSEMBLER-LIST readers might ijs... :-) )
The intent of the doc is to show that the 64-bit GR0 can be used as a
BASSM target in all cases.
On 4/1/2016 12:48 PM, Bob Rutledge wrote:
Ol' friend, your test is incomplete. That LMG doesn't go far enough.
Sorry. Pasted from the wrong test... :-[
TCB#6 RB#1 - z/XDC TPUT
INTERFACE
XDC ===>
_ _0E957100 0s (A.S.EDJX2)
On 3/31/2016 2:03 PM, Tom Marchant wrote:
ITYM R0.
Indeed!
And the manual doesn't specify that the address returned is a clean 64-bit
address except if it is AMODE 64. So I'd suggest replacing the NILH with
LLGTR R0,R0
Empirical testing shows R0 is returned with a clean 64-bit add
On 4/1/2016 7:50 AM, Gord Tomlin wrote:
If we're insisting on correctness (I wasn't, since Ed just blasted
code from his head into an email), LOAD has no EPNAME argument. Coded
as below, EPNAME should be EPLOC.
On 2016-04-01 03:14, mar...@pi-sysprog.de wrote:
The complete "corrected" version
On 3/31/2016 2:03 PM, Tom Marchant wrote:
On Wed, 30 Mar 2016 07:42:10 -0700, Ed Jaffe wrote:
LOAD EPNAME==CL8'MSGTABLE'Load external message table
NILH R1,X'7FFF' Turn off AMODE indicators
NILL R1,X'FFFE'
On 3/30/2016 7:05 AM, Scott Ford wrote:
I have a need to create message table, with the following attributes:
1. MSGID = 9 chars
2. Length of msg
3. Message
I would like this "tab;e" in loose terms to be external. I have never done
external dsects. Am in right i can do that , create a external
On 2/11/2016 2:18 PM, michelbutz wrote:
I am getting a rerun code 8 from ASMA90
And I don't have any assembler error messages or
MNOTES the source is a number of CSECTS
To consolidate error messages into one place, be sure to have a SYSTERM
DD statement and specify the TERM option.
--
Edward
On 1/11/2016 4:18 PM, John Walker wrote:
How does BPAM relate to BTAM? I was looking at this and finding a great
similarity to old-fashioned PC basic dynamic reads. Can this be used on any
modern mainframe?
IBM stopped shipping BTAM years ago but, if you've kept the libraries
around, it st
On 1/8/2016 4:21 PM, Thomas David Rivers wrote:
I'm quite willing to "live" with that, but the driving of the
EOD exit is the real "big" thing at the moment...
I think that might not get reset until the next FIND DE=.
--
Edward E Jaffe
Phoenix Software International, Inc
831 Parkview Drive
On 1/5/2016 8:49 AM, mar...@pi-sysprog.de wrote:
one can use the HLASM on z/OS (it's there anyway) and
then use your "binder/linker" to produce stuff that can then be
processed by LNKEDT in z/VSE
We run HLASM on z/OS (it's there anyway) and send the object decks via
NJE to a VSE system for li
On 1/5/2016 5:14 AM, Peter Relson wrote:
We have never, to my knowledge, encountered any downside to using GOFF. Is
there any?
Unfortunately, the linkage editor on z/VSE (and possibly also z/VM) does
not support GOFF. :(
The GOFF designers might consider it to be "generalized," but it is no
On 12/29/2015 5:59 AM, Peter Relson wrote:
FWIW,
Adding at the beginning of the module
*PROCESS SECTALGN(16)
That was it! :-)
makes this work. I always think of needing SECTALGN(16) when there's a
quadword-aligned item (the default for a DSECT is doubleword aligned). I
don't know if my thoug
Check this out...
Try to assemble the following test program. Attempts to use AIALENTH as
a duplication factor fail with 'ASMA080E Statement is unresolvable'
while BIALENTH works just fine. Why?
AIADSECT DSECT ,
AIAVRS DS0CL512
DS32LQ
AIALENTH EQU *-AIADSECT
BIADSECT DSE
On 6/17/2015 2:55 PM, David Cole wrote:
Excellent! Just stuff that into an ignorable dsect, and there you go!
I never thought of this method. Very creative.
We use the same basic technique in a robust set of macro-based math
functions to to ensure one EQU is greater or less than another, to
e
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