Adds LCD controller (LCDC) driver for TI's DA8xx/OMAP-L1xx architecture.
LCDC specifications can be found at http://www.ti.com/litv/pdf/sprufm0a.
LCDC on DA8xx consists of two independent controllers, the Raster Controller
and the LCD Interface Display Driver (LIDD) controller. LIDD further
Hi,
From the VPBE user's guide I understand that the Cursor window can display only
a rectangular cursor which is transparent within. I cannot display a Bitmap
cursor. Is this understanding of mine correct?
Can some one explain me what can be a practical use case for the rectangular
cursor
Hi,
Does anyone knows abouth the networked encode and decode demo?
That is the infomation about it:
http://wiki.davincidsp.com/index.php?title=Networked_encode_and_decode_demos#Changes_in_control_thread_.28_optional.29
:
Could some one give me some helps about that? or share your source code
about
my dm6446 has a spi interface, I use it as the spi master device. In my
board, there is also a chip --mcp2510, which has also a spi interface.
I use the mcp2510's spi as the slave device. In my project, I want to use the
spidev, which is available since linux 2.6.18 kernel, to talk to the
Hi ,
I am using custom board consisting of DM6467 Davinci processor. I am trying to
boot the processor from an on-board NOR flash, by burning ubl and u-boot to the
NOR flash.
AFter burning the NOR flash with u-boot, I get the following series of messages
sfh_Dm646x.exe -norflash -v
Check that network interface is running before changing its MAC address.
Otherwise, rxch is accessed when it's NULL - causing a kernel oops.
Moreover, check that the new MAC address is valid.
Signed-off-by: Pablo Bitton pablo.bit...@gmail.com
Signed-off-by: Chaithrika U S chaithr...@ti.com
Hi,
I want to read the motion vector in another buffer which i pass from
application.
Already i am allocating the memory using Memory_ContigAlloc()
XDAS_Int32 inBufSizeArray[1];
XDAS_Int8 OutPutBuffers[2];
OutPutBuffers[0] = outBuf;
OutPutBuffers[1] = MotionVecData;
On Sat, 2009-07-04 at 19:29 -0700, Troy Kisky wrote:
This patch will reduce the number of underruns by
shifting out 32 bit values instead of 16 bit. It also
adds mono support.
Doesn't ALSA already automatically handle mono-stero conversions? I
don't think we need to provide the same
hello there,
I am currently working on building my own algorithm by modifying viddec_copy in
your examples.
When building codec engine, I have added below lines in package.bld file.
Pkg.addLibrary(name, target, {
/* any other exeAttrs */
copts: -mem_model:data=far
}
);And
On Mon, 2009-07-06 at 12:54 +0100, Mark Brown wrote:
On Mon, Jul 06, 2009 at 06:09:16AM -0500, Steve Chen wrote:
On Sat, 2009-07-04 at 19:29 -0700, Troy Kisky wrote:
This patch will reduce the number of underruns by
shifting out 32 bit values instead of 16 bit. It also
adds mono
add basic cpufreq support for DA850/OMAP-L138
Currently, frequency scaling only on PLL0 is supported. No scaling of PLL1
or voltage levels as yet.
This patch also moves Async3 clock source to PLL1 so that frequency scaling
on PLL0 does not affect those peripherals. Without this the console on
Hi
Do someone have tested davinci_previewer from LSP 2.10 on DVEVM DM6446.
I have made one test with one frame and all was ok. But when use previewer
for stream from MT9P031 board.
It hung on IOCTL - PREV_PREVIEW. I have put some printk() in driver. All is
ok till:
Hello.
Sekhar Nori wrote:
add basic cpufreq support for DA850/OMAP-L138
Currently, frequency scaling only on PLL0 is supported. No scaling of PLL1
or voltage levels as yet.
This patch also moves Async3 clock source to PLL1 so that frequency scaling
on PLL0 does not affect those
Hello, I wrote:
add basic cpufreq support for DA850/OMAP-L138
Currently, frequency scaling only on PLL0 is supported. No scaling of
PLL1
or voltage levels as yet.
This patch also moves Async3 clock source to PLL1 so that frequency
scaling
on PLL0 does not affect those peripherals.
Jean-Philippe,
Most likely the OSD0 is hiding the video window.
Could you issue the following:-
fbset -fb /dev/fb/0 -xres 0
This basically disable osd0. I am not sure how you are disabling OSD0. If you
are already doing this, ignore this. The v4l2 display works with FBDev driving
the OSD
First for the IPIPE cannot process 2592 pixels per line. I believe it is
something like 1360 pixels.
I am curious why you can’t do 1280x720? Could you provide more details on what
you are doing? LSP release you are using, single shot/continuous, MMAP/Userptr
etc will be helpful to narrow down
Rajashekhara, Sudhakar sudhakar@ti.com writes:
On Wed, Jul 01, 2009 at 23:24:21, Kevin Hilman wrote:
Rajashekhara, Sudhakar sudhakar@ti.com writes:
This patch also fixes broken CONFIG_DEBUG_LL support on
DA830/OMAP-L137 EVM caused by my previous patch.
hmm...
diff --git
On Monday 06 July 2009, 邹卫军 wrote:
But when I want to register the mcp2510's spi driver,
I find that this driver can not find the proper spi device
to attach(The spi device registered in spi_bus is attached
to the spidev drivers).
One device, one driver. *EITHER* use spidev from
On Monday 06 July 2009, Sekhar Nori wrote:
The patch implements cpufreq driver, support to change PLL
output rate and recalculation of the rates of PLL derived clocks
It seems to me this is missing some sanity checks.
First, that the DRAM isn't being clocked through this PLL...
since changing
From: Sudhakar Rajashekhara sudhakar@ti.com
Introduce macros to build IDs from controller and channel number, and to
extract them. Modify the edma_alloc_slot function to take an extra argument
for the controller.
Signed-off-by: Sudhakar Rajashekhara sudhakar@ti.com
Reviewed-by: David
This series is the queue of DaVinci platform changes proposed for the
next merge window.
This series based at v2.6.31-rc2 and is available as the
'davinci-next' branch of DaVinci git w
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci.git
davinci-next
Upon review, I will
From: David Brownell dbrown...@users.sourceforge.net
Minor EDMA cleanup: remove unused SoC-specific #define; and when
requesting the channel controller region, use the device's name
(to be more useful on chips with multiple such controllers).
Signed-off-by: David Brownell
From: Sudhakar Rajashekhara sudhakar@ti.com
EDMA in DM355 and DM644x has two transfer controllers while DM646x has four
transfer controllers. Moving the queue to tc mapping and queue priority
mapping to dmsoc.c will be helpful to probe these mappings from platform
device so that the
From: Sudhakar Rajashekhara sudhakar@ti.com
Enables module clock for DM646x EDMA channel controller and transfer controller.
Channel mapping logic is introduced in dm646x EDMA. This implies that there is
no fixed association for a channel number to a parameter entry number. In other
words,
From: David Brownell davi...@pacbell.net
CC arch/arm/mach-davinci/sram.o
arch/arm/mach-davinci/sram.c: In function 'sram_init':
arch/arm/mach-davinci/sram.c:63: warning: comparison of distinct pointer types
lacks a cast
Signed-off-by: David Brownell dbrown...@users.sourceforge.net
From: Chaithrika U S chaithr...@ti.com
Adds McASP clock support for the two instances of mcasp (mcasp0,mcasp1). This
patch is part of the audio support for dm646x series.
Signed-off-by: Naresh Medisetty nar...@ti.com
Signed-off-by: Chaithrika U S chaithr...@ti.com
Signed-off-by: Kevin Hilman
From: David Griego dgri...@mvista.com
The davinci reset routine, davinci_watchdog_reset(), sets the
TCR register instead of the TGCR register as it should to put
the WDT into its Initial State.
It also writes the WDTCR register without the proper WDKEY
which is pointless since the register will
From: Rajashekhara, Sudhakar sudhakar@ti.com
JTAG ID for DM644x silicon revision 2.1 has changed. An entry for the new
silicon revision needs to be added to the davinci_id structure. Without
this addition, EVMs with new silicon revision fail to boot the kernel.
Signed-off-by: Sudhakar
From: Sandeep Paulraj s-paul...@ti.com
This patch does the following
1) Adds entries to davinci_all_defconfig for DM365
2) Adds entries to the Makefile for DM365
3) Adds entries for DM365 in the Kconfig
Signed-off-by: Sandeep Paulraj s-paul...@ti.com
Signed-off-by: Kevin Hilman
watchdog info is not needed in soc_info, platform_device can
be used directly in core code.
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-davinci/devices.c |7 ++-
arch/arm/mach-davinci/dm355.c |1 -
arch/arm/mach-davinci/dm644x.c
From: Sandeep Paulraj s-paul...@ti.com
Signed-off-by: Sandeep Paulraj s-paul...@ti.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-davinci/board-dm365-evm.c | 84 +++
1 files changed, 84 insertions(+), 0 deletions(-)
diff --git
From: Sandeep Paulraj s-paul...@ti.com
The patch adds Support for EMAC in the DM365 SOC and
the DM365 EVM board.
Signed-off-by: Sandeep Paulraj s-paul...@ti.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-davinci/board-dm365-evm.c | 66
From: Sandeep Paulraj s-paul...@ti.com
Signed-off-by: Sandeep Paulraj s-paul...@ti.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
arch/arm/mach-davinci/devices.c | 45 ++
1 files changed, 31 insertions(+), 14 deletions(-)
diff --git
From: Sandeep Paulraj s-paul...@ti.com
Patch adds support for MMC/SD in the DM365 EVM.
Pinmux for MMC/SD slot 1 on the DM365 EVM is also
configured.
Signed-off-by: Sandeep Paulraj s-paul...@ti.com
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
From: David Brownell dbrown...@users.sourceforge.net
Add basic support for the CPLD on the DM365 EVM board:
- Read SW5 to set up NAND and keypad vs (someday) OneNAND
- Export MMC/SD card detect and writeprotect signals
- LED support (same layout as on DM355 EVM)
- Static config for video
From: Mark A. Greer mgr...@mvista.com
Add support for the DA830/OMAP-L137 Evaluation Module (EVM)
from TI. The EVM has User Interface (UI) and Audio cards
that can be connected which contain various devices.
Support for those devices and ones on the EVM will be
added in subsequent patches.
From: David Brownell dbrown...@users.sourceforge.net
Support DM365 GPIOs ... primarily by handling non-banked GPIO IRQs:
- Flag DM365 chips as using non-banked GPIO interrupts, using a
new soc_info field.
- Replace the gpio_to_irq() mapping logic. This now uses some
runtime
Mark Brown broo...@opensource.wolfsonmicro.com writes:
Could you give a pointer to the SRAM allocator patch, please?
SRAM allocater changes are in mainline as of 2.6.31. See
arch/arm/mach-davinci/sram.c.
Kevin
___
Davinci-linux-open-source mailing
Mark Brown broo...@sirena.org.uk writes:
On Mon, Jul 06, 2009 at 02:14:41PM -0700, Kevin Hilman wrote:
From: Chaithrika U S chaithr...@ti.com
Adds McASP clock support for the two instances of mcasp (mcasp0,mcasp1). This
patch is part of the audio support for dm646x series.
Signed-off-by:
From: Sudhakar Rajashekhara sudhakar@ti.com
Signed-off-by: Sudhakar Rajashekhara sudhakar@ti.com
Reviewed-by: David Brownell dbrown...@users.sourceforge.net
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
sound/soc/davinci/davinci-evm.c |8
Mark Brown wrote:
On Sat, Jul 04, 2009 at 07:30:00PM -0700, Troy Kisky wrote:
If the codec is master, we support anything
that the codec supports.
Hrm, tricky - the rate configuration doesn't depend on what is master so
this could cause confusion if the codec is slave.
-#define
This series updates the DaVinci ASoC support after various DaVinci core
interface changes. These core changes are part of the DaVinci core
changes submitted for 2.6.32.
This compiles on top of the v2.6.31-rc2 based 'davinci-next' branch of
the DaVinci git repo here:
DaVinci core code has converted to the new clkdev API so
clock name strings are not needed. Instead, just the a
'struct device' pointer is needed.
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
Fix needed for 2.6.31
drivers/ide/palm_bk3710.c |2 +-
1 files changed, 1
Mark Brown wrote:
On Mon, Jul 06, 2009 at 03:01:54PM -0700, Troy Kisky wrote:
But even if the cpu is the clock/frame master, the sample rate generator has
an 8 bit
divider field, which seems to be always 0 in the current code. And I don't
see any reference
to params_rate in the
Mark Brown broo...@opensource.wolfsonmicro.com writes:
On Mon, Jul 06, 2009 at 03:19:01PM -0700, Kevin Hilman wrote:
So should I queue this up along with my changes, or do you want to
merge this into asoc?
It needs to go along with your changes at least to preserve bisect (it
should really
Russell King - ARM Linux li...@arm.linux.org.uk writes:
On Mon, Jul 06, 2009 at 02:14:44PM -0700, Kevin Hilman wrote:
@@ -34,6 +34,7 @@ config MACH_DAVINCI_EVM
config MACH_SFFSDR
bool Lyrtech SFFSDR
+default n
There's absolutely no need for this (or the other one below).
@@
From: David Brownell dbrown...@users.sourceforge.net
Make i2c-davinci cope properly with i2cdetect: don't spew
syslog spam on perfectly normal behaviors, or respond to any
address other than the one reserved for the SMBus host.
Signed-off-by: David Brownell dbrown...@users.sourceforge.net
Here are a couple fixes for the i2c driver on the TI DaVinci family
of SoCs. These have been tested for awhile in the DaVinci git
repo are needed for 2.6.31.
These apply on v2.6.31-rc2.
David Brownell (1):
i2c-davinci: behave with i2cdetect
Kevin Hilman (1):
i2c-davinci: convert clock
DaVinci core code has converted to the new clkdev API so
clock name strings are not needed. Instead, just the a
'struct device' pointer is needed.
Signed-off-by: Kevin Hilman khil...@deeprootsystems.com
---
drivers/i2c/busses/i2c-davinci.c |2 +-
1 files changed, 1 insertions(+), 1
Mark Brown broo...@opensource.wolfsonmicro.com writes:
On Mon, Jul 06, 2009 at 02:30:21PM -0700, Troy Kisky wrote:
ARM: DaVinci: Interface changes visible to EDMA clients
But the last patch in series needs rebased on to this. Unfortunately,
this patch is not yet in your for-2.6.32 branch.
Pierre,
Vipin Bhandari vipin.bhand...@ti.com writes:
This patch adds support for MMC/SD controller driver for all DaVinci family
SoC. This patch supports davinci family SoC's DM6446, DM355, DM365 and
DA830/OMAPL137.
The patch has been tested on DM355 EVM.
The MMCSD controller
FYI...
DaVinci git has been updatd to v2.6.31-rc2 and includes a sync/merge
with the various branches I've been pushing upstream.
Boot tested davinci_all_defconfig on dm6446 EVM, dm355 EVM and dm6467
EVM.
I also created a 'davinci-2.6.30' branch for those who wish to keep
working on a 2.6.30
Mark Brown wrote:
On Sat, Jul 04, 2009 at 07:30:01PM -0700, Troy Kisky wrote:
If you mean that it should start and
stop the clocks
Yes.
that causes issues in situations like TDM since there
can be transfers going on independantly of the CPU which may need the
clocks running. Not everything
We are working with Monta Vista Linux with TI-Davinci platform.
Previously we were using TI LSP release of 1.20 and now we have migrated to LSP
1.30.
After migration to 1.30 we are facing issue of NAND bad block erase.
From logs we can see almost all blocks are getting marked as bad blocks.
Then
On Tue, Jul 07, 2009 at 00:02:00, Kevin Hilman wrote:
Rajashekhara, Sudhakar sudhakar@ti.com writes:
On Wed, Jul 01, 2009 at 23:24:21, Kevin Hilman wrote:
Rajashekhara, Sudhakar sudhakar@ti.com writes:
This patch also fixes broken CONFIG_DEBUG_LL support on
DA830/OMAP-L137
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