Use appropriate print helpers for debug messages.
Signed-off-by: Gregory CLEMENT
---
drivers/tty/n_gsm.c | 14 ++
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/drivers/tty/n_gsm.c b/drivers/tty/n_gsm.c
index d77ed82a4840..67c8f8173023 100644
--- a/drivers/tty
Hello Greg,
> On Mon, May 18, 2020 at 09:33:57AM +0200, Gregory CLEMENT wrote:
>> Hello Jiri,
>>
>> > On 12. 05. 20, 13:53, Gregory CLEMENT wrote:
>> >> Use appropriate print helpers for debug messages.
>> >>
>> >> Signed-off-by
Hi Jiri,
> On 12. 05. 20, 13:53, Gregory CLEMENT wrote:
>> Warn the upper layer when n_gms is ready to receive data
>> again. Without this the associated virtual tty remains blocked
>> indefinitely.
>>
>> Fixes: e1eaea46bb40 ("tty: n_gsm line discipli
Hello Jiri,
> On 12. 05. 20, 13:53, Gregory CLEMENT wrote:
>> Use appropriate print helpers for debug messages.
>>
>> Signed-off-by: Gregory CLEMENT
>> ---
>> drivers/tty/n_gsm.c | 14 ++
>> 1 file changed, 2 insertions(+), 12 deletions(-)
&g
<1000>;
> + duplex = <1>;
> + };
> +};
> +
> + {
> + status = "okay";
> + pinctrl-0 = <_nand>;
> + pinctrl-names = "default";
> +
> + partition@0 {
> + label = "u-boot";
> + reg = <0x 0x000c>;
> + };
> +
> + partition@a {
> + label = "bootldr-env";
> + reg = <0x000c 0x0004>;
> + };
> +
> + partition@10 {
> + label = "kernel-1";
> + reg = <0x0010 0x0080>;
> + };
> +
> + partition@90 {
> + label = "rootfs-1";
> + reg = <0x0090 0x0710>;
> + };
> +
> + partition@7a0 {
> + label = "kernel-2";
> + reg = <0x07a0 0x0080>;
> + };
> +
> + partition@820 {
> + label = "rootfs-2";
> + reg = <0x0820 0x0710>;
> + };
> +
> + partition@f30 {
> + label = "default_sw";
> + reg = <0x0f30 0x0790>;
> + };
> +
> + partition@16c0 {
> + label = "logs";
> + reg = <0x16c0 0x0180>;
> + };
> +
> + partition@1840 {
> + label = "preset_cfg";
> + reg = <0x1840 0x0010>;
> + };
> +
> + partition@1850 {
> + label = "adsl";
> + reg = <0x1850 0x0010>;
> + };
> +
> + partition@1860 {
> + label = "storage";
> + reg = <0x1860 0x07a0>;
> + };
> +};
> +
> + {
> + status = "disabled";
> +};
> +
> + {
> + status = "okay";
> +};
> +
> + {
> + status = "okay";
> +};
> +
> +_phy0 {
> + status = "disabled";
> +};
> +
> +_phy1 {
> + status = "disabled";
> +};
> +
> + {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + port@1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <1>;
> + #trigger-source-cells = <0>;
> +
> + hub_port1: port@1 {
> + reg = <1>;
> + #trigger-source-cells = <0>;
> + };
> +
> + hub_port3: port@3 {
> + reg = <3>;
> + #trigger-source-cells = <0>;
> + };
> + };
> +};
> --
> 2.20.1
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
ied on mvebu/arm
Thanks,
Gregory
> ---
> applies cleanly on current master and on next-20200327
>
> MAINTAINERS | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 8b8abe756ae0..38fff0374082 100644
> --- a/MAINTAIN
changes all seem sensible, and have been
> tested by several folks.
>
> Thanks!
>
> Thomas
> --
> Thomas Petazzoni, CTO, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
status = "okay";
> + ethernet1-port@0 {
> + speed = <1000>;
> + duplex = <1>;
> + };
> +};
> +
> + {
> + status = "okay";
> + pinctrl-0 = <_nand>;
> + pinctrl-names = "default";
> +
> + partition@0 {
> + label = "u-boot";
> + reg = <0x000 0xc>;
> + };
> +
> + partition@a {
> + label = "bootldr-env";
> + reg = <0x000c 0x4>;
> + };
> +
> + partition@10 {
> + label = "kernel-1";
> + reg = <0x0010 0x80>;
> + };
> +
> + partition@90 {
> + label = "rootfs-1";
> + reg = <0x0820 0x710>;
> + };
> +
> + partition@7a0 {
> + label = "kernel-2";
> + reg = <0x07a0 0x80>;
> + };
> +
> + partition@820 {
> + label = "rootfs-2";
> + reg = <0x0820 0x710>;
> + };
> +
> + partition@f30 {
> + label = "default_sw";
> + reg = <0x0f30 0x790>;
> + };
> +
> + partition@16c0 {
> + label = "logs";
> + reg = <0x16c0 0x180>;
> + };
> +
> + partition@1840 {
> + label = "preset_cfg";
> + reg = <0x1840 0x10>;
> + };
> +
> + partition@1850 {
> + label = "adsl";
> + reg = <0x1850 0x10>;
> + };
> +
> + partition@1860 {
> + label = "storage";
> + reg = <0x1860 0x7A0>;
> + };
> +};
> +
> + {
> + status = "disabled";
> +};
> +
> + {
> + status = "okay";
> +};
> +
> + {
> + status = "okay";
> +};
> +
> +_phy0 {
> + status = "disabled";
> +};
> +
> +_phy1 {
> + status = "disabled";
> +};
> +
> + {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + port@1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <1>;
> + #trigger-source-cells = <0>;
> +
> + hub_port1: port@1 {
> + reg = <1>;
> + #trigger-source-cells = <0>;
> + };
> +
> + hub_port3: port@3 {
> + reg = <3>;
> + #trigger-source-cells = <0>;
> + };
> + };
> +};
> --
> 2.20.1
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
Warn the upper layer when n_gms is ready to receive data
again. Without this the associated virtual tty remains blocked
indefinitely.
Fixes: e1eaea46bb40 ("tty: n_gsm line discipline")
Signed-off-by: Gregory CLEMENT
---
drivers/tty/n_gsm.c | 26 ++
1 file c
than make it optional.
Fixes: e1eaea46bb40 ("tty: n_gsm line discipline")
Signed-off-by: Gregory CLEMENT
---
drivers/tty/n_gsm.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/tty/n_gsm.c b/drivers/tty/n_gsm.c
index 67c8f8173023..d8d196645500 1006
for the review.
Changelog:
v1 -> v2:
- don't replace the pr_info by pr_debug
- remove the superfluous printk("\n");
- use --follow option with git log to find the original commit to fix
- use tty_port_tty_wakeup
- use 'for' loop instead of 'while'
Gregory
Gregory CLEMENT (3):
Use appropriate print helpers for debug messages.
Signed-off-by: Gregory CLEMENT
---
drivers/tty/n_gsm.c | 14 ++
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/drivers/tty/n_gsm.c b/drivers/tty/n_gsm.c
index d77ed82a4840..67c8f8173023 100644
--- a/drivers/tty
Sorry I forgot to add back the title of the series which was:
"Remove the USB EP configuration from device tree"
Gregory
Gregory CLEMENT writes:
> Hello,
>
> A few month ago this series was sent and has not been merged while it
> didn't have anything against it. I've
he full ep configuration done in the device tree as it was
already the case for all the other USB device controller.
Acked-by: Cristian Birsan
Signed-off-by: Gregory CLEMENT
---
drivers/usb/gadget/udc/atmel_usba_udc.c | 112 +++-
drivers/usb/gadget/udc/atmel_usba_udc.h | 12 ++
There is no need to describe the end point in the deice tree. These
properties won't be use anymore, so mark them as deprecated to keep
the old device tree documented.
Reviewed-by: Rob Herring
Signed-off-by: Gregory CLEMENT
---
.../devicetree/bindings/usb/atmel-usb.txt | 56
which was too big to be
managed by the bootloader.
The first two patches should be merged through the USB subsystem while
the last one should be take by the a91 subsystem. Moreover this last
patch should be merged only once the change in the driver is merged.
Gregory
Gregory CLEMENT (3):
usb
emove also the #address-cells and #size-cells properties that
are no longer needed.
Signed-off-by: Gregory CLEMENT
---
arch/arm/boot/dts/at91sam9g45.dtsi | 54 -
arch/arm/boot/dts/at91sam9rl.dtsi | 54 -
arch/arm/boot/dts/at91sam9x5.dtsi | 54 -
arch/ar
Use appropriate print helpers for debug messages.
Signed-off-by: Gregory CLEMENT
---
drivers/tty/n_gsm.c | 18 +-
1 file changed, 5 insertions(+), 13 deletions(-)
diff --git a/drivers/tty/n_gsm.c b/drivers/tty/n_gsm.c
index d77ed82a4840..4965e39e0223 100644
--- a/drivers/tty
Warn the upper layer when n_gms is ready to receive data
again. Without this the associated virtual tty remain blocked
indefinitely.
Fixes: 96fd7ce58ffb ("TTY: create drivers/tty and move the tty core files
there")
Signed-off-by: Gregory CLEMENT
---
drivers/tty/n_
observed on the LE910 but should benefit
to all the modem. We observed that pretty quickly the transfer done
using the virtual tty were blocked. We found that it was due of a
wakeup to the real tty. Without this fix, the real tty wait for
indefinitely.
Gregory
Gregory CLEMENT (3):
tty: n_gsm
than make it optional.
Fixes: 96fd7ce58ffb ("TTY: create drivers/tty and move the tty core files
there")
Signed-off-by: Gregory CLEMENT
---
drivers/tty/n_gsm.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/drivers/tty/n_gsm.c b/drivers/tty/n_gsm.
Warn the upper layer when n_gms is ready to receive data
again. Without this the associated virtual tty remain blocked
indefinitely.
Fixes: 96fd7ce58ffb ("TTY: create drivers/tty and move the tty core files
there")
Signed-off-by: Gregory CLEMENT
---
drivers/tty/n_
e SPI framework
queue")
Signed-off-by: Mans Rullgard
Acked-by: Nicolas Ferre
Signed-off-by: Gregory CLEMENT
---
Hello,
This patch was first submitted 2 years[1] but was never applied while it
has received the acked-by from Nicolas, and I don't see any review
against it on the mailing list. S
not be setup automatically.
With this patch the setting is done only for the CS that will use a
GPIO as CS
Fixes: f3186dd87669 ("spi: Optionally use GPIO descriptors for CS GPIOs")
Cc:
Signed-off-by: Gregory CLEMENT
---
drivers/spi/spi.c | 18 +-
1 file changed, 9 insert
possible to mix native and GPIO
CS as expected by the SPI binding.
In the end even managment of the specific use case for CS0 on
AT91RM9200 has been simplified.
Gregory
Gregory CLEMENT (7):
spi: atmel: Remove and fix erroneous comments
spi: atmel: Fix CS high support
spi: atmel: Configure
CS.
This patch fixes the test to match the hardware capabilities.
Fixes: 4820303480a1 ("spi: atmel: add support for the internal chip-select of
the spi controller")
Cc:
Signed-off-by: Gregory CLEMENT
---
drivers/spi/spi-atmel.c | 6 ++
1 file changed, 2 insertions(+), 4 deletion
This driver is now only used through the device tree. Simplify code
by explicitly depend on device tree.
Signed-off-by: Gregory CLEMENT
---
drivers/spi/Kconfig | 1 +
drivers/spi/spi-atmel.c | 16 ++--
2 files changed, 3 insertions(+), 14 deletions(-)
diff --git a/drivers/spi
Instead of setting up the GPIO configuration for the whole controller,
do it at CS level. It will allow to mix internal CS and GPIO CS, which
is not possible with the current implementation.
Signed-off-by: Gregory CLEMENT
---
drivers/spi/spi-atmel.c | 32
1 file
limited to have only 4 CS managed, now it is possible to have
in the same time until 3 internal CS and no more limit for the CS
GPIO.
Signed-off-by: Gregory CLEMENT
---
drivers/spi/spi-atmel.c | 74 -
1 file changed, 66 insertions(+), 8 deletions(-)
diff --git
Thanks to the recent change in this driver, it is now possible to
prevent using the CS0 with GPIO during setup. It then allows to remove
the special handling of this case in the cs_activate() and
cs_deactivate() functions.
Signed-off-by: Gregory CLEMENT
---
drivers/spi/spi-atmel.c | 15
Since the conversion to GPIO descriptor, the GPIO used as chip select,
can be directly access from the spi_device struct. So there is no need
to keep the field npcs_pin.
Signed-off-by: Gregory CLEMENT
---
drivers/spi/spi-atmel.c | 17 ++---
1 file changed, 6 insertions(+), 11
Since CSAAT functionality support has been added. Some comments become
wrong. Fix them to match the current driver behavior.
Signed-off-by: Gregory CLEMENT
---
drivers/spi/spi-atmel.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/spi/spi-atmel.c b
;
>> Fixes: eb6c2eb6c7fb ("usb: host: xhci-plat: Prevent an abnormally
>>
>
> This is weird, in the patch I sent the tag ends there with ...")
Truncating the commit title was wrong and checkpatch complained about it
so I fixed on the fly, but unfortunately it was splitted i
s have been reversed,
>>
>> ESPRESSObin V7 with soldered eMMC.
>>
>> Since most of elements are the same, one common dtsi is created and
>> referenced in each dts of particular variant.
>>
>> Signed-off-by: Tomasz Maciej Nowak
>
>
> Applied on mvebu
+ compatible = "jedec,spi-nor";
> + spi-max-frequency = <10400>;
> + m25p,fast-read;
> + };
> +};
> +
> +/* Exported on the micro USB connector J5 through an FTDI */
> + {
> + pinctrl-names = "default";
> + pinctrl-0 = <_pins>;
>
| 2 +-
> 4 files changed, 12 insertions(+), 2 deletions(-)
>
> --
> 2.23.0
>
>
> ___
> linux-arm-kernel mailing list
> linux-arm-ker...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
compatible = "mmio-sram";
> reg = <0xe000 0x800>;
> clocks = <_clk 15>;
> --
> 2.17.1
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
compatible = "ricoh,rs5c372a";
> reg = <0x32>;
> };
>
> --
> 2.20.1
>
>
> ___
> linux-arm-kernel mailing list
> linux-arm-ker...@lists.infrad
ut after going further in the details of the driver, this patch could
cause a regression for on the old controllers.
I also found other issues in this driver in the chip select
management. So I will send a new series fixing all of it.
Gregory
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
AV32 support has been from the kernel a few release ago, but there was
still some specific macro for this architecture in this driver. Lets
remove it.
Signed-off-by: Gregory CLEMENT
---
drivers/spi/spi-atmel.c | 24
1 file changed, 24 deletions(-)
diff --git a/drivers
to this, there is no more limitation for the number of
gpio CS we can use.
Fixes: 754ce4f29937 ("[PATCH] SPI: atmel_spi driver")
Cc: sta...@vger.kernel.org
Signed-off-by: Gregory CLEMENT
---
drivers/spi/spi-atmel.c | 44 ++---
1 file changed, 33 insertions(+), 11
ars:
"BUG: sleeping function called from invalid context at
kernel/locking/mutex.c:909"
[1]: https://www.spinics.net/lists/alsa-devel/msg71286.html
Reviewed-by: Alexandre Belloni
Signed-off-by: Gregory CLEMENT
---
Changelog:
v1 -> v2:
- Removed the spinlock from the atmel_ssc
Hi Alex,
> On 18/09/2019 11:41:14+0200, Gregory CLEMENT wrote:
>> A potential bug was reported in the email "[BUG] atmel_ssc_dai: a
>> possible sleep-in-atomic bug in atmel_ssc_shutdown"[1]
>>
>> Indeed in the function atmel_ssc_shutdown() free_irq() was call
ars:
"BUG: sleeping function called from invalid context at
kernel/locking/mutex.c:909"
[1]: https://www.spinics.net/lists/alsa-devel/msg71286.html
Signed-off-by: Gregory CLEMENT
---
sound/soc/atmel/atmel_ssc_dai.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/sound/soc/atm
Wolfram Sang writes:
> On Tue, Aug 13, 2019 at 09:09:13AM +0300, Denis Efremov wrote:
>> Update MAINTAINERS record to reflect the file move
>> from i2c-mv64xxx.txt to marvell,mv64xxx-i2c.yaml.
>>
>> Cc: Maxime Ripard
>> Cc: Gregory CLEMENT
>>
- Add cpu clock node needed for CPU freq on Armada 7K/8K
- Enhance CP110 COMPHY support used by PCIe, USB3 and SATA
Gregory CLEMENT (1):
arm64: dts: marvell: Add cpu clock node on Armada 7K/8K
Marek Behún (1):
arm64
on the ts219 board
Uwe Kleine-König (1):
ARM: dts: kirkwood: ts219: disable the SoC's RTC
arch/arm/boot/dts/kirkwood-ts219.dtsi | 8
1 file changed, 8 insertions(+)
--
Gregory Clement, Bootlin
Embedded Linux and Kernel
> Add cpu clock node on AP
>
> Signed-off-by: Gregory CLEMENT
Applied on mvebu/dt64
Gregory
> ---
> arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi | 4
> arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 7 +++
> 2 files changed, 11 insertions(+)
>
&
Instead of refering the full pdev->dev.of_node use a local variable.
Signed-off-by: Gregory CLEMENT
---
drivers/regulator/twl6030-regulator.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/regulator/twl6030-regulator.c
b/drivers/regulator/twl6030-regulato
card doesn't reach a undefined reset stage.
Actually this behavior is available for all the LDO regulator, so the
driver will also allow to use it with any of these regulator.
Signed-off-by: Gregory CLEMENT
---
drivers/regulator/twl6030-regulator.c | 15 ++-
1 file changed, 14
allows this but needs to be aware of it and this configuration should
also be shared with the bootloader.
This is the purpose of this new property: ti,retain-on-reset
Signed-off-by: Gregory CLEMENT
---
.../devicetree/bindings/regulator/twl-regulator.txt| 7 +++
1 file changed, 7
lf, I made
a separate patch for it.
The last patch adds the feature in the driver.
Gregory
Gregory CLEMENT (3):
dt-bindings: regulator: twl6030: Add retain-on-reset property
regulator: twl6030: use variable for device node
regulator: twl6030: workaround the VMMC reset behavior
.../bindings
Hi Eric,
> Hi Gregory,
>
> On 7/11/19 4:31 PM, Gregory CLEMENT wrote:
>> The VFIO reset hook is called every time a platform device is passed
>> to a guest or removed from a guest.
>>
>> When the XHCI device is unbound from the host, the host driver
>> disa
Add IOMMU node for Marvell AP806 based SoCs.
Signed-off-by: Gregory CLEMENT
---
arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
implementation uses the VFIO reset hook to enable the
XHCI clocks/phys on behalf of the guest.
Ported from Marvell LSP code originally written by Yehuda Yitschak
Signed-off-by: Gregory CLEMENT
---
drivers/vfio/platform/reset/Kconfig | 8 +++
drivers/vfio/platform/reset/Makefile
Add cpu clock node on AP
Signed-off-by: Gregory CLEMENT
---
arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi | 4
arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 7 +++
2 files changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
b/arch
This commit makes sure the driver for the Armada 7K/8K CPU clock is
enabled.
Signed-off-by: Gregory CLEMENT
---
arch/arm64/Kconfig.platforms | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 42eca656faa8..3cf5769fd17d 100644
Actually, the clocks exposed for the cluster are not the CPU clocks, but
the PLL clock used as entry clock for the CPU clocks. The CPU clock will
be managed by a driver submitting in the following patches.
Signed-off-by: Gregory CLEMENT
---
drivers/clk/mvebu/ap806-system-controller.c | 4
Document the device tree binding for the cluster clock controllers found
in the Armada 7K/8K SoCs.
Signed-off-by: Gregory CLEMENT
---
.../arm/marvell/ap806-system-controller.txt | 31 +--
1 file changed, 29 insertions(+), 2 deletions(-)
diff --git
a/Documentation/devicetree
The CPU frequency is managed at the AP level for the Armada 7K/8K. The
CPU frequency is modified by cluster: the CPUs of the same cluster have
the same frequency.
This patch adds the clock driver that will be used by CPUFreq, it is
based on the work of Omri Itach .
Signed-off-by: Gregory CLEMENT
Clock drivers for Armada AP and Armada CP use the same function to
generate unique clock name. A third drivers is coming with the same
need, so it's time to move this function in a common file.
Signed-off-by: Gregory CLEMENT
---
drivers/clk/mvebu/Kconfig | 5
drivers/clk
- Remove headers from armada_ap_cp_helper.h
- Few other minor cleanup
Gregory CLEMENT (6):
dt-bindings: ap806: add the cluster clock node in the syscon file
clk: mvebu: add helper file for Armada AP and CP clocks
clk: mvebu: add CPU clock driver for Armada 7K/8K
clk: mvebu: ap8
gt;> reg"). This patch could be dropped if undesired.
>>
>> The second patch contains the fix for GPIOs 32+.
First you can add my
Acked-by: Gregory CLEMENT
Then as the second patch is a fix, you should add the fix tag: "Fixes:
5715092a458c ("pinctrl: armada-37xx: Add gp
Hello Rob,
> Document the device tree binding for the cluster clock controllers found
> in the Armada 7K/8K SoCs.
>
> Signed-off-by: Gregory CLEMENT
Did you have the opportunity to have a look on this binding ? I think
that I completely follow your requirement now.
Than
8)
> #define PCI_CONF_DEV(dev)(((dev) & 0x1f) << 11)
> #define PCI_CONF_BUS(bus)(((bus) & 0xff) << 16)
> -#define PCI_CONF_ADDR_EN (1 << 31)
> +#define PCI_CONF_ADDR_EN (1U << 31)
>
> /*
> * Internal configuration space
> --
> 2.11.0
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
This commit makes sure the driver for the Armada 7K/8K CPU clock is
enabled.
Signed-off-by: Gregory CLEMENT
---
arch/arm64/Kconfig.platforms | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 42eca656faa8..3cf5769fd17d 100644
Add cpu clock node on AP
Signed-off-by: Gregory CLEMENT
---
arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi | 4
arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 7 +++
2 files changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
b/arch
The CPU frequency is managed at the AP level for the Armada 7K/8K. The
CPU frequency is modified by cluster: the CPUs of the same cluster have
the same frequency.
This patch adds the clock driver that will be used by CPUFreq, it is
based on the work of Omri Itach .
Signed-off-by: Gregory CLEMENT
Actually, the clocks exposed for the cluster are not the CPU clocks, but
the PLL clock used as entry clock for the CPU clocks. The CPU clock will
be managed by a driver submitting in the following patches.
Signed-off-by: Gregory CLEMENT
---
drivers/clk/mvebu/ap806-system-controller.c | 4
Clock drivers for Armada AP and Armada CP use the same function to
generate unique clock name. A third drivers is coming with the same
need, so it's time to move this function in a common file.
Signed-off-by: Gregory CLEMENT
---
drivers/clk/mvebu/Kconfig | 5
drivers/clk
Document the device tree binding for the cluster clock controllers found
in the Armada 7K/8K SoCs.
Signed-off-by: Gregory CLEMENT
---
.../arm/marvell/ap806-system-controller.txt | 25 +++
1 file changed, 25 insertions(+)
diff --git
a/Documentation/devicetree/bindings/arm
Header cleanup
- Use unsigned int instead of it for cluster member of the ap_cpu_clk struct
- Use clk_hw instead of clk
- Use regmap_read_poll_timeout
- Use for_each_of_cpu_node
- Remove unnecessary WARN_ON()
- Remove headers from armada_ap_cp_helper.h
- Few other minor cleanup
Gregory CL
};
> +
> + partition@18 {
> + label = "ubootenv";
> + reg = <0x18 0x1>;
> + };
> + };
> + };
> +};
> +
> +/* Exported on the micro USB connector J5 through an FTDI */
> + {
> + pinctrl-names = "default";
> + pinctrl-0 = <_pins>;
> + status = "okay";
> +};
> +
> +/*
> + * Connector J17 and J18 expose a number of different features. Some pins are
> + * multiplexed. This is the case for instance for the following features:
> + * - UART1 (pin 24 = RX, pin 26 = TX). See armada-3720-db.dts for an example
> of
> + * how to enable it. Beware that the signals are 1.8V TTL.
> + * - I2C
> + * - SPI
> + * - MMC
> + */
> +
> +/* J7 */
> + {
> + status = "okay";
> +};
> +
> +/* J8 */
> + {
> + status = "okay";
> +};
> +
> + {
> + switch0: switch0@1 {
> + compatible = "marvell,mv88e6085";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <1>;
> +
> + dsa,member = <0 0>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + label = "cpu";
> + ethernet = <>;
> + phy-mode = "rgmii-id";
> + fixed-link {
> + speed = <1000>;
> + full-duplex;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + label = "wan";
> + phy-handle = <>;
> + };
> +
> + port@2 {
> + reg = <2>;
> + label = "lan0";
> + phy-handle = <>;
> + };
> +
> + port@3 {
> + reg = <3>;
> + label = "lan1";
> + phy-handle = <>;
> + };
> +
> + };
> +
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + switch0phy0: switch0phy0@11 {
> + reg = <0x11>;
> + };
> + switch0phy1: switch0phy1@12 {
> + reg = <0x12>;
> + };
> + switch0phy2: switch0phy2@13 {
> + reg = <0x13>;
> + };
> + };
> + };
> +};
> +
> + {
> + pinctrl-names = "default";
> + pinctrl-0 = <_pins>, <_pins>;
> + phy-mode = "rgmii-id";
> + status = "okay";
> +
> + fixed-link {
> + speed = <1000>;
> + full-duplex;
> + };
> +};
> --
> 2.21.0
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
- label = "uboot";
> - reg = <0 0x18>;
> - };
> -
> - partition@18 {
> - label = "ubootenv";
> - reg = <0x18 0x1>;
> - };
> - };
> };
> };
>
> --
> 2.21.0
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
n't create a for-next
branch for this new cycle.
I was waiting for 5.2-rc1 and then didn't take time to merge our current
branches in the for-next branch.
But now it should be available.
Gregory
>
> --
> Cheers,
> Stephen Rothwell
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
While there was a git repository used for the mvebu subsystem since many
years, it was not documented. let's add it.
Signed-off-by: Gregory CLEMENT
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 9cc6767e1b12..c50a975dd5ab 100644
> On 5/17/19 10:08 PM, Gregory CLEMENT wrote:
>> Hi Heinrich Schuchardt,
>>
>>> Running a graphics adapter on the MACCHIATObin fails due to an
>>> insufficently sized memory window.
>> I think "insufficient" is enough or I miss somethi
= <4>;
> num-viewport = <8>;
> reset-gpios = <_gpio2 20 GPIO_ACTIVE_LOW>;
> + ranges = <0x8100 0x0 0xf901 0x0 0xf901 0x0 0x1
> + 0x8200 0x0 0xc000 0x0 0xc000 0x0 0x2000>;
> status = "okay";
> };
>
> --
> 2.20.1
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
r the peripheral (e.g. UARTs, I2C, SPI).
>
> Signed-off-by: Alexandre Belloni
Tested-by: Gregory CLEMENT
Gregory
> ---
> arch/arm/boot/dts/lpc32xx.dtsi | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/
Add cpu clock node on AP
Signed-off-by: Gregory CLEMENT
---
arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi | 4
arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 7 +++
2 files changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
b/arch
Document the device tree binding for the cluster clock controllers found
in the Armada 7K/8K SoCs.
Signed-off-by: Gregory CLEMENT
---
.../arm/marvell/ap806-system-controller.txt | 26 +++
1 file changed, 26 insertions(+)
diff --git
a/Documentation/devicetree/bindings/arm
Clock drivers for Armada AP and Armada CP use the same function to
generate unique clock name. A third drivers is coming with the same
need, so it's time to move this function in a common file.
Signed-off-by: Gregory CLEMENT
---
drivers/clk/mvebu/Kconfig | 5
drivers/clk
The CPU frequency is managed at the AP level for the Armada 7K/8K. The
CPU frequency is modified by cluster: the CPUs of the same cluster have
the same frequency.
This patch adds the clock driver that will be used by CPUFreq, it is
based on the work of Omri Itach .
Signed-off-by: Gregory CLEMENT
This commit makes sure the driver for the Armada 7K/8K CPU clock is
enabled.
Signed-off-by: Gregory CLEMENT
---
arch/arm64/Kconfig.platforms | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 70498a033cf5..b68b89e7bcb4 100644
Actually, the clocks exposed for the cluster are not the CPU clocks, but
the PLL clock used as entry clock for the CPU clocks. The CPU clock will
be managed by a driver submitting in the following patches.
Signed-off-by: Gregory CLEMENT
---
drivers/clk/mvebu/ap806-system-controller.c | 4
inor cleanup
Gregory CLEMENT (6):
dt-bindings: ap806: add the cluster clock node in the syscon file
clk: mvebu: add helper file for Armada AP and CP clocks
clk: mvebu: add CPU clock driver for Armada 7K/8K
clk: mvebu: ap806: Fix clock name for the cluster
arm64: marvell: enable the Arma
Actually, the clocks exposed for the cluster are not the CPU clocks, but
the PLL clock used as entry clock for the CPU clocks. The CPU clock will
be managed by a driver submitting in the following patches.
Signed-off-by: Gregory CLEMENT
---
drivers/clk/mvebu/ap806-system-controller.c | 4
Clock drivers for Armada AP and Armada CP use the same function to
generate unique clock name. A third drivers is coming with the same
need, so it's time to move this function in a common file.
Signed-off-by: Gregory CLEMENT
---
drivers/clk/mvebu/Kconfig | 5
drivers/clk
The CPU frequency is managed at the AP level for the Armada 7K/8K. The
CPU frequency is modified by cluster: the CPUs of the same cluster have
the same frequency.
This patch adds the clock driver that will be used by CPUFreq, it is
based on the work of Omri Itach .
Signed-off-by: Gregory CLEMENT
Add cpu clock node on AP
Signed-off-by: Gregory CLEMENT
---
arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi | 4
arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 7 +++
2 files changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
b/arch
This commit makes sure the driver for the Armada 7K/8K CPU clock is
enabled.
Signed-off-by: Gregory CLEMENT
---
arch/arm64/Kconfig.platforms | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 70498a033cf5..b68b89e7bcb4 100644
Document the device tree binding for the cluster clock controllers found
in the Armada 7K/8K SoCs.
Signed-off-by: Gregory CLEMENT
---
.../arm/marvell/ap806-system-controller.txt | 26 +++
1 file changed, 26 insertions(+)
diff --git
a/Documentation/devicetree/bindings/arm
int instead of it for cluster member of the ap_cpu_clk struct
- Use clk_hw instead of clk
- Use regmap_read_poll_timeout
- Use for_each_of_cpu_node
- Remove unnecessary WARN_ON()
- Remove headers from armada_ap_cp_helper.h
- Few other minor cleanup
Gregory CLEMENT (6):
dt-bindings: ap806: add the cluste
Hi Chris,
> On 20/02/19 4:14 AM, Gregory CLEMENT wrote:
>> Hi Chris,
>>
>> On lun., févr. 18 2019, Chris Packham
>> wrote:
>>
>>> Kirkwood has always had the ability to retrieve the local-mac-address
>>> from the hard
issing of_node_put;
> acquired a node pointer with refcount incremented on line 88, but without a
> corresponding object release within this functio
>
> Signed-off-by: Wen Yang
> Cc: Jason Cooper
> Cc: Andrew Lunn
> Cc: Gregory Clement
> Cc: Sebastian Hesselbart
extended = < GIC_SPI 64
> IRQ_TYPE_LEVEL_HIGH>,
> + < GIC_SPI 9
> IRQ_TYPE_LEVEL_HIGH>;
> };
>
> cpurst: cpurst@20800 {
> --
> 2.21.0
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
15, 0, r0, cr0, cr0, 5 @ get the CPU ID
> + mrc p15, 0, r0, cr0, cr0, 5 @ get the CPU ID
> and r0, r0, #15
> add r1, r1, r0
> mov r0, #0x0
> --
> 2.21.0
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
tatic void __init i2c_quirk(void)
>
> of_update_property(np, new_compat);
> }
> - return;
> }
>
> static void __init mvebu_dt_init(void)
> --
> 2.1.4
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
thx!
> hofrat
>
> _______
> linux-arm-kernel mailing list
> linux-arm-ker...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
are
using test1_clk (for example to strobe an HW watchdog). Overwriting
TEST_CLK_SEL prevents booting those platforms.
Signed-off-by: Alexandre Belloni
Tested-by: Gregory CLEMENT
---
arch/arm/mach-lpc32xx/phy3250.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/arch/arm/mach-lpc32xx
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