> > I haven't done the exact math, but when you look at the Z380 opcode
>tables,
> > it seems the instruction set has nearly doubled. And if you take into
> > account the enhanced Z80-instructions (16 bit indexing 'n stuff) it's easy
> > to get to that number.
>
>Saying "200% more" means tot tota
> >If you take away all new registers and the new address space of the Z380,
> >you would still benefit greatly from the enhanced instructions. They are
> >NOT depending on those features!
>
> I think you are a lazy programmer. (-;
I take that as an insult, even with the smiley! :/
I hate laz
> > >And as I stated above, most new instructions could also have been added
to
> > >the Z180... They have nothing to do with the extended address range
etc.
> >
> > Yes, you are right. Some. But they are absolutely NOT 200% more than
> >Z80 instruction set!
>
> I haven't done the exact math, bu
On Tue, 25 Apr 2000 01:05:26 +0200, Patriek Lesparre wrote:
>If you think like this, you wouldn't need ANY new instructions! Ofcourse
>you can do whatever new instruction the Z380 has in several legacy Z80
>instructions, but I'd like to see how slow your implementation of "LD
>DE,(SP-12)" would
On Tue, 25 Apr 2000 00:30:50 +0200, Patriek Lesparre wrote:
>If you take away all new registers and the new address space of the Z380,
>you would still benefit greatly from the enhanced instructions. They are
>NOT depending on those features!
I think you are a lazy programmer. (-;
>Have you a
> I do not think they are "so" important, since they never were missed by
>me... (-; This type of thing will take away the "register selection"
>task... (-;
If you think like this, you wouldn't need ANY new instructions! Ofcourse
you can do whatever new instruction the Z380 has in several leg
Daniel Jorge Caetano wrote:
> "new" Relative calls are about the 32 bit addresses. It doesn't make sense
>on a 8 bit processor (such as Z180).
ofcourse they make sense on an 8 bit processor! They allow fully
relocatable programs. They are NOT about 32 bit addresses, but can be used
in 8, 16 o
>The Z380 is at the moment the only candidate for a new MSX. Creating an own
>processor is too much work, if we do that it will take another three years
>only to create the processor (or something like that). And that's stupid if
>there already is a fit candidate.
Create a "new" MSX standard i
> >Most new functions are 16-bit extensions (16-bit add). Those could also
have
> >been added to the Z180. Not only DIV, but also RLCW HL - ANDW HL,BC -
NEGW
> >HL - SUB SP,nn and things like PUSH nn - EX BC,DE etcetera.
> >So you are still quite wrong here, although I now understand what you
mean
> ] IN F,(C) is not available in either of the processors.
> This instruction actually exists on the Z80 and therefore also on the
Z380.
> Quote from the Z80 instruction table:
>
> Mnemonic: IN r,(C)
> Sym Operation: r <- (C)
> Opcode: 11 101 101
>01 r000
> r stands for regis
On Mon, 24 Apr 2000 11:11:46 +0200, Laurens Holst wrote:
>Most of the instructions you are talking about remained the same as they
>used to be. They are only extended in another operation mode. There are very
>few new specific instructions to cope with the extended address range.
>Most new functi
] IN F,(C) is not available in either of the processors.
This instruction actually exists on the Z80 and therefore also on the Z380.
Quote from the Z80 instruction table:
Mnemonic: IN r,(C)
Sym Operation: r <- (C)
Opcode: 11 101 101
01 r000
r stands for register:
000: B
> >UNTRUE!!!
> >Those are the same as the Z80 versions, but work different in another
mode
> >(or havea so-called Data Directive (DDIR) opcode).
>
> What I've tried to say (but I think I had failed) that is:
> most instructions NEW on Z380 will doesn't make any sense on Z180.
> This is why they
> >> I don't know. But I think it's possible to "add" this instructions.
(-;
> >> In the same way as ADVRAM works, but doing a "bridge" over Z180.
> >Hmmm... How will the registers be read then???
>
> I think that, if it's possible, it'll be a DIRTY service... (-;
Yes. And I really have no id
On Sun, 23 Apr 2000 16:49:29 +0200, Patriek Lesparre wrote:
>me neither... Although it's probably infinitely easier to program than
>using I/O, I don't see how it can provide the huge speed-up that's being
>suggested. Besides greater speed for 3D and video, that are totally
>unimportant to most
On Sun, 23 Apr 2000 12:57:15 +0200, Laurens Holst wrote:
>UNTRUE!!!
>Those are the same as the Z80 versions, but work different in another mode
>(or havea so-called Data Directive (DDIR) opcode).
What I've tried to say (but I think I had failed) that is:
most instructions NEW on Z380 will does
On Sun, 23 Apr 2000 12:51:40 +0200, Laurens Holst wrote:
>> I don't know. But I think it's possible to "add" this instructions. (-;
>> In the same way as ADVRAM works, but doing a "bridge" over Z180.
>Hmmm... How will the registers be read then???
I think that, if it's possible, it'll be a D
[about extra instructions]
> And lot's of others. So only a VERY small portion of the instruction set
is
> used for the extra registers (a few LDCTL instructions).
> And the more than quadrupled increased register set is only a VERY small
> part of the Z380's power.
What about PUSH nn??? And all
Laurens Holst wrote:
>I see nothing about IXh and IXl but they'll probably be there, undocumented,
>just like on the Z80. However, according to Patriek they are on a different
>location, and that explains the nessacary remapping.
I never said that!?!
AFAIK Z180 traps all illegal opcodes with an e
SHit shit shit
I was quite sure i changed the email-address but it was not ..
Sorry
MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED]
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> >> Z180 has new instructions.
> >Only very few, which are not that useful.
>
> Well... they are more usefull than those new on Z380... (-;
Not at all. Read the Z380 specs.
> The VERY USEFULL new opcodes on Z380 are just to control
> its new features: the new registers, the lo
> >By the way, an idea just popped into my mind...
> >For the Z180 CPU, eventually also an 'emulation' TSR could be made, which
> >emulates the Z380 through 'trapping' of illegal opcodes. It will be
_really_
> >slow though...
>
> But it'll not "that hard" to do... But it'll only works if the Z38
On Sat, 22 Apr 2000 23:22:57 +0200, Laurens Holst wrote:
>By the way, an idea just popped into my mind...
>For the Z180 CPU, eventually also an 'emulation' TSR could be made, which
>emulates the Z380 through 'trapping' of illegal opcodes. It will be _really_
>slow though...
But it'll not "that
On Sat, 22 Apr 2000 21:57:34 +0200, Laurens Holst wrote:
>> Z180 has new instructions.
>Only very few, which are not that useful.
Well... they are more usefull than those new on Z380... (-;
The VERY USEFULL new opcodes on Z380 are just to control
its new features: the new registers, the lo
By the way, an idea just popped into my mind...
For the Z180 CPU, eventually also an 'emulation' TSR could be made, which
emulates the Z380 through 'trapping' of illegal opcodes. It will be _really_
slow though...
I am wondering... Do the registers IXh IXl IYh and IYl really exist on the
Z180???
> >- The Ademir ACE002 board can execute old programs fast, however there is
no
> >new instruction set.
>
> Z180 has new instructions.
Only very few, which are not that useful.
> >The Z380 is fully compatible with the Z180. Therefor, all Z80 as well as
all
> >Z180 programs can be executed on i
Laurens Holst wrote:
> Okay.
>
> This is the way I see it now (and Patriek partially too):
> I send a CC to Leonardo Padial and Ademir Carchano too...
I think you should send it to [EMAIL PROTECTED] . I'm not sure
if he's still using the old e-mail. It's a good idea bring them to this mailing
l
On Fri, 21 Apr 2000 19:56:58 +0200, Laurens Holst wrote:
>- The Ademir ACE002 board can execute old programs fast, however there is no
>new instruction set.
Z180 has new instructions.
>The Z380 is fully compatible with the Z180. Therefor, all Z80 as well as all
>Z180 programs can be executed o
ff persoonlijke nieuwsgierigheid, waarom onderteken jij altijd met 'grauw'
Woon je soms in het friese "Grouw" ofzo??
Grtz, Siebe.
MSX Mailinglist. To unsubscribe, send an email to [EMAIL PROTECTED]
and put "unsubscribe msx [EMAIL PROTECTED]" (without the quotes) in
the body (not the subje
Okay.
This is the way I see it now (and Patriek partially too):
I send a CC to Leonardo Padial and Ademir Carchano too...
- The current Padial board can only execute programs especially written for
it, because it has no direct I/O access. Therefor it executes old programs
on the Z80, low speed.
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