[pypy-commit] pypy s390x-backend: merged default

Author: Richard Plangger Branch: s390x-backend Changeset: r81758:7cc617cb941e Date: 2016-01-14 10:29 +0100 http://bitbucket.org/pypy/pypy/changeset/7cc617cb941e/ Log:merged default diff --git a/Makefile b/Makefile --- a/Makefile +++ b/Makefile @@ -39,5 +39,5 @@ # runs.

[pypy-commit] pypy s390x-backend: rewritten the last step of force_allocate_register, it could have taken (odd, even) instead of (even, odd)

Author: Richard Plangger Branch: s390x-backend Changeset: r81759:97bc3df81867 Date: 2016-01-14 12:26 +0100 http://bitbucket.org/pypy/pypy/changeset/97bc3df81867/ Log:rewritten the last step of force_allocate_register, it could have taken (odd, even) instead of

[pypy-commit] pypy s390x-backend: still searching for this weird problem. seems to be introduced when switching from a guard to a bridge in a very rare case

Author: Richard Plangger Branch: s390x-backend Changeset: r81757:41b2950af11a Date: 2016-01-14 10:29 +0100 http://bitbucket.org/pypy/pypy/changeset/41b2950af11a/ Log:still searching for this weird problem. seems to be introduced when switching from a guard to a

[pypy-commit] pypy s390x-backend: removed print statements

Author: Richard Plangger Branch: s390x-backend Changeset: r81761:e8159a73d818 Date: 2016-01-14 14:37 +0100 http://bitbucket.org/pypy/pypy/changeset/e8159a73d818/ Log:removed print statements diff --git a/rpython/jit/backend/test/zll_stress.py

[pypy-commit] pypy s390x-backend: reverted debug lines

Author: Richard Plangger Branch: s390x-backend Changeset: r81836:4a1e1cbe4d29 Date: 2016-01-18 15:48 +0100 http://bitbucket.org/pypy/pypy/changeset/4a1e1cbe4d29/ Log:reverted debug lines ___ pypy-commit mailing list

[pypy-commit] pypy s390x-backend: another case where regalloc pair did not succeed

Author: Richard Plangger Branch: s390x-backend Changeset: r81837:477fb942bb79 Date: 2016-01-18 16:09 +0100 http://bitbucket.org/pypy/pypy/changeset/477fb942bb79/ Log:another case where regalloc pair did not succeed diff --git a/rpython/jit/backend/zarch/regalloc.py

[pypy-commit] pypy s390x-backend: modified 2 tests, first used void pointer instead of int pointer (thus qsort did not sort),

Author: Richard Plangger Branch: s390x-backend Changeset: r81835:58481ef6fdd3 Date: 2016-01-18 15:22 +0100 http://bitbucket.org/pypy/pypy/changeset/58481ef6fdd3/ Log:modified 2 tests, first used void pointer instead of int pointer (thus qsort did not sort), the

[pypy-commit] pypy s390x-backend: dict comprehension rewrite to loop overwrote parameter variable of the function

Author: Richard Plangger Branch: s390x-backend Changeset: r81829:8c4d49ec746f Date: 2016-01-18 09:13 +0100 http://bitbucket.org/pypy/pypy/changeset/8c4d49ec746f/ Log:dict comprehension rewrite to loop overwrote parameter variable of the function diff --git

[pypy-commit] pypy s390x-backend: fixed syntax error

Author: Richard Plangger Branch: s390x-backend Changeset: r81828:12cb71eb84d2 Date: 2016-01-18 08:50 +0100 http://bitbucket.org/pypy/pypy/changeset/12cb71eb84d2/ Log:fixed syntax error diff --git a/rpython/jit/backend/test/zll_stress.py

[pypy-commit] pypy s390x-backend: removed double stack frame allocation from stacklet, zpickle requiring them pass

Author: Richard Plangger Branch: s390x-backend Changeset: r81830:737d6e63553a Date: 2016-01-18 10:07 +0100 http://bitbucket.org/pypy/pypy/changeset/737d6e63553a/ Log:removed double stack frame allocation from stacklet, zpickle requiring them pass diff --git

[pypy-commit] pypy s390x-backend: reverted rlib/constant.py

Author: Richard Plangger Branch: s390x-backend Changeset: r81831:c2e76c7a5755 Date: 2016-01-18 10:08 +0100 http://bitbucket.org/pypy/pypy/changeset/c2e76c7a5755/ Log:reverted rlib/constant.py diff --git a/rpython/rlib/constant.py b/rpython/rlib/constant.py ---

[pypy-commit] pypy s390x-backend: replaced load 32bit imm with load imm that can handle 64 bit too

Author: Richard Plangger Branch: s390x-backend Changeset: r81834:045f28548d0a Date: 2016-01-18 13:51 +0100 http://bitbucket.org/pypy/pypy/changeset/045f28548d0a/ Log:replaced load 32bit imm with load imm that can handle 64 bit too diff --git

[pypy-commit] pypy s390x-backend: not every call needs to reload the pool register, but call_assembler must perform a reload

Author: Richard Plangger Branch: s390x-backend Changeset: r81766:30a2326ae1aa Date: 2016-01-14 19:42 +0100 http://bitbucket.org/pypy/pypy/changeset/30a2326ae1aa/ Log:not every call needs to reload the pool register, but call_assembler must perform a reload diff

[pypy-commit] pypy s390x-backend: jumping over pair (end of regalloc) if one of them is forbidden

Author: Richard Plangger Branch: s390x-backend Changeset: r81777:4a9e35058f3e Date: 2016-01-15 09:13 +0100 http://bitbucket.org/pypy/pypy/changeset/4a9e35058f3e/ Log:jumping over pair (end of regalloc) if one of them is forbidden diff --git

[pypy-commit] pypy s390x-backend: libffi issue handled just after calling. narrower integer types trigger zero/sign extension

Author: Richard Plangger Branch: s390x-backend Changeset: r81782:ffbab923d30d Date: 2016-01-15 10:29 +0100 http://bitbucket.org/pypy/pypy/changeset/ffbab923d30d/ Log:libffi issue handled just after calling. narrower integer types trigger zero/sign extension diff

[pypy-commit] pypy s390x-backend: removed a debug test case from yesterdays bughunt

Author: Richard Plangger Branch: s390x-backend Changeset: r81781:58d934d5d888 Date: 2016-01-15 09:30 +0100 http://bitbucket.org/pypy/pypy/changeset/58d934d5d888/ Log:removed a debug test case from yesterdays bughunt diff --git

[pypy-commit] pypy s390x-backend: more than one pool constant did not correctly increment the pool cursor

Author: Richard Plangger Branch: s390x-backend Changeset: r81783:fac01ad9537d Date: 2016-01-15 10:48 +0100 http://bitbucket.org/pypy/pypy/changeset/fac01ad9537d/ Log:more than one pool constant did not correctly increment the pool cursor diff --git

[pypy-commit] pypy s390x-backend: issue while rewriting, missed constant factor that is not multiplied to index

Author: Richard Plangger Branch: s390x-backend Changeset: r81846:69b3adf80fac Date: 2016-01-19 09:55 +0100 http://bitbucket.org/pypy/pypy/changeset/69b3adf80fac/ Log:issue while rewriting, missed constant factor that is not multiplied to index diff --git

[pypy-commit] pypy s390x-backend: translation issue

Author: Richard Plangger Branch: s390x-backend Changeset: r81847:d7a92b0fc07e Date: 2016-01-19 09:56 +0100 http://bitbucket.org/pypy/pypy/changeset/d7a92b0fc07e/ Log:translation issue diff --git a/rpython/jit/backend/llsupport/gc.py

[pypy-commit] pypy s390x-backend: ensure the index arg of gc_load_indexed to be in a register (assembler assumed this), adding offset to _rewrite_changeable_constptrs

Author: Richard Plangger Branch: s390x-backend Changeset: r81848:8b6b10912648 Date: 2016-01-19 10:26 +0100 http://bitbucket.org/pypy/pypy/changeset/8b6b10912648/ Log:ensure the index arg of gc_load_indexed to be in a register (assembler assumed this), adding

[pypy-commit] pypy s390x-backend: added overflow test of pool (not yet finished)

Author: Richard Plangger Branch: s390x-backend Changeset: r81851:6f01de4c9329 Date: 2016-01-19 11:40 +0100 http://bitbucket.org/pypy/pypy/changeset/6f01de4c9329/ Log:added overflow test of pool (not yet finished) fixed test in test_newgc, it did not write the

[pypy-commit] pypy s390x-backend: merged default

Author: Richard Plangger Branch: s390x-backend Changeset: r81845:14c96c77a0fd Date: 2016-01-19 08:44 +0100 http://bitbucket.org/pypy/pypy/changeset/14c96c77a0fd/ Log:merged default diff too long, truncating to 2000 out of 3821 lines diff --git

[pypy-commit] pypy s390x-backend: added nursery_ptr_increment, added lldebug to some tests to debug in gdb

Author: Richard Plangger Branch: s390x-backend Changeset: r81844:c0cdd96eb4d2 Date: 2016-01-19 08:41 +0100 http://bitbucket.org/pypy/pypy/changeset/c0cdd96eb4d2/ Log:added nursery_ptr_increment, added lldebug to some tests to debug in gdb diff --git

[pypy-commit] pypy s390x-backend: removed debugging lines scattered along several places outside of the zarch backend dir

Author: Richard Plangger Branch: s390x-backend Changeset: r81767:6e2a46f9f524 Date: 2016-01-14 19:54 +0100 http://bitbucket.org/pypy/pypy/changeset/6e2a46f9f524/ Log:removed debugging lines scattered along several places outside of the zarch backend dir diff

[pypy-commit] pypy s390x-backend: translation issue in guard_subclass, fixed autoencoding tests (had too generic argtype annotations)

Author: Richard Plangger Branch: s390x-backend Changeset: r81762:b3a326be8820 Date: 2016-01-14 16:44 +0100 http://bitbucket.org/pypy/pypy/changeset/b3a326be8820/ Log:translation issue in guard_subclass, fixed autoencoding tests (had too generic argtype

[pypy-commit] pypy s390x-backend: ffi call fixed in deprecated api that is still used (fix before that was not sufficient), fixed legacy tests test_libffi

Author: Richard Plangger Branch: s390x-backend Changeset: r82095:d40d932f8349 Date: 2016-02-05 22:37 +0100 http://bitbucket.org/pypy/pypy/changeset/d40d932f8349/ Log:ffi call fixed in deprecated api that is still used (fix before that was not sufficient), fixed

[pypy-commit] pypy s390x-backend: LGR should have been AGR

Author: Richard Plangger Branch: s390x-backend Changeset: r82114:e6ff00efc05f Date: 2016-02-08 08:43 +0100 http://bitbucket.org/pypy/pypy/changeset/e6ff00efc05f/ Log:LGR should have been AGR diff --git a/rpython/jit/backend/zarch/opassembler.py

[pypy-commit] pypy s390x-backend: _rawffi bigendian issue in callbacks, callback writes narrow integer directly to MSB of 64 bit value on s390x (wrong when value is passed along)

Author: Richard Plangger Branch: s390x-backend Changeset: r82149:74ebd8669f96 Date: 2016-02-10 18:07 +0100 http://bitbucket.org/pypy/pypy/changeset/74ebd8669f96/ Log:_rawffi bigendian issue in callbacks, callback writes narrow integer directly to MSB of 64 bit

[pypy-commit] pypy s390x-backend: translation issue

Author: Richard Plangger Branch: s390x-backend Changeset: r82148:8ca0c94c91ac Date: 2016-02-10 13:21 +0100 http://bitbucket.org/pypy/pypy/changeset/8ca0c94c91ac/ Log:translation issue diff --git a/rpython/jit/backend/zarch/assembler.py

[pypy-commit] pypy s390x-backend: translation issue

Author: Richard Plangger Branch: s390x-backend Changeset: r82072:8475d0a75240 Date: 2016-02-04 11:12 +0100 http://bitbucket.org/pypy/pypy/changeset/8475d0a75240/ Log:translation issue diff --git a/rpython/jit/backend/zarch/opassembler.py

[pypy-commit] pypy s390x-backend: test checks that trace is formed for a little endian read, forcing to read little endian on s390x

Author: Richard Plangger Branch: s390x-backend Changeset: r82088:cfb1f88ae10c Date: 2016-02-05 16:58 +0100 http://bitbucket.org/pypy/pypy/changeset/cfb1f88ae10c/ Log:test checks that trace is formed for a little endian read, forcing to read little endian on s390x

[pypy-commit] pypy s390x-backend: LE set OF flag, GE set OF flag, replace guard jump from a 12bit jump to 20bit jump (relative)

Author: Richard Plangger Branch: s390x-backend Changeset: r82123:eda46a48b3de Date: 2016-02-09 11:52 +0100 http://bitbucket.org/pypy/pypy/changeset/eda46a48b3de/ Log:LE set OF flag, GE set OF flag, replace guard jump from a 12bit jump to 20bit jump (relative)

[pypy-commit] pypy s390x-backend: reviewed guarding, made negate array lookup instead of fiddling with the mask bit

Author: Richard Plangger Branch: s390x-backend Changeset: r82127:ce150b6b822b Date: 2016-02-09 18:16 +0100 http://bitbucket.org/pypy/pypy/changeset/ce150b6b822b/ Log:reviewed guarding, made negate array lookup instead of fiddling with the mask bit diff --git

[pypy-commit] pypy s390x-backend: fixed a bug where pool did not allocate space for constant parameter (gc_load_indexed, and store)

Author: Richard Plangger Branch: s390x-backend Changeset: r82090:ed27d3e4b9d8 Date: 2016-02-05 17:23 +0100 http://bitbucket.org/pypy/pypy/changeset/ed27d3e4b9d8/ Log:fixed a bug where pool did not allocate space for constant parameter (gc_load_indexed, and store)

[pypy-commit] pypy s390x-backend: refactoring issue

Author: Richard Plangger Branch: s390x-backend Changeset: r82096:a84f5c5bcec6 Date: 2016-02-05 22:42 +0100 http://bitbucket.org/pypy/pypy/changeset/a84f5c5bcec6/ Log:refactoring issue diff --git a/rpython/rlib/libffi.py b/rpython/rlib/libffi.py ---

[pypy-commit] pypy s390x-backend: call int should provide rffi.INT instead of rffi.SIGNED, this works on little endian, but not big

Author: Richard Plangger Branch: s390x-backend Changeset: r82094:ca18f251c6bf Date: 2016-02-05 20:46 +0100 http://bitbucket.org/pypy/pypy/changeset/ca18f251c6bf/ Log:call int should provide rffi.INT instead of rffi.SIGNED, this works on little endian, but not big

[pypy-commit] pypy s390x-backend: place the saved register (loc_index) at a valid stack position!

Author: Richard Plangger Branch: s390x-backend Changeset: r82070:8bc88d808cbf Date: 2016-02-04 10:19 +0100 http://bitbucket.org/pypy/pypy/changeset/8bc88d808cbf/ Log:place the saved register (loc_index) at a valid stack position! diff --git

[pypy-commit] pypy s390x-backend: did not consider normal gc write barrier, crashes with index out of bounds!

Author: Richard Plangger Branch: s390x-backend Changeset: r82071:7694772ae0c5 Date: 2016-02-04 10:26 +0100 http://bitbucket.org/pypy/pypy/changeset/7694772ae0c5/ Log:did not consider normal gc write barrier, crashes with index out of bounds! diff --git

[pypy-commit] pypy s390x-backend: misaligned is fine for s390x (rawstorage)

Author: Richard Plangger Branch: s390x-backend Changeset: r82157:c3ae24173bca Date: 2016-02-11 10:20 +0100 http://bitbucket.org/pypy/pypy/changeset/c3ae24173bca/ Log:misaligned is fine for s390x (rawstorage) diff --git a/rpython/rlib/rawstorage.py

[pypy-commit] pypy s390x-backend: fixed two tests where the endian could not match the sequence of operations

Author: Richard Plangger Branch: s390x-backend Changeset: r82156:5040efcfecd0 Date: 2016-02-11 09:31 +0100 http://bitbucket.org/pypy/pypy/changeset/5040efcfecd0/ Log:fixed two tests where the endian could not match the sequence of operations diff --git

[pypy-commit] pypy s390x-backend: fixed test. emitting gc_load_r instead of indexed while loading a constant pointer

Author: Richard Plangger Branch: s390x-backend Changeset: r82169:0274e5b9e6d2 Date: 2016-02-12 09:29 +0100 http://bitbucket.org/pypy/pypy/changeset/0274e5b9e6d2/ Log:fixed test. emitting gc_load_r instead of indexed while loading a constant pointer LD has only 12

[pypy-commit] pypy s390x-backend: added assert, fixed test (big endian issue with unions)

Author: Richard Plangger Branch: s390x-backend Changeset: r82155:9638a3d105fa Date: 2016-02-11 09:15 +0100 http://bitbucket.org/pypy/pypy/changeset/9638a3d105fa/ Log:added assert, fixed test (big endian issue with unions) diff --git

[pypy-commit] pypy s390x-backend: replaced arith left shift with logical (other backends do not use arith shift there!),

Author: Richard Plangger Branch: s390x-backend Changeset: r82174:2b50cfaee409 Date: 2016-02-12 12:39 +0100 http://bitbucket.org/pypy/pypy/changeset/2b50cfaee409/ Log:replaced arith left shift with logical (other backends do not use arith shift there!), do not

[pypy-commit] pypy s390x-backend: catchup with default

Author: Richard Plangger Branch: s390x-backend Changeset: r82137:506ffad57f5e Date: 2016-02-10 09:01 +0100 http://bitbucket.org/pypy/pypy/changeset/506ffad57f5e/ Log:catchup with default diff too long, truncating to 2000 out of 4971 lines diff --git a/.hgignore

[pypy-commit] pypy s390x-backend: ups, f1, f3, f5, f7 are volatiles, but where not added to the list of volatiles

Author: Richard Plangger Branch: s390x-backend Changeset: r82139:67c6fa68e2b9 Date: 2016-02-10 11:18 +0100 http://bitbucket.org/pypy/pypy/changeset/67c6fa68e2b9/ Log:ups, f1,f3,f5,f7 are volatiles, but where not added to the list of volatiles diff --git

[pypy-commit] pypy s390x-backend: saving f8 through f15 before entering the jit and restoring it before exiting it. (ABI demands this)

Author: Richard Plangger Branch: s390x-backend Changeset: r82140:6cf6a1b5353a Date: 2016-02-10 12:43 +0100 http://bitbucket.org/pypy/pypy/changeset/6cf6a1b5353a/ Log:saving f8 through f15 before entering the jit and restoring it before exiting it. (ABI demands

[pypy-commit] pypy s390x-backend: putting thread local to the right position (after moving the whole frame down)

Author: Richard Plangger Branch: s390x-backend Changeset: r82141:5bae6a642fe5 Date: 2016-02-10 13:02 +0100 http://bitbucket.org/pypy/pypy/changeset/5bae6a642fe5/ Log:putting thread local to the right position (after moving the whole frame down) diff --git

[pypy-commit] pypy s390x-backend: fixed test_runner asmlen, since GE has the overflow bit set this test fails

Author: Richard Plangger Branch: s390x-backend Changeset: r82128:42e7257e5777 Date: 2016-02-09 18:47 +0100 http://bitbucket.org/pypy/pypy/changeset/42e7257e5777/ Log:fixed test_runner asmlen, since GE has the overflow bit set this test fails diff --git

[pypy-commit] buildbot default: s390x app level and jit suite use python for building

Author: Richard Plangger Branch: Changeset: r985:d4cc08767a0e Date: 2016-02-10 13:58 +0100 http://bitbucket.org/pypy/buildbot/changeset/d4cc08767a0e/ Log:s390x app level and jit suite use python for building diff --git a/bot2/pypybuildbot/master.py

[pypy-commit] buildbot default: merged default

Author: Richard Plangger Branch: Changeset: r986:928b30c7fc85 Date: 2016-02-10 13:59 +0100 http://bitbucket.org/pypy/buildbot/changeset/928b30c7fc85/ Log:merged default diff --git a/bot2/pypybuildbot/builds.py b/bot2/pypybuildbot/builds.py ---

[pypy-commit] pypy s390x-backend: using gc_load_r for reading a constptr since index scale and offset are constant and added to the index in rewrite, ndarray test that would fail on little endian (did

Author: Richard Plangger Branch: s390x-backend Changeset: r82166:f535e775dd54 Date: 2016-02-11 16:54 +0100 http://bitbucket.org/pypy/pypy/changeset/f535e775dd54/ Log:using gc_load_r for reading a constptr since index scale and offset are constant and added to the

[pypy-commit] pypy s390x-backend: allocating the back chain correctly, one problem when hitting a memory error, stack size would have been incorrect!

Author: Richard Plangger Branch: s390x-backend Changeset: r82085:719886e6865e Date: 2016-02-05 13:30 +0100 http://bitbucket.org/pypy/pypy/changeset/719886e6865e/ Log:allocating the back chain correctly, one problem when hitting a memory error, stack size would

[pypy-commit] pypy s390x-backend: backchain was not correct (now it is, tested it), flush_cc must write 1, it must not be something != 1

Author: Richard Plangger Branch: s390x-backend Changeset: r82086:e108cd4706e3 Date: 2016-02-05 14:59 +0100 http://bitbucket.org/pypy/pypy/changeset/e108cd4706e3/ Log:backchain was not correct (now it is, tested it), flush_cc must write 1, it must not be something

[pypy-commit] pypy s390x-backend: must branch if not equal (error introduced in the last 2 commits)

Author: Richard Plangger Branch: s390x-backend Changeset: r82087:b95937cb9eb3 Date: 2016-02-05 15:04 +0100 http://bitbucket.org/pypy/pypy/changeset/b95937cb9eb3/ Log:must branch if not equal (error introduced in the last 2 commits) diff --git

[pypy-commit] pypy s390x-backend: adding signed char to the list of bigendian conversions in rawffi.alt module

Author: Richard Plangger Branch: s390x-backend Changeset: r82113:398668348638 Date: 2016-02-08 08:25 +0100 http://bitbucket.org/pypy/pypy/changeset/398668348638/ Log:adding signed char to the list of bigendian conversions in rawffi.alt module diff --git

[pypy-commit] pypy s390x-backend: added SGRK instruction, now the stack overflow is correctly detected and the exception is thrown!

Author: Richard Plangger Branch: s390x-backend Changeset: r81993:394d3ce64a00 Date: 2016-01-28 14:12 +0100 http://bitbucket.org/pypy/pypy/changeset/394d3ce64a00/ Log:added SGRK instruction, now the stack overflow is correctly detected and the exception is thrown!

[pypy-commit] pypy s390x-backend: extended the stack limit of s390x

Author: Richard Plangger Branch: s390x-backend Changeset: r81994:eaa7b84cc9cd Date: 2016-01-28 14:21 +0100 http://bitbucket.org/pypy/pypy/changeset/eaa7b84cc9cd/ Log:extended the stack limit of s390x diff --git a/rpython/translator/c/src/stack.h

[pypy-commit] pypy s390x-backend: splitting tests in zarch backend, should speed up things quite a bit

Author: Richard Plangger Branch: s390x-backend Changeset: r82002:986957b12f49 Date: 2016-01-29 10:30 +0100 http://bitbucket.org/pypy/pypy/changeset/986957b12f49/ Log:splitting tests in zarch backend, should speed up things quite a bit diff --git a/pypy/testrunner_cfg.py

[pypy-commit] pypy s390x-backend: greater equal is not equal, this basically invoked realloc frame EVERY time the assembler location was visited

Author: Richard Plangger Branch: s390x-backend Changeset: r81998:2f0e451a18e2 Date: 2016-01-28 21:35 +0100 http://bitbucket.org/pypy/pypy/changeset/2f0e451a18e2/ Log:greater equal is not equal, this basically invoked realloc frame EVERY time the assembler

[pypy-commit] pypy s390x-backend: adapted test to match the expected assembly after the changes

Author: Richard Plangger Branch: s390x-backend Changeset: r81999:e13400c9ff8a Date: 2016-01-28 22:08 +0100 http://bitbucket.org/pypy/pypy/changeset/e13400c9ff8a/ Log:adapted test to match the expected assembly after the changes diff --git

[pypy-commit] pypy s390x-backend: removed size info from call builder when assembling call_assembler (it is not needed),

Author: Richard Plangger Branch: s390x-backend Changeset: r81992:e6d4a987b802 Date: 2016-01-28 11:32 +0100 http://bitbucket.org/pypy/pypy/changeset/e6d4a987b802/ Log:removed size info from call builder when assembling call_assembler (it is not needed), removed

[pypy-commit] pypy s390x-backend: removed longlong from s390x from cpu

Author: Richard Plangger Branch: s390x-backend Changeset: r81943:47d8fe0b9435 Date: 2016-01-26 08:42 +0100 http://bitbucket.org/pypy/pypy/changeset/47d8fe0b9435/ Log:removed longlong from s390x from cpu diff --git a/rpython/jit/backend/detect_cpu.py

[pypy-commit] pypy s390x-backend: simplified guard_class

Author: Richard Plangger Branch: s390x-backend Changeset: r81947:1589c0b36069 Date: 2016-01-26 09:36 +0100 http://bitbucket.org/pypy/pypy/changeset/1589c0b36069/ Log:simplified guard_class diff --git a/rpython/jit/backend/zarch/opassembler.py

[pypy-commit] pypy s390x-backend: merged default

Author: Richard Plangger Branch: s390x-backend Changeset: r81944:c6029ee6abcc Date: 2016-01-26 08:47 +0100 http://bitbucket.org/pypy/pypy/changeset/c6029ee6abcc/ Log:merged default diff --git a/pypy/doc/whatsnew-head.rst b/pypy/doc/whatsnew-head.rst ---

[pypy-commit] pypy s390x-backend: removed print statements, typo, removed push floats from stacklet because there is no need to save them

Author: Richard Plangger Branch: s390x-backend Changeset: r81946:62aeb645010b Date: 2016-01-26 09:07 +0100 http://bitbucket.org/pypy/pypy/changeset/62aeb645010b/ Log:removed print statements, typo, removed push floats from stacklet because there is no need to

[pypy-commit] pypy s390x-backend: added an explicit memory barrier after compare and swap

Author: Richard Plangger Branch: s390x-backend Changeset: r82043:897d3634e91c Date: 2016-02-02 18:42 +0100 http://bitbucket.org/pypy/pypy/changeset/897d3634e91c/ Log:added an explicit memory barrier after compare and swap diff --git

[pypy-commit] pypy s390x-backend: reading level=2 cache for estimation size of nursery

Author: Richard Plangger Branch: s390x-backend Changeset: r82042:037ac225f6c1 Date: 2016-02-02 17:17 +0100 http://bitbucket.org/pypy/pypy/changeset/037ac225f6c1/ Log:reading level=2 cache for estimation size of nursery diff --git a/rpython/jit/backend/ppc/callbuilder.py

[pypy-commit] pypy s390x-backend: catchup with default

Author: Richard Plangger Branch: s390x-backend Changeset: r82023:f3b48b1063f6 Date: 2016-02-01 09:11 +0100 http://bitbucket.org/pypy/pypy/changeset/f3b48b1063f6/ Log:catchup with default diff too long, truncating to 2000 out of 2165 lines diff --git a/pypy/doc/faq.rst

[pypy-commit] pypy s390x-backend: replaced test case parsetuple(..."i"...) with "l",

Author: Richard Plangger Branch: s390x-backend Changeset: r82030:7be63f4c3bc8 Date: 2016-02-01 13:08 +0100 http://bitbucket.org/pypy/pypy/changeset/7be63f4c3bc8/ Log:replaced test case parsetuple(..."i"...) with "l", memory fence was place one instruction too

[pypy-commit] pypy s390x-backend: for test case zrpy_gc_direct seems that it can prove that float storage is always 0, thus it will not compile for those two

Author: Richard Plangger Branch: s390x-backend Changeset: r82036:72e40b33ebc5 Date: 2016-02-01 17:43 +0100 http://bitbucket.org/pypy/pypy/changeset/72e40b33ebc5/ Log:for test case zrpy_gc_direct seems that it can prove that float storage is always 0, thus it will

[pypy-commit] pypy s390x-backend: disabled blocking tests

Author: Richard Plangger Branch: s390x-backend Changeset: r82053:074033f70453 Date: 2016-02-03 11:01 +0100 http://bitbucket.org/pypy/pypy/changeset/074033f70453/ Log:disabled blocking tests diff --git a/pypy/module/__pypy__/test/test_signal.py

[pypy-commit] pypy s390x-backend: modified test to see if an empty print differs from a print with newline

Author: Richard Plangger Branch: s390x-backend Changeset: r82052:18bd2d236f85 Date: 2016-02-03 10:52 +0100 http://bitbucket.org/pypy/pypy/changeset/18bd2d236f85/ Log:modified test to see if an empty print differs from a print with newline diff --git

[pypy-commit] pypy s390x-backend: STC can only tak 12 bits imm, this is wrong (use STCY again), fixed pool issue

Author: Richard Plangger Branch: s390x-backend Changeset: r82065:785c6853c253 Date: 2016-02-03 22:44 +0100 http://bitbucket.org/pypy/pypy/changeset/785c6853c253/ Log:STC can only tak 12 bits imm, this is wrong (use STCY again), fixed pool issue diff --git

[pypy-commit] pypy s390x-backend: minor fix. loading from pool does not work

Author: Richard Plangger Branch: s390x-backend Changeset: r82064:0ef7606ff55f Date: 2016-02-03 22:21 +0100 http://bitbucket.org/pypy/pypy/changeset/0ef7606ff55f/ Log:minor fix. loading from pool does not work diff --git a/rpython/jit/backend/zarch/opassembler.py

[pypy-commit] pypy s390x-backend: do not execute auto assembler on 5 args + (takes far too long)

Author: Richard Plangger Branch: s390x-backend Changeset: r82056:e9fe4f2225ca Date: 2016-02-03 15:08 +0100 http://bitbucket.org/pypy/pypy/changeset/e9fe4f2225ca/ Log:do not execute auto assembler on 5 args + (takes far too long) diff --git

[pypy-commit] pypy s390x-backend: added zEC12 to assembler command for test

Author: Richard Plangger Branch: s390x-backend Changeset: r82055:a32a0a3922a4 Date: 2016-02-03 15:00 +0100 http://bitbucket.org/pypy/pypy/changeset/a32a0a3922a4/ Log:added zEC12 to assembler command for test diff --git a/rpython/jit/backend/zarch/assembler.py

[pypy-commit] pypy s390x-backend: disabled more in test signal (bbot seems to still timeout...), simplifications in the malloc assembly operations

Author: Richard Plangger Branch: s390x-backend Changeset: r82054:b2ed3adc63e7 Date: 2016-02-03 13:55 +0100 http://bitbucket.org/pypy/pypy/changeset/b2ed3adc63e7/ Log:disabled more in test signal (bbot seems to still timeout...), simplifications in the malloc

[pypy-commit] pypy s390x-backend: fixed translation issue.

Author: Richard Plangger Branch: s390x-backend Changeset: r82058:9fabf4399c18 Date: 2016-02-03 16:13 +0100 http://bitbucket.org/pypy/pypy/changeset/9fabf4399c18/ Log:fixed translation issue. diff --git a/rpython/jit/backend/zarch/assembler.py

[pypy-commit] pypy s390x-backend: big endian issue in cppyy test case

Author: Richard Plangger Branch: s390x-backend Changeset: r82057:f49815ceed3a Date: 2016-02-03 15:19 +0100 http://bitbucket.org/pypy/pypy/changeset/f49815ceed3a/ Log:big endian issue in cppyy test case diff --git a/pypy/module/cppyy/src/dummy_backend.cxx

[pypy-commit] pypy s390x-backend: critical bugfix in gc writebarrier fastpath, simplifications and a test

Author: Richard Plangger Branch: s390x-backend Changeset: r82059:822ac80ddd23 Date: 2016-02-03 17:43 +0100 http://bitbucket.org/pypy/pypy/changeset/822ac80ddd23/ Log:critical bugfix in gc writebarrier fastpath, simplifications and a test diff --git

[pypy-commit] pypy s390x-backend: proper fix for the volatile reg. provided to gc write barrier array

Author: Richard Plangger Branch: s390x-backend Changeset: r82067:71aa29c678e8 Date: 2016-02-04 08:44 +0100 http://bitbucket.org/pypy/pypy/changeset/71aa29c678e8/ Log:proper fix for the volatile reg. provided to gc write barrier array diff --git

[pypy-commit] pypy s390x-backend: added two more tests to be sure the assembler behaves correctly

Author: Richard Plangger Branch: s390x-backend Changeset: r82068:ba08e7241de3 Date: 2016-02-04 09:25 +0100 http://bitbucket.org/pypy/pypy/changeset/ba08e7241de3/ Log:added two more tests to be sure the assembler behaves correctly diff --git

[pypy-commit] pypy s390x-backend: an edge case in call release gil that could overwrite values for registers r8-r13, because the stack is not decremented accordingly

Author: Richard Plangger Branch: s390x-backend Changeset: r82069:f5ccdea0 Date: 2016-02-04 10:04 +0100 http://bitbucket.org/pypy/pypy/changeset/f5ccdea0/ Log:an edge case in call release gil that could overwrite values for registers r8-r13, because the

[pypy-commit] pypy s390x-backend: give the saved registers r10, r11, r12, r2, f0 some space on the stack. this prevents overwriting of values if they are set in the calling function

Author: Richard Plangger Branch: s390x-backend Changeset: r82062:38a946dc43e3 Date: 2016-02-03 18:49 +0100 http://bitbucket.org/pypy/pypy/changeset/38a946dc43e3/ Log:give the saved registers r10,r11,r12,r2,f0 some space on the stack. this prevents overwriting of

[pypy-commit] pypy s390x-backend: removed checkpoint/serialization points, zarch is sequentially consistent. some small test fixes

Author: Richard Plangger Branch: s390x-backend Changeset: r82051:01a7007c80c5 Date: 2016-02-03 08:35 +0100 http://bitbucket.org/pypy/pypy/changeset/01a7007c80c5/ Log:removed checkpoint/serialization points, zarch is sequentially consistent. some small test fixes

[pypy-commit] pypy s390x-backend: replaced tab with 8 spaces

Author: Richard Plangger Branch: s390x-backend Changeset: r82050:067d1f873658 Date: 2016-02-03 08:24 +0100 http://bitbucket.org/pypy/pypy/changeset/067d1f873658/ Log:replaced tab with 8 spaces diff --git a/rpython/memory/gc/test/test_env.py

[pypy-commit] pypy s390x-backend: cond_call_gc_wb_array can now not trash a volatile register. wrong allocation now takes a non volatile register!

Author: Richard Plangger Branch: s390x-backend Changeset: r82063:621a42ebea23 Date: 2016-02-03 20:19 +0100 http://bitbucket.org/pypy/pypy/changeset/621a42ebea23/ Log:cond_call_gc_wb_array can now not trash a volatile register. wrong allocation now takes a non

[pypy-commit] pypy s390x-backend: format and exchanged some registers, no breaking changes

Author: Richard Plangger Branch: s390x-backend Changeset: r82033:46f5a9e87aae Date: 2016-02-01 14:21 +0100 http://bitbucket.org/pypy/pypy/changeset/46f5a9e87aae/ Log:format and exchanged some registers, no breaking changes diff --git

[pypy-commit] pypy s390x-backend: ups, need to call method load on code builder, not assembler

Author: Richard Plangger Branch: s390x-backend Changeset: r82032:035eb5778ead Date: 2016-02-01 13:56 +0100 http://bitbucket.org/pypy/pypy/changeset/035eb5778ead/ Log:ups, need to call method load on code builder, not assembler diff --git

[pypy-commit] pypy s390x-backend: added ztranslation call assembler test and some more (hurray, one of them fails and this might be the bug I'm searching for)

Author: Richard Plangger Branch: s390x-backend Changeset: r81983:228ce776f7f6 Date: 2016-01-27 20:46 +0100 http://bitbucket.org/pypy/pypy/changeset/228ce776f7f6/ Log:added ztranslation call assembler test and some more (hurray, one of them fails and this might be

[pypy-commit] pypy regalloc: progress on faking the reg alloc for testing internal properties

Author: Richard Plangger Branch: regalloc Changeset: r82420:b765f3e0ddd4 Date: 2016-02-23 11:11 +0100 http://bitbucket.org/pypy/pypy/changeset/b765f3e0ddd4/ Log:progress on faking the reg alloc for testing internal properties diff --git

[pypy-commit] pypy default: (cfbolz, arigato, plan_rich) progress on fixing the new introduced bug in ll2ctypes, added two tests

Author: Richard Plangger <planri...@gmail.com> Branch: Changeset: r82391:fd5943132b71 Date: 2016-02-22 14:15 +0100 http://bitbucket.org/pypy/pypy/changeset/fd5943132b71/ Log:(cfbolz, arigato, plan_rich) progress on fixing the new introduced bug in ll2ctypes, added two tests

[pypy-commit] pypy regalloc: (remi, plan_rich) work in progress

Author: Richard Plangger <planri...@gmail.com> Branch: regalloc Changeset: r82423:f8ee5bddeb4b Date: 2016-02-23 11:53 +0100 http://bitbucket.org/pypy/pypy/changeset/f8ee5bddeb4b/ Log:(remi, plan_rich) work in progress diff --git a/rpython/jit/backend/llsupport/test/test_regalloc_call

[pypy-commit] pypy regalloc: (remi, plan_rich) changed the test case to force reordering at jump

Author: Richard Plangger <planri...@gmail.com> Branch: regalloc Changeset: r82427:82e72df75cb3 Date: 2016-02-23 12:35 +0100 http://bitbucket.org/pypy/pypy/changeset/82e72df75cb3/ Log:(remi, plan_rich) changed the test case to force reordering at jump diff --git a/rpython/jit/b

[pypy-commit] pypy fix-longevity: (remi, plan_rich) lookup of initial binding works on this new branch

Author: Richard Plangger <planri...@gmail.com> Branch: fix-longevity Changeset: r82436:099af271b5bc Date: 2016-02-23 14:13 +0100 http://bitbucket.org/pypy/pypy/changeset/099af271b5bc/ Log:(remi, plan_rich) lookup of initial binding works on this new branch diff --git a/rpython/jit/b

[pypy-commit] pypy regalloc: (remi, plan_rich) reordering seems to work for the first test case

Author: Richard Plangger <planri...@gmail.com> Branch: regalloc Changeset: r82424:84ffabb00046 Date: 2016-02-23 12:05 +0100 http://bitbucket.org/pypy/pypy/changeset/84ffabb00046/ Log:(remi, plan_rich) reordering seems to work for the first test case diff --git a/rpython/jit/backend/lls

[pypy-commit] pypy fix-longevity: (remi, plan_rich) refactored free_reg into two lists (caller saved and callee saved list)

Author: Richard Plangger <planri...@gmail.com> Branch: fix-longevity Changeset: r82460:98153a101dda Date: 2016-02-23 19:09 +0100 http://bitbucket.org/pypy/pypy/changeset/98153a101dda/ Log:(remi, plan_rich) refactored free_reg into two lists (caller saved and callee saved list)

[pypy-commit] pypy fix-longevity: (remi, plan_rich) fixed translation

Author: Richard Plangger <planri...@gmail.com> Branch: fix-longevity Changeset: r82522:7cf8129ae01d Date: 2016-02-25 18:25 +0100 http://bitbucket.org/pypy/pypy/changeset/7cf8129ae01d/ Log:(remi, plan_rich) fixed translation diff --git a/rpython/jit/backend/llsupport/regalloc.py b/r

[pypy-commit] pypy fix-longevity: (remi, plan_rich) missing changes that should have been commited earlier?

Author: Richard Plangger <planri...@gmail.com> Branch: fix-longevity Changeset: r82494:dad960bd604f Date: 2016-02-25 12:42 +0100 http://bitbucket.org/pypy/pypy/changeset/dad960bd604f/ Log:(remi, plan_rich) missing changes that should have been commited earlier? diff --git a/r

[pypy-commit] pypy fix-longevity: (remi, plan_rich) renamed index property to value

Author: Richard Plangger <planri...@gmail.com> Branch: fix-longevity Changeset: r82497:ed33bb43fa34 Date: 2016-02-25 13:21 +0100 http://bitbucket.org/pypy/pypy/changeset/ed33bb43fa34/ Log:(remi, plan_rich) renamed index property to value diff --git a/rpython/jit/backend/llsupport/regal

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