Thanks Tom.
On 6/12/22 17:02, Tom Rini wrote:
As this particular platform is intended to be loaded and run a specific
set of routines in SPL, we do not need the ability to further use the
USB as a host device in SPL. Disable this support.
Cc: Eric Nelson
Signed-off-by: Tom Rini
---
Please
Hi Tom,
On 5/25/21 9:45 AM, Tom Rini wrote:
> On Tue, May 25, 2021 at 09:19:30AM -0700, Eric Nelson wrote:
>> Hi Tom,
>>
>> On 5/25/21 8:47 AM, Tom Rini wrote:
>>> On Tue, May 25, 2021 at 07:10:29AM -0700, Eric Nelson wrote:
>>>
>>>> Since the
Hi Tom,
On 5/25/21 8:47 AM, Tom Rini wrote:
> On Tue, May 25, 2021 at 07:10:29AM -0700, Eric Nelson wrote:
>
>> Since the proper U-Boot doesn't do anything at the moment, I don't think
>> this hurts much.
>>
>> My usage of mx6memcal generally ends after SPL spits ou
Since the proper U-Boot doesn't do anything at the moment, I don't think
this hurts much.
My usage of mx6memcal generally ends after SPL spits out calibration
values, and I suspect the same is true for other users, so
Acked-by: Eric Nelson
On 5/22/21 5:47 AM, Tom Rini wrote:
> As this bo
llo
Reviewed-by: Simon Glass
Signed-off-by: Ovidiu Panait
---
v2 updates:
- add reviewed-by tag
Reviewed-by: Eric Nelson
Reviewed by: Eric Nelson
On 5/26/20 12:06 PM, Tom Rini wrote:
The config header for this platform uses '#undef' in a number of cases.
All of the MMC related ones were already handled correctly in the
defconfig file. In the case of CONFIG_CMD_FUSE, the command was being
built and enabled via
The blkcache_read() routine returns 1 (true) to indicate that a block was
found in the cache and returned, or 0 if not.
Signed-off-by: Eric Nelson
---
include/blk.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/blk.h b/include/blk.h
index 65db69f5d9..6f541bb2ba
ood to me.
Reviewed-by: Eric Nelson
Hi Marek,
On 11/26/19 1:35 AM, Marek Vasut wrote:
Make the PMU LDO configuration interface available to board code,
so that board code can reconfigure the internal LDOs of the SoC.
Signed-off-by: Marek Vasut
Cc: Eric Nelson
Cc: Fabio Estevam
Cc: Stefano Babic
---
arch/arm/include/asm
Hi Marek,
On 11/26/19 1:34 AM, Marek Vasut wrote:
Instead of explicitly setting up each SDQS register, use a loop.
No functional change.
Signed-off-by: Marek Vasut
Cc: Eric Nelson
Cc: Fabio Estevam
Cc: Stefano Babic
---
arch/arm/mach-imx/mx6/ddr.c | 27 ---
1
Hi Marek,
On 11/26/19 1:34 AM, Marek Vasut wrote:
This patch adds support for iMX6SX MMDC into the DDR calibration
code. The only difference between MX6DQ and MX6SX is that the SX
has 2 SDQS registers, while the DQ has 8.
Signed-off-by: Marek Vasut
Cc: Eric Nelson
Cc: Fabio Estevam
Cc
Hi Marek,
On 11/26/19 1:34 AM, Marek Vasut wrote:
Pull out the code turning SDQS pullups on and off into a separate
function, since it is replicated in two places in the code and it
is the single place in the entire function which is SoC dependent.
Signed-off-by: Marek Vasut
Cc: Eric Nelson
in SPL.
Signed-off-by: Marek Vasut
Cc: Eric Nelson
Cc: Fabio Estevam
Cc: Stefano Babic
---
arch/arm/mach-imx/mx6/ddr.c | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-imx/mx6/ddr.c b/arch/arm/mach-imx/mx6/ddr.c
index 84b9236249
Hi Angelo,
On 11/25/19 2:59 AM, Angelo Dureghello wrote:
Hi Eric,
On Sun, Nov 24, 2019 at 5:00 PM Eric Nelson wrote:
Hi Angelo,
On 11/23/19 3:47 PM, Angelo Dureghello wrote:
From: Angelo Durgehello
On m68k, block_cache list is relocated, but next and prev list
pointers are not adjusted
Hi Angelo,
On 11/25/19 2:59 AM, Angelo Dureghello wrote:
Hi Eric,
On Sun, Nov 24, 2019 at 5:00 PM Eric Nelson wrote:
Hi Angelo,
On 11/23/19 3:47 PM, Angelo Dureghello wrote:
From: Angelo Durgehello
On m68k, block_cache list is relocated, but next and prev list
pointers are not adjusted
Hi Angelo,
On 11/23/19 3:47 PM, Angelo Dureghello wrote:
From: Angelo Durgehello
On m68k, block_cache list is relocated, but next and prev list
pointers are not adjusted to the relocated struct list_head address,
so the first iteration over the block_cache list hangs.
This patch initializes
When compiling for a single CPU variant (e.g. MX6Q or MX6DL),
the IOMUX constants are named MX6_PAD_blah, not MX6Q_PAD_blah.
Fix the macros IOMUX_PADS and SETUP_IOMUX_PAD to reflect this.
Signed-off-by: Eric Nelson
---
arch/arm/include/asm/mach-imx/iomux-v3.h | 4 ++--
1 file changed, 2
correct_mpwldectr_result(>mpwldectrl0);
+ correct_mpwldectr_result(>mpwldectrl1);
+ }
+
/*
* User should issue MRS command to exit write leveling mode
* through Load Mode Register command
Otherwise,
Reviewed-by: Eric Nelson <e...@nelint.com&g
When SDP is enabled, allow it to be invoked as a fall-back
to allow re-programming a board with a full U-Boot loaded
over USB.
Signed-off-by: Eric Nelson <e...@nelint.com>
---
Since SDP loading is triggered through BOOT_DEVICE_BOARD, I'm not sure
if this should be specific to SDP.
comm
The board header file included a reference to the starting point
from nitrogen6x.h, but since so much changed, the file bears
little resemblance to that file.
Signed-off-by: Eric Nelson <e...@nelint.com>
---
include/configs/mx6memcal.h | 5 ++---
1 file changed, 2 insertions(+), 3 del
mtest").
Signed-off-by: Eric Nelson <e...@nelint.com>
---
board/freescale/mx6memcal/spl.c | 1 -
configs/mx6memcal_defconfig | 10 ++
include/configs/mx6memcal.h | 2 ++
3 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/board/freescale/mx6memcal/spl.c b/board/fre
This patch just changes the order of configuration items in
mx6memcal_defconfig to match the Kconfig layout, making it easier
to track changes made using menuconfig.
Signed-off-by: Eric Nelson <e...@nelint.com>
---
configs/mx6memcal_defconfig | 9 -
1 file changed, 4 insertions
Commit 6fbbcfd introduced device-tree support for MMC devices on
the mx7sabresd boards and didn't include BLK, which requires BLK.
Commit 8ae5bb3 did the same for secure boot.
Fix both by allowing blk-uclass (BLK) support.
Tested-by: Fabio Estevam <feste...@gmail.com>
Signed-off-by: Eric
Hi Tom,
On 10/11/2017 01:51 PM, Tom Rini wrote:
On Wed, Oct 11, 2017 at 05:50:04PM -0300, Fabio Estevam wrote:
Hi Eric,
That was the fix I was waiting for, thanks!
On Wed, Oct 11, 2017 at 5:29 PM, Eric Nelson <e...@nelint.com> wrote:
Please add a commit log and explain that this
Hi Fabio,
On 10/11/2017 01:50 PM, Fabio Estevam wrote:
Hi Eric,
That was the fix I was waiting for, thanks!
Glad to hear it.
On Wed, Oct 11, 2017 at 5:29 PM, Eric Nelson <e...@nelint.com> wrote:
Please add a commit log and explain that this fixes a regression.
Okay. If you
Change-Id: I1bdfffe782a61a4c688f1bb56e85448024cd497b
Signed-off-by: Eric Nelson <e...@nelint.com>
---
configs/mx7dsabresd_defconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig
index 795c4f2..144fb50 100644
--- a/c
Hi Stefano,
On 10/02/2017 06:21 AM, Stefano Babic wrote:
On 31/08/2017 00:13, Eric Nelson wrote:
This adds support for two additional boot modes on the i.MX7D SoC, which
is most useful when doing U-Boot development on this chip.
1. "bmode usb" can be used to force the ROM boot loade
CE_BOARD;
+
/* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */
switch ((reg & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) {
/* EIM: See 8.5.1, Table 8-9 */
Reviewed-by: Eric Nelson <e...@nelint.com>
___
U-Boot mailing list
U
y to
their only use.
+
+#define USBPHY_PWD 0x
+
+#define USBPHY_PWD_RXPWDRX (1 << 20) /* receiver block power down */
+
+#define is_usbotg_phy_active(void) (!(readl(USB_PHY0_BASE_ADDR + USBPHY_PWD) &
\
+ USBPHY_PWD_RXPWDRX))
Hi Stefan,
On 09/13/2017 12:47 PM, Stefan Agner wrote:
On 2017-09-13 02:19, Stefano Babic wrote:
Hi Eric, Stefan,
On 13/09/2017 02:30, Eric Nelson wrote:
Hi Stefan,
I hate to be fussy about this, but I don't think I saw a reply
to my earlier comment about the term "USB PHY&quo
Hi Stefan,
I hate to be fussy about this, but I don't think I saw a reply
to my earlier comment about the term "USB PHY".
https://lists.denx.de/pipermail/u-boot/2017-September/305123.html
Since i.MX6 SoCs have USB **Host** Phy's as well as the USB OTG Phy,
this patch is a bit misleading.
Hi Stefan,
On 09/08/2017 05:35 PM, Fabio Estevam wrote:
On Fri, Sep 8, 2017 at 8:35 PM, Stefan Agner wrote:
+ /*
+* The above method does not detect that the boot ROM used
+* serial downloader in case the boot ROM descided to use the
Typo: decided
Hi Stefan,
On 09/08/2017 05:16 PM, Stefan Agner wrote:
On 2017-09-08 16:41, Eric Nelson wrote:
On 09/08/2017 04:35 PM, Stefan Agner wrote:
From: Stefan Agner <stefan.ag...@toradex.com>
Nit: should be "did not initialize" instead of "initialized".
Sorry, don
Hi Stefan,
On 09/08/2017 04:35 PM, Stefan Agner wrote:
From: Stefan Agner
The current mechanism using SCR/GPR registers work well when
the serial downloader boot mode has been selected explicitly
(either via boot mode pins or using bmode command). However,
in case
Hi Stefan,
On 09/08/2017 04:35 PM, Stefan Agner wrote:
From: Stefan Agner
This macro allows to detect whether the USB PHY is active. This
is helpful to detect if the boot ROM has previously started the
USB serial downloader.
The idea is taken from the mfgtool
On 09/06/2017 11:01 PM, Lothar Waßmann wrote:
On Wed, 6 Sep 2017 10:34:33 -0700 Eric Nelson wrote:
On 09/05/2017 06:16 PM, Peng Fan wrote:
On Mon, Sep 04, 2017 at 07:48:56PM -0700, Eric Nelson wrote:
Hi Peng,
Can you tell that I'm hunting a bug in an old version?
I'm seeing a **very
V3_CLK option as
such decision is done in build-time currently.
Remove the CONFIG_IPUV3_CLK option and let the IPU clock frequency be
configured in run-time on mx6.
Reported-by: Eric Nelson <e...@nelint.com>
Signed-off-by: Fabio Estevam <fabio.este...@nxp.com>
---
Changes since v1:
Thanks Ye (and Peng).
On 09/06/2017 02:37 AM, Ye Li wrote:
On 9/5/2017 6:33 PM, Eric Nelson wrote:
Hi Peng,
Pardon the reference to an old update, but do you have a description
of the symptoms that brought about this patch?
On 03/09/2016 01:07 AM, Peng Fan wrote:
The CONFIG_IPUV3_CLK should
Thanks Peng.
On 09/05/2017 06:16 PM, Peng Fan wrote:
On Mon, Sep 04, 2017 at 07:48:56PM -0700, Eric Nelson wrote:
Hi Peng,
Can you tell that I'm hunting a bug in an old version?
I'm seeing a **very** intermittent regression between U-Boot
versions 2015.07 and 2016.05 and happened to spot
Hi Fabio,
On 09/05/2017 06:33 AM, Fabio Estevam wrote:
Hi Eric,
On Mon, Sep 4, 2017 at 11:49 PM, Eric Nelson <e...@nelint.com> wrote:
Hi Peng,
Can you tell that I'm hunting a bug in an old version?
I'm seeing a **very** intermittent regression between U-Boot
versions 2015.07 and 2
Hi Stefano,
On 09/05/2017 04:16 AM, Stefano Babic wrote:
Hi Stefan,
On 05/09/2017 03:21, Stefan Agner wrote:
From: Stefan Agner
This macro allows to detect whether the boot ROM initialized USB
already (serial downloader). This is helpful to reliably detect
if the
Hi Stefan,
On 09/04/2017 09:50 PM, Stefan Agner wrote:
On 2017-09-04 19:57, Eric Nelson wrote:
On 09/04/2017 06:21 PM, Stefan Agner wrote:
+
+/*
+ * If ROM fell back to USB recover mode, USBPH0_PWD will be clear to use USB
+ * If boot from the other mode, USB0_PWD will keep reset value
Hi Stefano,
On 09/05/2017 06:30 AM, Stefano Babic wrote:
On 05/09/2017 14:56, Fabio Estevam wrote:
Hi Eric,
On Mon, Sep 4, 2017 at 11:37 PM, Eric Nelson <ericnelso...@gmail.com> wrote:
--- a/include/configs/mx6sabre_common.h
+++ b/include/configs/mx6sabre_common.h
@@ -225,7 +
Hi Peng,
Can you tell that I'm hunting a bug in an old version?
I'm seeing a **very** intermittent regression between U-Boot
versions 2015.07 and 2016.05 and happened to spot something
in this patch.
On 04/27/2016 07:07 PM, Peng Fan wrote:
Some toolchains fail to build
"clk->rate =
Hi Peng,
Pardon the reference to an old update, but do you have a description
of the symptoms that brought about this patch?
On 03/09/2016 01:07 AM, Peng Fan wrote:
The CONFIG_IPUV3_CLK should be 26400, to i.MX6DL, it should be
19800.
Signed-off-by: Peng Fan
Hi Stefan,
On 09/04/2017 06:21 PM, Stefan Agner wrote:
From: Stefan Agner
This macro allows to detect whether the boot ROM initialized USB
already (serial downloader). This is helpful to reliably detect
if the system has been recovered via USB serial downloader.
Hi Peng,
Can you tell that I'm hunting a bug in an old version?
I'm seeing a **very** intermittent regression between U-Boot
versions 2015.07 and 2016.05 and happened to spot something
in this patch.
On 04/27/2016 07:07 PM, Peng Fan wrote:
Some toolchains fail to build
"clk->rate =
Hi all,
Adding my normal e-mail account to the chain, since the other account
isn't registered on the list.
On 09/04/2017 07:37 PM, Eric Nelson wrote:
Hi Peng,
Pardon the reference to an old update, but do you have a description
of the symptoms that brought about this patch?
On 03/09/2016 01
On 08/31/2017 04:11 PM, Fabio Estevam wrote:
Troy,
On Thu, Aug 31, 2017 at 7:53 PM, Troy Kisky
wrote:
On 8/31/2017 2:28 PM, Troy Kisky wrote:
Maybe if you change the WDOG pinmux it might work ?
Worked for me
=> mm.l 302c
302c: 0003 ? 0
On 08/31/2017 03:53 PM, Troy Kisky wrote:
On 8/31/2017 2:28 PM, Troy Kisky wrote:
Maybe if you change the WDOG pinmux it might work ?
Worked for me
=> mm.l 302c
302c: 0003 ? 0
302c0004: 0001 ? q
=> bmod usb
resetting ...
Hmm...
On SABRE-SD or Nitrogen7?
Thanks Troy (and Peng),
On 08/31/2017 02:28 PM, Troy Kisky wrote:
On 8/31/2017 6:56 AM, Fabio Estevam wrote:
On Thu, Aug 31, 2017 at 10:35 AM, Fabio Estevam <feste...@gmail.com> wrote:
On Wed, Aug 30, 2017 at 7:13 PM, Eric Nelson <e...@nelint.com> wrote:
This adds support for tw
Update these macros to use all upper-case to avoid checkpatch
warnings:
ENET_25MHz,
ENET_50MHz,
ENET_125MHz,
Signed-off-by: Eric Nelson <e...@nelint.com>
---
V2 fixes a couple of references in mx7/clock.c
arch/arm/include/asm/arch-mx7/clock.h | 6 +++---
ar
Hi Fabio,
On 08/31/2017 06:56 AM, Fabio Estevam wrote:
On Thu, Aug 31, 2017 at 10:35 AM, Fabio Estevam <feste...@gmail.com> wrote:
Hi Eric,
On Wed, Aug 30, 2017 at 7:13 PM, Eric Nelson <e...@nelint.com> wrote:
This adds support for two additional boot modes on the i.MX7D SoC, w
Update these macros to use all upper-case to avoid checkpatch
warnings:
ENET_25MHz,
ENET_50MHz,
ENET_125MHz,
Signed-off-by: Eric Nelson <e...@nelint.com>
---
arch/arm/include/asm/arch-mx7/clock.h | 6 +++---
arch/arm/mach-imx/mx7/clock.c | 2 +-
Sorry for the spam.
I resent this by mistake.
On 08/30/2017 03:13 PM, Eric Nelson wrote:
This adds support for two additional boot modes on the i.MX7D SoC, which
is most useful when doing U-Boot development on this chip.
1. "bmode usb" can be used to force the ROM boot loader'
s specified by fuses and BOOT_MODE pins
Signed-off-by: Eric Nelson <e...@nelint.com>
---
V2 adds "normal" mode as suggested by Troy Kisky
arch/arm/mach-imx/mx7/soc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c
index 87bf105
s specified by fuses and BOOT_MODE pins
Signed-off-by: Eric Nelson <e...@nelint.com>
---
V2 adds "normal" mode as suggested by Troy Kisky
arch/arm/mach-imx/mx7/soc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c
index 87bf105
Hi Troy,
On 08/29/2017 11:55 AM, Troy Kisky wrote:
On 8/29/2017 7:37 AM, Eric Nelson wrote:
Hi Troy,
On 08/28/2017 09:42 AM, Troy Kisky wrote:
On 8/27/2017 3:04 PM, Eric Nelson wrote:
This adds support for USB boot mode on the i.MX7D SoC, which
is most useful when doing U-Boot development
Hi Troy,
On 08/28/2017 09:42 AM, Troy Kisky wrote:
On 8/27/2017 3:04 PM, Eric Nelson wrote:
This adds support for USB boot mode on the i.MX7D SoC, which
is most useful when doing U-Boot development on this chip.
i.e., it enables you to enter the ROM boot loader's serial
download protocol
This adds support for USB boot mode on the i.MX7D SoC, which
is most useful when doing U-Boot development on this chip.
i.e., it enables you to enter the ROM boot loader's serial
download protocol using the command:
=> bmode usb
Signed-off-by: Eric Nelson <e...@nelint.com>
---
arch
Hi Stefan,
On 08/07/2017 11:06 AM, Stefan Agner wrote:
Hi Eric,
On 2017-08-06 08:19, Eric Nelson wrote:
Hi Stefan,
On 08/04/2017 04:38 PM, Stefan Agner wrote:
From: Stefan Agner <stefan.ag...@toradex.com>
This series adds NXP's Serial Download Protocol (SDP) support via
USB for SPL/
Hi Stefan,
On 08/04/2017 04:38 PM, Stefan Agner wrote:
From: Stefan Agner
This series adds NXP's Serial Download Protocol (SDP) support via
USB for SPL/U-Boot. It allows to download U-Boot via USB from a
(recovered) SPL using the same tools used to download SPL
Hi Fabio,
On Fri, Jul 14, 2017 at 12:01 PM, Fabio Estevam <feste...@gmail.com> wrote:
> Hi Eric,
>
> On Fri, Jul 14, 2017 at 2:58 PM, Eric Nelson <e...@nelint.com> wrote:
>
> > I set this aside because I wasn't able to get the "return to
> > RBL&quo
Hi Fabio,
On 07/14/2017 07:18 AM, Fabio Estevam wrote:
Hi Eric,
On Tue, Nov 1, 2016 at 5:13 PM, Eric Nelson <e...@nelint.com> wrote:
This is a virtual "board" that uses configuration files and
Kconfig to define the memory layout used by a real board during
the board
Hi Jagan,
On 01/27/2017 10:54 AM, Jagan Teki wrote:
> On Fri, Jan 27, 2017 at 6:29 PM, Eric Nelson <e...@nelint.com> wrote:
>> Hi Jagan,
>>
>> On 01/27/2017 10:21 AM, Jagan Teki wrote:
>>> On Fri, Jan 27, 2017 at 4:18 PM, Eric Nelson <e...@nelint.co
Hi Jagan,
On 01/27/2017 10:21 AM, Jagan Teki wrote:
> On Fri, Jan 27, 2017 at 4:18 PM, Eric Nelson <e...@nelint.com> wrote:
>> Hi Jagan,
>>
>> Love this patch! This was long overdue.
>>
>> On 01/27/2017 07:12 AM, Jagan Teki wrote:
>>> Use meani
Hi Jagan,
Love this patch! This was long overdue.
On 01/27/2017 07:12 AM, Jagan Teki wrote:
> Use meaningful meacros IMX6_BMODE_*, instead of numerical
> number in boot mode detection code.
s/meacros/macros/
>
> Cc: Stefano Babic
> Cc: Tim Harvey
>
D_RET_SUCCESS;
> }
>
> /* If the user has not yet run `sata init`, do it now */
> if (sata_curr_device == -1) {
> rc = sata_initialize();
> if (rc == -1)
> - return rc;
> + return CMD_RET_FAIL
Hi all,
On 11/27/2016 08:27 AM, Eric Nelson wrote:
> The authenticate_image routine returns a boolean to indicate
> a valid (1) or invalid (0) image.
>
An off-list discussion highlighted that the expected return value
from the authenticate_image() routine isn't obvious since there
HAB State: 0x99
failed
Signed-off-by: Eric Nelson <e...@nelint.com>
---
arch/arm/imx-common/hab.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/imx-common/hab.c b/arch/arm/imx-common/hab.c
index 6731825..e2c04f9 100644
--- a/arch/arm/imx-common/hab.c
+++
Hi Gary,
On 11/17/2016 05:16 AM, Gary Bisson wrote:
> Hi Eric, All,
>
> On Wed, Nov 16, 2016 at 05:13:41PM -0700, Eric Nelson wrote:
>> These values can be used to sign a U-Boot image for use when
>> loading an image through the Serial Download Protocol (SDP).
>&g
/master/mx6_usb_work.conf#L3
Refer to the section on imx_usb_loader in this post for more
details:
https://boundarydevices.com/high-assurance-boot-hab-dummies/
Signed-off-by: Eric Nelson <e...@nelint.com>
---
tools/imximage.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
the SP, LR and registers 0-9. Disassembling the ROM
for i.MX6DL and i.MX6SL shows that these are the only registers
used by the ROM on those SOCs.
Signed-off-by: Eric Nelson <e...@nelint.com>
---
arch/arm/cpu/armv7/mx6/Makefile | 2 +-
arch/arm/cpu/armv7/mx6/ddr.c| 4
/arm/configs/spl_sd.cfg.
This could be hard-coded for use in building SPL if we just
remove the comments from the file (copyright).
Signed-off-by: Eric Nelson <e...@nelint.com>
---
arch/arm/imx-common/spl-plus-u-boot.cfg | 4
configs/mx6memcal_defconfig | 2 +-
2 files chan
-September/thread.html#266303
[3] - http://lists.denx.de/pipermail/u-boot/2015-May/thread.html#215573
[4] - http://patchwork.ozlabs.org/patch/186054/
[5] - http://community.nxp.com/thread/303794
[6] -
http://git.denx.de/?p=u-boot.git;a=blob;f=arch/arm/include/asm/arch-mx6/mx6_plugin.S
Eric Nelson (3):
-by: Eric Nelson <e...@nelint.com>
---
include/configs/imx6_spl.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h
index 76d1ca0..fb1b237 100644
--- a/include/configs/imx6_spl.h
+++ b/include/configs/imx6_spl.h
@@ -28,7
Signed-off-by: Eric Nelson <e...@nelint.com>
---
configs/mx6memcal_wandboard_solo_defconfig | 35 ++
1 file changed, 35 insertions(+)
create mode 100644 configs/mx6memcal_wandboard_solo_defconfig
diff --git a/configs/mx6memcal_wandboard_solo_defconfig
b/c
Note that for some reason, this is failing for me unless I
select a DDR bus width of 32 bits.
Signed-off-by: Eric Nelson <e...@nelint.com>
---
configs/mx6memcal_wandboard_quad_defconfig | 34 ++
1 file changed, 34 insertions(+)
create mode 100644 c
Signed-off-by: Eric Nelson <e...@nelint.com>
---
configs/mx6memcal_warpboard_defconfig | 39 +++
1 file changed, 39 insertions(+)
create mode 100644 configs/mx6memcal_warpboard_defconfig
diff --git a/configs/mx6memcal_warpboard_defconfig
b/c
Signed-off-by: Eric Nelson <e...@nelint.com>
---
configs/mx6memcal_nitrogen6_max_defconfig | 33 +++
1 file changed, 33 insertions(+)
create mode 100644 configs/mx6memcal_nitrogen6_max_defconfig
diff --git a/configs/mx6memcal_nitrogen6_max_defconfig
b/c
Signed-off-by: Eric Nelson <e...@nelint.com>
---
configs/mx6memcal_mx6slevk_defconfig | 37
1 file changed, 37 insertions(+)
create mode 100644 configs/mx6memcal_mx6slevk_defconfig
diff --git a/configs/mx6memcal_mx6slevk_defconfig
b/c
Signed-off-by: Eric Nelson <e...@nelint.com>
---
configs/mx6memcal_sabrelite_defconfig | 34 ++
1 file changed, 34 insertions(+)
create mode 100644 configs/mx6memcal_sabrelite_defconfig
diff --git a/configs/mx6memcal_sabrelite_defconfig
b/c
Signed-off-by: Eric Nelson <e...@nelint.com>
---
configs/mx6memcal_tr1x_defconfig | 36
1 file changed, 36 insertions(+)
create mode 100644 configs/mx6memcal_tr1x_defconfig
diff --git a/configs/mx6memcal_tr1x_defconfig b/configs/mx6memcal_tr1x_defconf
_defconfig configures the board for use with
mx6sabresd or mx6qsabreauto.
Signed-off-by: Eric Nelson <e...@nelint.com>
---
arch/arm/cpu/armv7/mx6/Kconfig| 9 +
board/freescale/mx6memcal/Kconfig | 235 +
board/freescale/mx6memcal/MAINTAINERS | 7 +
board/fre
Signed-off-by: Eric Nelson <e...@nelint.com>
---
board/freescale/mx6memcal/spl.c | 4
1 file changed, 4 insertions(+)
diff --git a/board/freescale/mx6memcal/spl.c b/board/freescale/mx6memcal/spl.c
index 90e240f..4e63e34 100644
--- a/board/freescale/mx6memcal/spl.c
+++ b/board/fre
mcal-pass1
Finally, as noted in the commit message, I saw some quirkiness with
a Wandboard Quad. For some reason, the dynamic calibration failed on
this platform when I selected 64-bit bus width and I haven't taken
time to investigate.
Eric Nelson (9):
mx6: Add board mx6memcal for use in vali
t (*detect)(struct display_info_t const *dev);
> void(*enable)(struct display_info_t const *dev);
> struct fb_videomode mode;
>
Reviewed-by: Eric Nelson <e...@nelint.com>
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
U variants
like i.MX6SL that only have a single MMDC port.
Signed-off-by: Eric Nelson <e...@nelint.com>
Reviewed-by: Marek Vasut <ma...@denx.de>
---
No change in V2
arch/arm/cpu/armv7/mx6/ddr.c| 98 +++--
arch/arm/include/asm/arch-mx6/mx6-ddr.h
gathering statistics
during an initial production run.
Signed-off-by: Eric Nelson <e...@nelint.com>
---
Commit message expanded in V2
arch/arm/cpu/armv7/mx6/ddr.c| 23 +++
arch/arm/include/asm/arch-mx6/mx6-ddr.h | 2 ++
2 files changed, 25 insertions(+)
diff
space on other
boards using SPL.
Add a KConfig entry to allow boards to selectively include the
DDR calibration routines.
Signed-off-by: Eric Nelson <e...@nelint.com>
---
arch/arm/cpu/armv7/mx6/Kconfig | 8
arch/arm/cpu/armv7/mx6/ddr.c| 3 +--
arch/arm/inclu
by passing
the system configuration information to the calibration routines.
The third patch adds support for returning the calibration data
written to the MMDC registers.
The fourth patch adds a Kconfig selection to inclut the DDR calibration
routines.
Eric Nelson (4):
mx6: ddr: allow 32 cycles
The DDR calibration code is only setting flag DG_CMP_CYC (DQS gating sample
cycle) for the first PHY.
Set the 32-cycle flag for both PHYs and clear when done so the MPDGCTRL0
output value isn't polluted with calibration artifacts.
Signed-off-by: Eric Nelson <e...@nelint.com>
Reviewed-by:
Thanks Marek,
On 10/30/2016 01:03 PM, Marek Vasut wrote:
> On 10/30/2016 08:20 PM, Eric Nelson wrote:
>> The DDR calibration routines are gated by conditionals for the
>> i.MX6DQ SOCs, but with the use of the sysinfo parameter, these
>> are usable on at least i.MX6SDL
space on other
boards using SPL.
Add a KConfig entry to allow boards to selectively include the
DDR calibration routines.
Signed-off-by: Eric Nelson <e...@nelint.com>
---
arch/arm/cpu/armv7/mx6/Kconfig | 5 +
arch/arm/cpu/armv7/mx6/ddr.c| 3 +--
arch/arm/include/as
Hi Marek,
On 10/30/2016 10:30 AM, Marek Vasut wrote:
> On 10/30/2016 06:19 PM, Eric Nelson wrote:
>> Add routine mmdc_read_calibration() to return the output of DDR
>> calibration. This can be used for debugging or to aid in construction
>> of static memory configurat
Add routine mmdc_read_calibration() to return the output of DDR
calibration. This can be used for debugging or to aid in construction
of static memory configuration.
Signed-off-by: Eric Nelson <e...@nelint.com>
---
arch/arm/cpu/armv7/mx6/ddr.c| 23 +++
ar
by passing
the system configuration information to the calibration routines.
The third routine adds support for returning the calibration data
written to the MMDC registers.
Eric Nelson (3):
mx6: ddr: allow 32 cycles for DQS gating calibration
mx6: ddr: pass mx6_ddr_sysinfo to calibration routines
The DDR calibration code is only setting flag DG_CMP_CYC (DQS gating sample
cycle) for the first PHY.
Set the 32-cycle flag for both PHYs and clear when done so the MPDGCTRL0
output value isn't polluted with calibration artifacts.
Signed-off-by: Eric Nelson <e...@nelint.com>
---
arch/a
U variants
like i.MX6SL that only have a single MMDC port.
Signed-off-by: Eric Nelson <e...@nelint.com>
---
arch/arm/cpu/armv7/mx6/ddr.c| 98 +++--
arch/arm/include/asm/arch-mx6/mx6-ddr.h | 4 +-
board/kosagi/novena/novena_spl.c| 4 +-
3 f
Add constants for the MPZQLP2CTL DDR register for both
banks to allow setting the LPDDR2 timing values in
.cfg files using a named constant instead of hex addresses
as is currently done in mx6slevk and other board files.
Signed-off-by: Eric Nelson <e...@nelint.com>
---
arch/arm/include/as
1 - 100 of 1004 matches
Mail list logo