ezkcdude;153858 Wrote: > If you're going to keep on with this, at least, you must remember that > it is *input* jitter you're talking about. You have not addressed > jitter generated in the D/A process (which is not inconsequential).
In almost every place (except the one you quoted) I was careful to specify *input* jitter - clearly there will be some jitter in the oscillator used to clock the DAC. But that has nothing to do with the transport, which was my point. Also those clocks are extremely clean. cliveb Wrote: > > Doesn't this do exactly the same as a PLL with a bandwidth of 0.1Hz? In some vague sense yes - but it's not a PLL, and its characteristics are different. In any case at least for me it's easier to simply think of what happens - if we assume the DAC clock is perfect for a moment, there will be one slightly jittered bit every ten seconds. So one out of every 441,000 sound samples will be very slightly wrong. Precisely which sample it is might depend very weakly on some characteristic of the input jitter, depending on how the algorithm which decides when to adjust the clock works. Another question is whether a real crystal oscillator already has more jitter in it than is caused by these adjustments, in which case this is as good as you'll ever be able to do. PhilNYC Wrote: > > Well, that might be a semantic difference, because jitter is measured > as an average, not regarding each individual rising edge. As the dCS > whitepaper describes, we're now talking about "Signal-related timing > error", not random "noise-related" jitter. The only reason why you'd > have buffer overflow/underflow is because of a difference in the > transport and DAC clocks, and this is essentially the same issue that > is introduced by PLL's. The bottom line is if you have a system that > uses two different clocks, there will be differences, and therefore > jitter will be present. EDIT/ADDED: The remaining question is whether > it is enough jitter to be audible. Actually jitter has a spectrum - you can measure its RMS average if you like, but that's only one number out of N necessary to fully specify it (where N is the number of bits in the stream, or the times at which each edge arrive). I'm not sure what you mean by the "issue that is introduced by the PLL's" - actually that's the issue which is *solved* by the PLLs, albiet with some possibility of jitter contaminating the output. Patrick Dixon Wrote: > > You seem to be following a circular argument - (jitter rejecting) DACs > are transport agnostic therefore there is no perceptible difference > between transports. > > Only problem is, in the real world, one can hear the difference. Feel > free to try for yourself! I have, and there was no difference. My original suggestion was that you try this as well - evidently you haven't. I'm not sure where you see a circular argument - if DACs are transport agnostic then it follows that transports played through them are indistinguishable. How is that circular? -- opaqueice ------------------------------------------------------------------------ opaqueice's Profile: http://forums.slimdevices.com/member.php?userid=4234 View this thread: http://forums.slimdevices.com/showthread.php?t=29450 _______________________________________________ audiophiles mailing list audiophiles@lists.slimdevices.com http://lists.slimdevices.com/lists/listinfo/audiophiles
