There's a white paper describing the circuit in a bit more detail as well:
http://www.wadia.com/technology/technicalpapers/ As I guessed, part of the reason they're doing it this way, is to give the DAC's more settling time. They're also claiming to get the full SNR benefit of a correlated signal, which I'm not sure I agree with. I'll have to think about that some more... FWIW, for your DAC design, adding DAC chips in parallel, and feeding them the same data, does result in an improvement in SNR, without the fancy delayed data. I recall at least one DAC design that used 32 chips in parallel! -- DCtoDaylight Audiophile wish list: Zero Distortion, Infinite Signal to Noise Ratio, and a Bandwidth from DC to Daylight ------------------------------------------------------------------------ DCtoDaylight's Profile: http://forums.slimdevices.com/member.php?userid=7284 View this thread: http://forums.slimdevices.com/showthread.php?t=62747 _______________________________________________ audiophiles mailing list audiophiles@lists.slimdevices.com http://lists.slimdevices.com/mailman/listinfo/audiophiles
