On Wed, 9 Feb 2011, Yi-Shin Li wrote: > Date: Wed, 9 Feb 2011 22:21:45 +0800 > From: Yi-Shin Li <y...@araisrobo.com> > Reply-To: EMC developers <emc-developers@lists.sourceforge.net> > To: EMC developers <emc-developers@lists.sourceforge.net> > Subject: Re: [Emc-developers] pid bug > > On Tue, Feb 8, 2011 at 11:26 PM, Peter C. Wallace <p...@mesanet.com> wrote: > >> >> --- if ( ( tmp1 * pid->limit_state ) <= 0.0 ) { >> >> +++ if ( ( tmp1 * pid->limit_state * pid->igain ) <= 0.0 ) {
>> +++ if ( ( tmp1 * pid->limit_state (pid->igain ) <= 0.0 ) { >> >> Is a possible patch if negative PID values are to be allowed >> >> Based on the diagram of this page > (http://en.wikipedia.org/wiki/PID_controller), > negative PID gain may make the system diverge (unstable). > In my experience with Mitsubishi and Yaskawa AC Servos, the PID gains are > always positive. > > Why would you need negative I-gain? You wouldn't just have IGain negative, you would have all gains positive or negative. The point is that its a convenient way to reverse the output polarity especially if the output device does not have this ability. I could go either way on this (if its not supported I do think it should be documented or prevented) > Would it be possible that the polarity for calculating error is > mis-configured? > > -- > Yishin > Peter Wallace Mesa Electronics (\__/) (='.'=) This is Bunny. Copy and paste bunny into your (")_(") signature to help him gain world domination. ------------------------------------------------------------------------------ The ultimate all-in-one performance toolkit: Intel(R) Parallel Studio XE: Pinpoint memory and threading errors before they happen. Find and fix more than 250 security defects in the development cycle. Locate bottlenecks in serial and parallel code that limit performance. http://p.sf.net/sfu/intel-dev2devfeb _______________________________________________ Emc-developers mailing list Emc-developers@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/emc-developers