Le 2014-04-29 13:28, Daniel Kho a écrit :
Hi yg,
Hi !
If we could generate gate-level structural code out of these basic
rules [clocks, conditionals (if-elsif-else, case, with-select-when),
and logic], I think that's a good start.
and the goal :-)
For more abstract things like
type/package/subprogram generics, or packages, configurations, etc.,
perhaps this is where the presynthesis tool (converts between the more
abstract VHDL-2008 to simple VHDL-93) kicks in.
if GHDL supports these constructs, and if a "mcode+" approach is used,
there is no need to translate to an older simpler language.
this is why GHDL is so important !
I could help in this
area. Some things, for example configurations, just tell the synthesis
tool which architecture to synthesise, so our pre-compiler could
figure that out and generate the simple VHDL-93 code without
configurations, instead using a fixed architecture for example. Same
thing goes for generic types - our pre-compiler can set the types to
fixed values based on what's been selected by the user at the top
level of the design.
This adds a new level of indirection and from my experience,
adds the burden on development and bug finding. How can you tell
if an error is in the source code, the tool, the generated code,
the intermediate code, ... ?
I'd rather use a tool that generates a bloated file which gets
simplified
when it elaborates and simulates itself.
I too would like to have a free (and open source) VHDL compliant
synthesis tool. :)
what would you do with it ? :-)
I now maintain two copies of all my work that need to be synthesised.
One version is the more readable VHDL-2008 version, and another is the
more bloated '93 version. I hope to ditch the '93 version for good,
and not have to worry about such conversions in future.
That is one good reason, yes.
So far I only use '93.
I "just" wish to lower the barreer of entry in the digital design world,
where commercial solutions are so expensive that people just prefer
to not think about it. This is not a world where break-through
progress can happen. We need a tool that is to VHDL what GCC is to C.
cheers, dan
regards !
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