> Can Tristan explain me why my idea (repuposing GHDL to synthesis
> by creating a third target language, that is virtual and creates
> the graphs when executed) is not sustainable ?
> In my mind, it's the best way to synthesise very high leve VHDL
> with minimal code development, while usual synthesisers have to start
> small with basic constructs then work their way up by supporting
> more and more constructs...

The code generated for simulation is far too simulation oriented: a lot
of checks, lot of low-level constructs, design is not elaborated...

Better to start after semantic analysis.

Tristan.

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