From: Philippe Mathieu-Daudé <[email protected]>

Call the generic gen_lsa(). Unlike MIPS R6, the nanoMIPS
shift amount is encoded as is, without +1 bias.

Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
---
Since v3:
- Return gen_lsa() result, like the other LSA handlers
- Reworded description
---
 target/mips/tcg/nanomips32.decode        | 6 ++++++
 target/mips/tcg/nanomips_translate.c     | 5 +++++
 target/mips/tcg/nanomips_translate.c.inc | 4 ----
 3 files changed, 11 insertions(+), 4 deletions(-)

diff --git a/target/mips/tcg/nanomips32.decode 
b/target/mips/tcg/nanomips32.decode
index 2127c57444e6..3886009d77ad 100644
--- a/target/mips/tcg/nanomips32.decode
+++ b/target/mips/tcg/nanomips32.decode
@@ -6,3 +6,9 @@
 #
 # Reference: nanoMIPS32 Instruction Set Technical Reference Manual
 #            (Document Number: MD01247)
+
+&r                  rs rt rd sa
+
+@lsa                ...... rt:5 rs:5 rd:5 sa:2 --- ... ...  &r
+
+LSA                 001000 ..... ..... ..... .. ... 001 111 @lsa
diff --git a/target/mips/tcg/nanomips_translate.c 
b/target/mips/tcg/nanomips_translate.c
index 9393257612aa..6b8aaedb5477 100644
--- a/target/mips/tcg/nanomips_translate.c
+++ b/target/mips/tcg/nanomips_translate.c
@@ -13,3 +13,8 @@
 #include "decode-nanomips16.c.inc"
 #include "decode-nanomips32.c.inc"
 #include "decode-nanomips48.c.inc"
+
+static bool trans_LSA(DisasContext *ctx, arg_r *a)
+{
+    return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa);
+}
diff --git a/target/mips/tcg/nanomips_translate.c.inc 
b/target/mips/tcg/nanomips_translate.c.inc
index 6f6b5f190c9a..028ef49ea053 100644
--- a/target/mips/tcg/nanomips_translate.c.inc
+++ b/target/mips/tcg/nanomips_translate.c.inc
@@ -399,7 +399,6 @@ enum {
 /* POOL32A7 instruction pool */
 enum {
     NM_P_LSX        = 0x00,
-    NM_LSA          = 0x01,
     NM_EXTW         = 0x03,
     NM_POOL32AXF    = 0x07,
 };
@@ -3625,9 +3624,6 @@ static int decode_nanomips_32_48_opc(CPUMIPSState *env, 
DisasContext *ctx)
             case NM_P_LSX:
                 gen_p_lsx(ctx, rd, rs, rt);
                 break;
-            case NM_LSA:
-                gen_lsa(ctx, rd, rt, rs, extract32(ctx->opcode, 9, 2));
-                break;
             case NM_EXTW:
                 gen_ext(ctx, 32, rd, rs, rt, extract32(ctx->opcode, 6, 5));
                 break;
-- 
2.55.0


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