Re: which instructions should I use?
Many thanks! -- John McKown Systems Engineer IV IT Administrative Services Group HealthMarkets(r) 9151 Boulevard 26 * N. Richland Hills * TX 76010 (817) 255-3225 phone * john.mck...@healthmarkets.com * www.HealthMarkets.com Confidentiality Notice: This e-mail message may contain confidential or proprietary information. If you are not the intended recipient, please contact the sender by reply e-mail and destroy all copies of the original message. HealthMarkets(r) is the brand name for products underwritten and issued by the insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance Company(r), Mid-West National Life Insurance Company of TennesseeSM and The MEGA Life and Health Insurance Company.SM -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER- l...@listserv.uga.edu] On Behalf Of Tony Harminc Sent: Tuesday, August 28, 2012 6:35 PM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: which instructions should I use? On 28 August 2012 11:24, McKown, John john.mck...@healthmarkets.com wrote: Yes, but I cannot simply relate the such and such facility to an actual processor. Except by looking at the documentation for the processor. I would like the reverse mapping. I.e. look for such and such facility and get a list of current processors which support it. I am not aware of such a thing as a one stop shopping center. You can very quickly find out if an instruction is available on your machine by looking at the instruction table provided by the good folks at Tachon Software. http://www.tachyonsoft.com/inst390o.htm It's not organized by facility, but if you want to know something like can I use LAY on my z9? you'll have the answer in a flash. Tony H.
Re: which instructions should I use?
Binyamin Dissen writes: begin extract Yes, the difference between real world programming and ivory tower programming. In real world programming you want the sequences to be familiar so that others can more easily maintain the programs. Those with a view from the top of Mt. Olympus may think otherwise, but their views are not practical for real life end extract/ and I have two comments. The first is in the spirit of the New Yorker's Block that metaphor! feature. The ivory towers of the Song of Solomon are located at some remove, both in spirit and geographically, from any of the [disputed] locations of the Mt. Olympus that was home to Zeus and many of the other Greek deities. Second, and more important, while Mr Dissen's notion that stereotyped, 'easy to understand' code sequences are to be prized in the real world is his to cherish, I find it unattractive. Such sequences, often copied unreflectively from elsewhere, are too often the foci of error. Failure to take thought is but seldom a virtue, even in the real world that Mr Dissen inhabits.. A sequence worth writing [again] at all should usually be written ab initio. Otherwise it should be encapsulated in a suitably parameterized macro definition. (The point Rob van der Heij has just made is important here: many such macros can and should be local, specific to and located with the code in which they are used.) Finally, of course, differences like those between Mr Dissen and me are visceral and, as such, insurmountable. They have little to do with our current locations above or below sea level. John Gilmore, Ashland, MA 01721 - USA
Re: which instructions should I use?
On 8/29/2012 6:33 AM, John Gilmore wrote: Second, and more important, while Mr Dissen's notion that stereotyped, 'easy to understand' code sequences are to be prized in the real world is his to cherish, I find it unattractive. Such sequences, often copied unreflectively from elsewhere, are too often the foci of error. Failure to take thought is but seldom a virtue, even in the real world that Mr Dissen inhabits.. Keep in mind that some 'stereotyped' code sequences are so common that the hardware contains optimizations for them. For example, the use of LA to increment a pointer, followed closely by a use of the target register as an address, is so common that special 'bypass' circuitry exists in the hardware to make this sequence run fast. MVI/MVC to clear a field by propagation is similarly optimized. There are numerous other examples as well. Replacing such code sequences with well-intentioned alternatives will tend to make the code run slower. -- Edward E Jaffe Phoenix Software International, Inc 831 Parkview Drive North El Segundo, CA 90245 310-338-0400 x318 edja...@phoenixsoftware.com http://www.phoenixsoftware.com/
Re: which instructions should I use?
I am not really arguing against the use of such functional units as | . . . MVI/MVC to clear a field by propagation . . . which I like to call 'idioms'. I had/have rather longer sequences in mind, and I think Mr Dissen did too. My railings against the repeated, not very thoughtful use of stereotyped code sequences should not be misconstrued as advocacy of counter-productive noveltry for its own sake. What is required is thought. The sequence | LA to increment a pointer, followed closely by a use of the target register is indeed very common, and as such worth optimizing, but it is often suboptimal too. Modern compilers generate very different sequences for optimized array-element addressing operations. More generally, while IBM's efforts to optimize instruction sequences that it finds frequently in its code samples are unambiguously praiseworthy, I am more doubtful about systematiic attempts to exploit them. Its C-and-PL/I optimization machinery greatly mitigates the unfortunate consequences of a number of dubious coding practices in these languages; but the availability of these optimizations is not, finally, an argument for adopting the bad coding practices these optimizations address. John Gilmore, Ashland, MA 01721 - USA
Re: which instructions should I use?
On Aug 28, 2012, at 17:35, Tony Harminc wrote: You can very quickly find out if an instruction is available on your machine by looking at the instruction table provided by the good folks at Tachon Software. http://www.tachyonsoft.com/inst390o.htm Is that up to date? I understand that a few months ago Tachyon was lagging in its implementation of the z196 instruction set. -- gil
Re: which instructions should I use?
On Aug 29, 2012, at 08:35, John Gilmore wrote: More generally, while IBM's efforts to optimize instruction sequences that it finds frequently in its code samples are unambiguously praiseworthy, I am more doubtful about systematiic attempts to exploit them. Its C-and-PL/I optimization machinery greatly mitigates the unfortunate consequences of a number of dubious coding practices in these languages; but the availability of these optimizations is not, finally, an argument for adopting the bad coding practices these optimizations address. Is there any sort of cookbook cataloguing instruction( sequence)s that have been so optimized? Of course this becomes obsolete with the next hardware iteration. -- gil
Re: which instructions should I use?
Private reply. Is there a list of the stereotyped code sequences? I'm already aware of the LA and MVI/MVC sequence. People on the list might like to see a complete list. Would make a great SHARE presentation! Regards, John Ganci On 8/29/2012 8:58 AM, Edward Jaffe wrote: On 8/29/2012 6:33 AM, John Gilmore wrote: Second, and more important, while Mr Dissen's notion that stereotyped, 'easy to understand' code sequences are to be prized in the real world is his to cherish, I find it unattractive. Such sequences, often copied unreflectively from elsewhere, are too often the foci of error. Failure to take thought is but seldom a virtue, even in the real world that Mr Dissen inhabits.. Keep in mind that some 'stereotyped' code sequences are so common that the hardware contains optimizations for them. For example, the use of LA to increment a pointer, followed closely by a use of the target register as an address, is so common that special 'bypass' circuitry exists in the hardware to make this sequence run fast. MVI/MVC to clear a field by propagation is similarly optimized. There are numerous other examples as well. Replacing such code sequences with well-intentioned alternatives will tend to make the code run slower. -- Edward E Jaffe Phoenix Software International, Inc 831 Parkview Drive North El Segundo, CA 90245 310-338-0400 x318 edja...@phoenixsoftware.com http://www.phoenixsoftware.com/
Re: which instructions should I use?
Binyamin Dissen commented: Yes, the difference between real world programming and ivory tower programming. In real world programming you want the sequences to be familiar so that others can more easily maintain the programs. Those with a view from the top of Mt. Olympus may think otherwise, but their views are not practical for real life. But be careful: I've seen many examples of poor coding practices that -- simply because they were familar -- were propagated from one program to another, to the detriment of all.
Re: which instructions should I use?
On 8/29/2012 11:07 AM, John Ehrman wrote: But be careful: I've seen many examples of poor coding practices that -- simply because they were familar -- were propagated from one program to another, to the detriment of all. When I worked for a large bank in the 1980s, and saw how new JCL was constructed there, I conjectured that all batch JCL is descended from the same singular job stream. -- Edward E Jaffe Phoenix Software International, Inc 831 Parkview Drive North El Segundo, CA 90245 310-338-0400 x318 edja...@phoenixsoftware.com http://www.phoenixsoftware.com/
Re: which instructions should I use?
Ed, ... is descended from the same singular ... Happens everywhere. It is called first line syndrome. -- Martin Pi_cap_CPU - all you ever need around MWLC/SCRT/CMT in z/VSE more at http://www.picapcpu.de
Re: which instructions should I use?
On 29 August 2012 20:42, Edward Jaffe edja...@phoenixsoftware.com wrote: On 8/29/2012 11:07 AM, John Ehrman wrote: But be careful: I've seen many examples of poor coding practices that -- simply because they were familar -- were propagated from one program to another, to the detriment of all. When I worked for a large bank in the 1980s, and saw how new JCL was constructed there, I conjectured that all batch JCL is descended from the same singular job stream. It would be an interesting task for the zEC-12 with a Netezza box to conduct the HLASM Genome project. Have IBM send us a test kit to take a few samples of your code and ship them to IBM / NG to have the heritage tested :-) Rob - (why isn't it April 1st when you need it)
Re: which instructions should I use?
Yep, have seen the same in network design, application design ...design it config or code it, that's it ...never look back sometimes Scott ford www.identityforge.com On Aug 29, 2012, at 2:50 PM, Martin Truebner mar...@pi-sysprog.de wrote: Ed, ... is descended from the same singular ... Happens everywhere. It is called first line syndrome. -- Martin Pi_cap_CPU - all you ever need around MWLC/SCRT/CMT in z/VSE more at http://www.picapcpu.de
Fwd: Re: which instructions should I use?
Sorry, that wasn't the best (unoptimised branch order), besides being wrong and using the wrong register. I must be having a bad hair day. Here's the amended version: * LAR0,3 Mask for multiple of 4 NRR0,R15Check multiple of 4 BNZ BAD_RCNot so: error * LAR0,BIG_RC Lowest invalid RC CLR R15,R0Check RC within limits BLRC_TREE(,R15) OK: go handle the RC B BAD_RCBad: go handle * RC_TREE B RC0 No error B RC4 Record not found (whatever) B RC8 Zombie attack B RC12 Gross security breach BIG_RC EQU *-RC_TREE Bigger RCs are invalid * Brent Longborough
Re: which instructions should I use?
Value to be tested is in a register, not storage. On the newer machines, the TMLL instruction can do this. But I run on a z9BC. -- John McKown Systems Engineer IV IT Administrative Services Group HealthMarkets(r) 9151 Boulevard 26 * N. Richland Hills * TX 76010 (817) 255-3225 phone * john.mck...@healthmarkets.com * www.HealthMarkets.com Confidentiality Notice: This e-mail message may contain confidential or proprietary information. If you are not the intended recipient, please contact the sender by reply e-mail and destroy all copies of the original message. HealthMarkets(r) is the brand name for products underwritten and issued by the insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance Company(r), Mid-West National Life Insurance Company of TennesseeSM and The MEGA Life and Health Insurance Company.SM -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER- l...@listserv.uga.edu] On Behalf Of Robin Vowels Sent: Monday, August 27, 2012 8:27 PM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: which instructions should I use? How about no registers? TM X+3,3 BNZ ... - Original Message - From: Tony Thigpen t...@vse2pdf.com Sent: Tuesday, 28 August 2012 3:19 AM Your code requires 2 scratch registers. The following uses just 1 scratch register and does not require literal storage: LA R0,3 NR R0,R15 LTR R0,R0 BNZ BAD_RC (I still have to use code that works on boxes without the jump instructions.) Tony Thigpen
Re: which instructions should I use?
That is a RISC-like approach. I have read a bit on the ARM architecture and was impressed by it. It does have a condition code register. And most of the instructions have a mask which makes their execution conditional on the CC register, like a branch is conditional on the CC. -- John McKown Systems Engineer IV IT Administrative Services Group HealthMarkets(r) 9151 Boulevard 26 * N. Richland Hills * TX 76010 (817) 255-3225 phone * john.mck...@healthmarkets.com * www.HealthMarkets.com Confidentiality Notice: This e-mail message may contain confidential or proprietary information. If you are not the intended recipient, please contact the sender by reply e-mail and destroy all copies of the original message. HealthMarkets(r) is the brand name for products underwritten and issued by the insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance Company(r), Mid-West National Life Insurance Company of TennesseeSM and The MEGA Life and Health Insurance Company.SM -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER- l...@listserv.uga.edu] On Behalf Of Paul Gilmartin Sent: Monday, August 27, 2012 9:54 PM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: which instructions should I use? On 2012-08-27 12:31, Bill Fairchild wrote: LA R0,3 NR R1,R15 BNZ BAD_RC And in 3 or 4 years, IBM will have implemented all of this logic in a single instruction with an opcode something like this: LANRBNZ. And the processors will have over 4K different opcodes by then. The Data General Nova had no condition code in the PSW and no conditional branch. Rather, each RR instruction had a condition mask to cause the next instruction (usually a branch) to be skipped if the result of the operation met thecondition. Plus another bit in each RR instruction to suppress loading of the target register. -- gil
Re: which instructions should I use?
Assumes address is in a storage location. Most of the discussion has been based on the premise that we are talking about an error code in R15, although the code I was copying was from the start of the program where Rx contains a function code. Tony Thigpen -Original Message - From: Robin Vowels Sent: 08/27/2012 09:26 PM How about no registers? TM X+3,3 BNZ ... - Original Message - From: Tony Thigpen t...@vse2pdf.com Sent: Tuesday, 28 August 2012 3:19 AM Your code requires 2 scratch registers. The following uses just 1 scratch register and does not require literal storage: LA R0,3 NR R0,R15 LTR R0,R0 BNZ BAD_RC (I still have to use code that works on boxes without the jump instructions.) Tony Thigpen
Re: which instructions should I use?
TMLL was included with the first set of Relative and Immediate instructions way back on the 9672-G2. If you are willing to use AHI and BRC, then there is not reason not to use TMLL. On Tue, 28 Aug 2012 07:27:59 -0500, McKown, John wrote: Value to be tested is in a register, not storage. On the newer machines, the TMLL instruction can do this. But I run on a z9BC.
Re: which instructions should I use?
John, TMLH and TMLL are part of initial z/ARCH- If you have one of the older reference cards (or a POP old enough)) you might even find a reference to note 3. note 3: also available in 390 mode. -- Martin Pi_cap_CPU - all you ever need around MWLC/SCRT/CMT in z/VSE more at http://www.picapcpu.de
Re: which instructions should I use?
Thanks. I didn't realize that. I have trouble understanding from the PoPS which machine has which machine facilities. I guess that I could run a HLASM compile with the proper MACHINE level and have it list the valid opcodes exist for that MACHINE level. -- John McKown Systems Engineer IV IT Administrative Services Group HealthMarkets(r) 9151 Boulevard 26 * N. Richland Hills * TX 76010 (817) 255-3225 phone * john.mck...@healthmarkets.com * www.HealthMarkets.com Confidentiality Notice: This e-mail message may contain confidential or proprietary information. If you are not the intended recipient, please contact the sender by reply e-mail and destroy all copies of the original message. HealthMarkets(r) is the brand name for products underwritten and issued by the insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance Company(r), Mid-West National Life Insurance Company of TennesseeSM and The MEGA Life and Health Insurance Company.SM -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER- l...@listserv.uga.edu] On Behalf Of David Bond Sent: Tuesday, August 28, 2012 7:45 AM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: which instructions should I use? TMLL was included with the first set of Relative and Immediate instructions way back on the 9672-G2. If you are willing to use AHI and BRC, then there is not reason not to use TMLL. On Tue, 28 Aug 2012 07:27:59 -0500, McKown, John wrote: Value to be tested is in a register, not storage. On the newer machines, the TMLL instruction can do this. But I run on a z9BC.
Re: which instructions should I use?
According to the z/Architecture Principles of Operation, Ninth Edition (August, 2010), TEST UNDER MASK (TEST UNDER MASK HIGH, TEST UNDER MASK LOW): TEST UNDER MASK is a new name of, and TMLH and TMLL are new mnemonics for, the ESA/390 instructions TEST UNDER MASK HIGH (TMH) and TEST UNDER MASK LOW (TML), respectively. So it appears that the 390 reference is still present. Chuck Charles (Chuck) Hardee Senior Systems Engineer Database Administration Information Technology Services Thermo Fisher Scientific Pittsburgh, PA 15275 chuck.har...@thermofisher.com -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On Behalf Of McKown, John Sent: Tuesday, August 28, 2012 9:29 AM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: which instructions should I use? Thanks. I didn't realize that. I have trouble understanding from the PoPS which machine has which machine facilities. I guess that I could run a HLASM compile with the proper MACHINE level and have it list the valid opcodes exist for that MACHINE level. -- John McKown Systems Engineer IV IT Administrative Services Group HealthMarkets(r) 9151 Boulevard 26 * N. Richland Hills * TX 76010 (817) 255-3225 phone * john.mck...@healthmarkets.com * www.HealthMarkets.com Confidentiality Notice: This e-mail message may contain confidential or proprietary information. If you are not the intended recipient, please contact the sender by reply e-mail and destroy all copies of the original message. HealthMarkets(r) is the brand name for products underwritten and issued by the insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance Company(r), Mid-West National Life Insurance Company of TennesseeSM and The MEGA Life and Health Insurance Company.SM -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER- l...@listserv.uga.edu] On Behalf Of David Bond Sent: Tuesday, August 28, 2012 7:45 AM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: which instructions should I use? TMLL was included with the first set of Relative and Immediate instructions way back on the 9672-G2. If you are willing to use AHI and BRC, then there is not reason not to use TMLL. On Tue, 28 Aug 2012 07:27:59 -0500, McKown, John wrote: Value to be tested is in a register, not storage. On the newer machines, the TMLL instruction can do this. But I run on a z9BC.
Re: which instructions should I use?
One thought - your method gives equal treatment to all return codes If 80% or 90% are zero, then adding a zero test up front would speed the process for zero return -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On Behalf Of Brent Longborough Sent: Tuesday, August 28, 2012 2:26 AM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Fwd: Re: which instructions should I use? Sorry, that wasn't the best (unoptimised branch order), besides being wrong and using the wrong register. I must be having a bad hair day. Here's the amended version: * LAR0,3 Mask for multiple of 4 NRR0,R15Check multiple of 4 BNZ BAD_RCNot so: error * LAR0,BIG_RC Lowest invalid RC CLR R15,R0Check RC within limits BLRC_TREE(,R15) OK: go handle the RC B BAD_RCBad: go handle * RC_TREE B RC0 No error B RC4 Record not found (whatever) B RC8 Zombie attack B RC12 Gross security breach BIG_RC EQU *-RC_TREE Bigger RCs are invalid * Brent Longborough
Re: which instructions should I use?
Keith Riddell writes: begin extract One thought - your method gives equal treatment to all return codes If 80% or 90% are zero, then adding a zero test up front would speed the process for zero return end extract/ This is a common misapprehension. It would be the case for a nested if-then-else implementation, one of the form if rc = 0 then... else if rc= 4 then ... else if rc= 8 then ... ... else ... which is test-order sensitive. Prefixing a branch-table implementation with an ad hoc test for zero in fact slow things down. --jg On 8/28/12, Keith Riddell kridd...@tibco.com wrote: One thought - your method gives equal treatment to all return codes If 80% or 90% are zero, then adding a zero test up front would speed the process for zero return -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On Behalf Of Brent Longborough Sent: Tuesday, August 28, 2012 2:26 AM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Fwd: Re: which instructions should I use? Sorry, that wasn't the best (unoptimised branch order), besides being wrong and using the wrong register. I must be having a bad hair day. Here's the amended version: * LAR0,3 Mask for multiple of 4 NRR0,R15Check multiple of 4 BNZ BAD_RCNot so: error * LAR0,BIG_RC Lowest invalid RC CLR R15,R0Check RC within limits BLRC_TREE(,R15) OK: go handle the RC B BAD_RCBad: go handle * RC_TREE B RC0 No error B RC4 Record not found (whatever) B RC8 Zombie attack B RC12 Gross security breach BIG_RC EQU *-RC_TREE Bigger RCs are invalid * Brent Longborough
Re: which instructions should I use?
Instructions that are not supported on all z/Architecture machines can generally be identified in the Principles of Operation by the presence of an entry under Program Exceptions in the form: - Operation (if the such-and-such facility is not installed) -- Regards, Gord Tomlin Action Software International (a division of Mazda Computer Corporation) Tel: (905) 470-7113, Fax: (905) 470-6507
Re: which instructions should I use?
Younger readers may like to know that years ago we would test the low two bits of R15 for zero like this: CLI *+1,B'1100' EXR15,*-4 BNE error Best regards, Steve Hobson CICS Strategy, HLASM Development, Master Inventor Hursley Laboratories, MP 189, Room A3138, UK Tie: 246894 International: +44 1962 81 6894 Je me presse de rire de tout, de peur d'être obligé d'en pleurer Unless stated otherwise above: IBM United Kingdom Limited - Registered in England and Wales with number 741598. Registered office: PO Box 41, North Harbour, Portsmouth, Hampshire PO6 3AU
Re: which instructions should I use?
On Aug 28, 2012, at 08:53, Steve Hobson wrote: Younger readers may like to know that years ago we would test the low two bits of R15 for zero like this: CLI *+1,B'1100' EXR15,*-4 BNE error Best regards, Steve Hobson Ah, yes; without even a line comment. Those were the good old days. -- gil
Re: which instructions should I use?
From: McKown, John john.mck...@healthmarkets.com Sent: Tuesday, 28 August 2012 10:27 PM Value to be tested is in a register, not storage. I've already given an example with the data in R15. On the newer machines, the TMLL instruction can do this. But I run on a z9BC. -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER- l...@listserv.uga.edu] On Behalf Of Robin Vowels Sent: Monday, August 27, 2012 8:27 PM How about no registers? TM X+3,3 BNZ ...
Re: which instructions should I use?
From: McKown, John john.mck...@healthmarkets.com Sent: Tuesday, 28 August 2012 10:27 PM Value to be tested is in a register, not storage. Again, how about no registers? (version 2) STC 15,X TMX,3 BNZ... -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER- l...@listserv.uga.edu] On Behalf Of Robin Vowels Sent: Monday, August 27, 2012 8:27 PM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: which instructions should I use? How about no registers? TM X+3,3 BNZ ...
Re: which instructions should I use?
From: Steve Hobson steve_hob...@uk.ibm.com Sent: Wednesday, 29 August 2012 12:53 AM Younger readers may like to know that years ago we would test the low two bits of R15 for zero like this: CLI *+1,B'1100' EXR15,*-4 BNE error Never necessary to do that: STC15,X TMX,3 BNE...
Re: which instructions should I use?
Yes, but I cannot simply relate the such and such facility to an actual processor. Except by looking at the documentation for the processor. I would like the reverse mapping. I.e. look for such and such facility and get a list of current processors which support it. I am not aware of such a thing as a one stop shopping center. -- John McKown Systems Engineer IV IT Administrative Services Group HealthMarkets(r) 9151 Boulevard 26 * N. Richland Hills * TX 76010 (817) 255-3225 phone * john.mck...@healthmarkets.com * www.HealthMarkets.com Confidentiality Notice: This e-mail message may contain confidential or proprietary information. If you are not the intended recipient, please contact the sender by reply e-mail and destroy all copies of the original message. HealthMarkets(r) is the brand name for products underwritten and issued by the insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance Company(r), Mid-West National Life Insurance Company of TennesseeSM and The MEGA Life and Health Insurance Company.SM -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER- l...@listserv.uga.edu] On Behalf Of Gord Tomlin Sent: Tuesday, August 28, 2012 9:53 AM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: which instructions should I use? Instructions that are not supported on all z/Architecture machines can generally be identified in the Principles of Operation by the presence of an entry under Program Exceptions in the form: - Operation (if the such-and-such facility is not installed) -- Regards, Gord Tomlin Action Software International (a division of Mazda Computer Corporation) Tel: (905) 470-7113, Fax: (905) 470-6507
Re: which instructions should I use?
That requires a byte of addressable storage. In the code that I now write, I try to avoid using any base registers. However, I also write new code as LE enabled (and both re-entrant and pure - no modifying any location within a CSECT), so I do end up with a register addressing the DSA. I guess that I've just gotten a dislike for doing storage operations unless they are really necessary. In any case, as I have been informed, the TMLL instruction works on my z9BC; so I will now use it. -- John McKown Systems Engineer IV IT Administrative Services Group HealthMarkets(r) 9151 Boulevard 26 * N. Richland Hills * TX 76010 (817) 255-3225 phone * john.mck...@healthmarkets.com * www.HealthMarkets.com Confidentiality Notice: This e-mail message may contain confidential or proprietary information. If you are not the intended recipient, please contact the sender by reply e-mail and destroy all copies of the original message. HealthMarkets(r) is the brand name for products underwritten and issued by the insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance Company(r), Mid-West National Life Insurance Company of TennesseeSM and The MEGA Life and Health Insurance Company.SM -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER- l...@listserv.uga.edu] On Behalf Of Robin Vowels Sent: Tuesday, August 28, 2012 10:21 AM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: which instructions should I use? From: McKown, John john.mck...@healthmarkets.com Sent: Tuesday, 28 August 2012 10:27 PM Value to be tested is in a register, not storage. Again, how about no registers? (version 2) STC 15,X TMX,3 BNZ... -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER- l...@listserv.uga.edu] On Behalf Of Robin Vowels Sent: Monday, August 27, 2012 8:27 PM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: which instructions should I use? How about no registers? TM X+3,3 BNZ ...
Re: which instructions should I use?
Never is putting it a bit strong. Suppose you are -- sorry, were -- writing a macro that generates the code. Do you want a macro parameter that specifies a one-byte work area? BTW, the reason for omitting comments was to allow the reader a slight frisson on figuring out how it actually works. As per the following famous enhanced version: *-4 EQU * CLI *+1,B'1100' EXR15,*-4 BNE error Best regards, Steve Hobson From: Steve Hobson steve_hob...@uk.ibm.com Sent: Wednesday, 29 August 2012 12:53 AM Younger readers may like to know that years ago we would test the low two bits of R15 for zero like this: CLI *+1,B'1100' EXR15,*-4 BNE error Never necessary to do that: STC15,X TMX,3 BNE... Unless stated otherwise above: IBM United Kingdom Limited - Registered in England and Wales with number 741598. Registered office: PO Box 41, North Harbour, Portsmouth, Hampshire PO6 3AU
Re: which instructions should I use?
For an unguarded branch table like CALL subroutine. B RC_TREE(,R15) OK: go handle the RC You are correct But if you are going to add code like this * LAR0,3 Mask for multiple of 4 NRR0,R15Check multiple of 4 BNZ BAD_RCNot so: error * LAR0,BIG_RC Lowest invalid RC CLR R15,R0Check RC within limits BLRC_TREE(,R15) OK: go handle the RC B BAD_RCBad: go handle Then * LTR R15,R15 BZRC_ZERO LAR0,3 Mask for multiple of 4 NRR0,R15Check multiple of 4 BNZ BAD_RCNot so: error * LAR0,BIG_RC Lowest invalid RC CLR R15,R0Check RC within limits BLRC_TREE(,R15) OK: go handle the RC B BAD_RCBad: go handle Would be faster 90%(80%) of the time Thoughts?? -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On Behalf Of John Gilmore Sent: Tuesday, August 28, 2012 9:46 AM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: which instructions should I use? Keith Riddell writes: begin extract One thought - your method gives equal treatment to all return codes If 80% or 90% are zero, then adding a zero test up front would speed the process for zero return end extract/ This is a common misapprehension. It would be the case for a nested if-then-else implementation, one of the form if rc = 0 then... else if rc= 4 then ... else if rc= 8 then ... ... else ... which is test-order sensitive. Prefixing a branch-table implementation with an ad hoc test for zero in fact slow things down. --jg On 8/28/12, Keith Riddell kridd...@tibco.com wrote: One thought - your method gives equal treatment to all return codes If 80% or 90% are zero, then adding a zero test up front would speed the process for zero return -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On Behalf Of Brent Longborough Sent: Tuesday, August 28, 2012 2:26 AM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Fwd: Re: which instructions should I use? Sorry, that wasn't the best (unoptimised branch order), besides being wrong and using the wrong register. I must be having a bad hair day. Here's the amended version: * LAR0,3 Mask for multiple of 4 NRR0,R15Check multiple of 4 BNZ BAD_RCNot so: error * LAR0,BIG_RC Lowest invalid RC CLR R15,R0Check RC within limits BLRC_TREE(,R15) OK: go handle the RC B BAD_RCBad: go handle * RC_TREE B RC0 No error B RC4 Record not found (whatever) B RC8 Zombie attack B RC12 Gross security breach BIG_RC EQU *-RC_TREE Bigger RCs are invalid * Brent Longborough
Re: which instructions should I use?
*-4 EQU * Oh, I love it! My immediate thought, as intended I'm sure, was that *-4 is not a valid symbol and would cause an assembler error. Then the backbrain slapped the forebrain saying * in position means it's a comment, you idiot! -- John McKown Systems Engineer IV IT Administrative Services Group HealthMarkets(r) 9151 Boulevard 26 * N. Richland Hills * TX 76010 (817) 255-3225 phone * john.mck...@healthmarkets.com * www.HealthMarkets.com Confidentiality Notice: This e-mail message may contain confidential or proprietary information. If you are not the intended recipient, please contact the sender by reply e-mail and destroy all copies of the original message. HealthMarkets(r) is the brand name for products underwritten and issued by the insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance Company(r), Mid-West National Life Insurance Company of TennesseeSM and The MEGA Life and Health Insurance Company.SM -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER- l...@listserv.uga.edu] On Behalf Of Steve Hobson Sent: Tuesday, August 28, 2012 10:48 AM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: which instructions should I use? Never is putting it a bit strong. Suppose you are -- sorry, were -- writing a macro that generates the code. Do you want a macro parameter that specifies a one-byte work area? BTW, the reason for omitting comments was to allow the reader a slight frisson on figuring out how it actually works. As per the following famous enhanced version: *-4 EQU * CLI *+1,B'1100' EXR15,*-4 BNE error Best regards, Steve Hobson From: Steve Hobson steve_hob...@uk.ibm.com Sent: Wednesday, 29 August 2012 12:53 AM Younger readers may like to know that years ago we would test the low two bits of R15 for zero like this: CLI *+1,B'1100' EXR15,*-4 BNE error Never necessary to do that: STC15,X TMX,3 BNE... Unless stated otherwise above: IBM United Kingdom Limited - Registered in England and Wales with number 741598. Registered office: PO Box 41, North Harbour, Portsmouth, Hampshire PO6 3AU
Re: which instructions should I use?
On 2012-08-28 11:24, McKown, John wrote: Yes, but I cannot simply relate the such and such facility to an actual processor. Except by looking at the documentation for the processor. I would like the reverse mapping. I.e. look for such and such facility and get a list of current processors which support it. I am not aware of such a thing as a one stop shopping center. It is definitely much more work to find this information than it should be. -- Regards, Gord Tomlin Action Software International (a division of Mazda Computer Corporation) Tel: (905) 470-7113, Fax: (905) 470-6507
Re: which instructions should I use?
Here is a list I compiled for my own information sometime in 2011. Use at your own risk (corrections welcome however). IBM Mainframe Instruction Facilities by PoOP Edition and Machine Type Ninth Edition SA22-7832-08z196 (2817) * CMPSC-enhancement facility * Distinct-operands facility * Enhanced-monitor facility * Fast-BCR-serialization facility * Floating-point extension facility * High-word facility * Interlocked-access facility * IPTE-range facility * Load/store-on-condition facility * Message-security-assist extension 3 * Message-security-assist extension 4 * Nonquiescing key-setting facility * Population-count facility * The Reset-reference-bits-multiple facility Eighth Edition SA22-7832-07z10 (2097) * Fibre-channel-extensions (FCX) facility Seventh Edition SA22-7832-06z10 (2097) * Compare-and-swap-and-store facility 2 * Configuration-topology facility * Enhanced-DAT facility * Execute-extensions facility * General-instructions-extension facility * Message-security-assist extension 2 * Move-with-optional-specifications facility * Parsing-enhancement facility * Restore-subchannel facility Sixth Edition SA22-7832-05z9 BC (2096), z9 EC (2094) * Compare-and-swap-and-store facility * Conditional-SSKE facility * Decimal-floating-point facility * Decimal-floating-point-rounding facility * Extract-CPU-time facility * Floating-point-support-sign-handling facility * FPR-GR-transfer facility * IEEE-exception-simulation facility * PFPO facility Fifth Edition SA22-7832-04z890 (2086), z990 (2084) * DAT-enhancement facility 2 * ETF2-enhancement facility * ETF3-enhancement facility * Extended-immediate facility * HFP-unnormalized-extensions facility * Message-security-assist extension 1 * Modified-CCW-indirect-data-addressing facility * PER-3 facility * Server-time-protocol facility * Store-clock-fast facility * Store-facility-list-extended facility * TOD-clock-steering facility Fourth Edition SA22-7832-03??? * Extended-translation facility 3 * ASN-and-LX-reuse facility Third Edition SA22-7832-02??? * DAT-enhancement facility * HFP-multiply-add/subtract facility * Long-displacement facility * Message-security assist Second Edition SA22-7832-01z800 (2066), z900 (2064) (None) First Edition SA22-7832-00??? * Extended-Translation Facility 2 Facilities in alphabetic order (51 facilities) * ASN-and-LX-reuse facility * CMPSC-enhancement facility * Compare-and-swap-and-store facility * Compare-and-swap-and-store facility 2 * Conditional-SSKE facility * Configuration-topology facility * DAT-enhancement facility * DAT-enhancement facility 2 * Decimal-floating-point facility * Decimal-floating-point-rounding facility * Distinct-operands facility * ETF2-enhancement facility * ETF3-enhancement facility * Enhanced-DAT facility * Enhanced-monitor facility * Execute-extensions facility * Extended-immediate facility * Extended-Translation Facility 2 * Extended-translation facility 3 * Extract-CPU-time facility * FPR-GR-transfer facility * Fast-BCR-serialization facility * Fibre-channel-extensions (FCX) facility * Floating-point extension facility * Floating-point-support-sign-handling facility * General-instructions-extension facility * HFP-multiply-add/subtract facility * HFP-unnormalized-extensions facility * High-word facility * IEEE-exception-simulation facility * IPTE-range facility * Interlocked-access facility * Load/store-on-condition facility * Long-displacement facility * Message-security assist * Message-security-assist extension 1 * Message-security-assist extension 2 * Message-security-assist extension 3 * Message-security-assist extension 4 * Modified-CCW-indirect-data-addressing facility * Move-with-optional-specifications facility * Nonquiescing key-setting facility * PER-3 facility * PFPO facility * Parsing-enhancement facility * Population-count facility * Restore-subchannel facility * Server-time-protocol facility * Store-clock-fast facility * Store-facility-list-extended facility * TOD-clock-steering facility * The Reset-reference-bits-multiple facility -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On Behalf Of McKown, John Sent: Tuesday, August 28, 2012 11:25 AM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: which instructions should I use? Yes, but I cannot simply relate the such and such facility to an actual processor. Except by looking at the documentation for the processor. I would like the reverse mapping. I.e. look for such and such facility and get a list of current processors which support it. I am not aware of such a thing as a one stop shopping center. -- John McKown Systems Engineer IV IT Snipped -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER- l...@listserv.uga.edu] On Behalf Of Gord Tomlin Sent: Tuesday, August 28, 2012 9:53 AM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: which
Re: which instructions should I use?
On 8/28/2012 5:27 AM, McKown, John wrote: Value to be tested is in a register, not storage. On the newer machines, the TMLL instruction can do this. But I run on a z9BC. TMLL has been supported since 9672-G3 as TML. -- Edward E Jaffe Phoenix Software International, Inc 831 Parkview Drive North El Segundo, CA 90245 310-338-0400 x318 edja...@phoenixsoftware.com http://www.phoenixsoftware.com/
Re: which instructions should I use?
On 8/28/2012 5:45 AM, David Bond wrote: TMLL was included with the first set of Relative and Immediate instructions way back on the 9672-G2. If you are willing to use AHI and BRC, then there is not reason not to use TMLL. I didn't see your response before I wrote mine. I said 'G3' but I'm sure you are correct with 'G2'. -- Edward E Jaffe Phoenix Software International, Inc 831 Parkview Drive North El Segundo, CA 90245 310-338-0400 x318 edja...@phoenixsoftware.com http://www.phoenixsoftware.com/
Re: which instructions should I use?
On 28 August 2012 11:24, McKown, John john.mck...@healthmarkets.com wrote: Yes, but I cannot simply relate the such and such facility to an actual processor. Except by looking at the documentation for the processor. I would like the reverse mapping. I.e. look for such and such facility and get a list of current processors which support it. I am not aware of such a thing as a one stop shopping center. You can very quickly find out if an instruction is available on your machine by looking at the instruction table provided by the good folks at Tachon Software. http://www.tachyonsoft.com/inst390o.htm It's not organized by facility, but if you want to know something like can I use LAY on my z9? you'll have the answer in a flash. Tony H.
Re: which instructions should I use?
I agree. Of course, you still need base+displacement in two cases that I can think of: (1) desire for an index register; and (2) to access dynamic storage (STORAGE OBTAIN or LOADed module). As an example of (1), I quite often do: CALL PROGRAM,(PARM1,PARM2),VL CHI R15,=Y(MAXENTRIES) JH INVALID_RC B*+4(R15) START JRC0 JRC4 JRC8 MAXENTRIES EQU *-START/4 Of course, this ASSuMEs that R15 is a multiple of 4. I should possibly test for that somehow. -- John McKown Systems Engineer IV IT Administrative Services Group HealthMarkets(r) 9151 Boulevard 26 * N. Richland Hills * TX 76010 (817) 255-3225 phone * john.mck...@healthmarkets.com * www.HealthMarkets.com Confidentiality Notice: This e-mail message may contain confidential or proprietary information. If you are not the intended recipient, please contact the sender by reply e-mail and destroy all copies of the original message. HealthMarkets(r) is the brand name for products underwritten and issued by the insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance Company(r), Mid-West National Life Insurance Company of TennesseeSM and The MEGA Life and Health Insurance Company.SM -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER- l...@listserv.uga.edu] On Behalf Of John Gilmore Sent: Friday, August 24, 2012 3:08 PM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: which instructions should I use? The comments are essential, and they should motivate (instead of describing) an instruction sequence. On the other hand, familiar instruction sequences don't have much charm for me. They are, I think, more likely to lull readers to sleep than to be 'more comprehensible'. I, at least, sit up when I see an unfamiliar instruction sequence. I strongly prefer jumps to branches for all of the obvious reasons. Retrofitting them into existing branch-based code is, as I have said before, a bootless undertaking; but new code should use them all but exclusively. The whole base-register-displacement scheme and its limitations should be chucked out, except in the very few special cases in which it is still needed. Elegance and brevity are finally more important than parsimony, and relative displacements are neater and cleaner than the old alternatives to them. --jg
Re: which instructions should I use?
John, you still need base+displacement desire for an index register; They come in most cases when there is space in the nibbles for it. But for the case you cited there is no need to cover code in procedure division with a base. (Dynamic storage and literalpool do have a base!) -Here is how: CALL PROGRAM,(PARM1,PARM2),VL CHI R15,=Y(MAXENTRIES) JH INVALID_RC LR15,=A(RC0,RC4,RC8,RCC)(R15) BR R15 Your addon (check for a valid rc) could also be done with this NILL R15,X'000C' as a result you only have valid combinations left over (Yes I cheated and added an entry for C). -- Martin Pi_cap_CPU - all you ever need around MWLC/SCRT/CMT in z/VSE more at http://www.picapcpu.de
Re: which instructions should I use?
Thanks for the technique. I'm not sure that I like the NILL instruction at this point. It could change an invalid (as in not planned for) RC into a valid RC. Looks like maybe I could use TMLL to just test. (TMLL R15,X'000C') -- John McKown Systems Engineer IV IT Administrative Services Group HealthMarkets(r) 9151 Boulevard 26 * N. Richland Hills * TX 76010 (817) 255-3225 phone * john.mck...@healthmarkets.com * www.HealthMarkets.com Confidentiality Notice: This e-mail message may contain confidential or proprietary information. If you are not the intended recipient, please contact the sender by reply e-mail and destroy all copies of the original message. HealthMarkets(r) is the brand name for products underwritten and issued by the insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance Company(r), Mid-West National Life Insurance Company of TennesseeSM and The MEGA Life and Health Insurance Company.SM -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER- l...@listserv.uga.edu] On Behalf Of Martin Truebner Sent: Monday, August 27, 2012 8:15 AM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: which instructions should I use? John, you still need base+displacement desire for an index register; They come in most cases when there is space in the nibbles for it. But for the case you cited there is no need to cover code in procedure division with a base. (Dynamic storage and literalpool do have a base!) -Here is how: CALL PROGRAM,(PARM1,PARM2),VL CHI R15,=Y(MAXENTRIES) JH INVALID_RC LR15,=A(RC0,RC4,RC8,RCC)(R15) BR R15 Your addon (check for a valid rc) could also be done with this NILL R15,X'000C' as a result you only have valid combinations left over (Yes I cheated and added an entry for C). -- Martin Pi_cap_CPU - all you ever need around MWLC/SCRT/CMT in z/VSE more at http://www.picapcpu.de
Re: which instructions should I use?
Register contents that are a multiple of 4 are all of the form x...xx00 Inclusive ORing such a value with the mask 1...1100 and testing the result for equality with this same mask then yields a simple, low-overhead test for a multiple-of-four value. --jg On 8/27/12, McKown, John john.mck...@healthmarkets.com wrote: Thanks for the technique. I'm not sure that I like the NILL instruction at this point. It could change an invalid (as in not planned for) RC into a valid RC. Looks like maybe I could use TMLL to just test. (TMLL R15,X'000C') -- John McKown Systems Engineer IV IT Administrative Services Group HealthMarkets(r) 9151 Boulevard 26 * N. Richland Hills * TX 76010 (817) 255-3225 phone * john.mck...@healthmarkets.com * www.HealthMarkets.com Confidentiality Notice: This e-mail message may contain confidential or proprietary information. If you are not the intended recipient, please contact the sender by reply e-mail and destroy all copies of the original message. HealthMarkets(r) is the brand name for products underwritten and issued by the insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance Company(r), Mid-West National Life Insurance Company of TennesseeSM and The MEGA Life and Health Insurance Company.SM -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER- l...@listserv.uga.edu] On Behalf Of Martin Truebner Sent: Monday, August 27, 2012 8:15 AM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: which instructions should I use? John, you still need base+displacement desire for an index register; They come in most cases when there is space in the nibbles for it. But for the case you cited there is no need to cover code in procedure division with a base. (Dynamic storage and literalpool do have a base!) -Here is how: CALL PROGRAM,(PARM1,PARM2),VL CHI R15,=Y(MAXENTRIES) JH INVALID_RC LR15,=A(RC0,RC4,RC8,RCC)(R15) BR R15 Your addon (check for a valid rc) could also be done with this NILL R15,X'000C' as a result you only have valid combinations left over (Yes I cheated and added an entry for C). -- Martin Pi_cap_CPU - all you ever need around MWLC/SCRT/CMT in z/VSE more at http://www.picapcpu.de
Re: which instructions should I use?
What you're doing is fine on any machine. Your question does, however, suggest that something akin to the MACHINE option should be available as a system variable, say SYSM_MACHINE, that could be interrogated within a macro to produce different code for different target machines. --jg On 8/27/12, McKown, John john.mck...@healthmarkets.com wrote: Destroys the contents of R15, so I guess I would load R15 into, say, R0 and do the OR operation on R0. However, I'm on a z9 and will likely never be on anything more advanced. So I'll need to load the mask into another register, say R1. That would either require an L R1,variable or literal (=X'FFFC'), or do an: AHI R1,X'04' followed by an LCR R1,R1. I don't know which of those is better. I guess the Load would be more easily understood by even a novice. LR R0,R15 L R1,=A(-4) OR R0,R1 CR R0,R1 JNE BAD_RC -- John McKown Systems Engineer IV IT Administrative Services Group HealthMarkets(r) 9151 Boulevard 26 * N. Richland Hills * TX 76010 (817) 255-3225 phone * john.mck...@healthmarkets.com * www.HealthMarkets.com Confidentiality Notice: This e-mail message may contain confidential or proprietary information. If you are not the intended recipient, please contact the sender by reply e-mail and destroy all copies of the original message. HealthMarkets(r) is the brand name for products underwritten and issued by the insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance Company(r), Mid-West National Life Insurance Company of TennesseeSM and The MEGA Life and Health Insurance Company.SM -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER- l...@listserv.uga.edu] On Behalf Of John Gilmore Sent: Monday, August 27, 2012 10:20 AM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: which instructions should I use? Register contents that are a multiple of 4 are all of the form x...xx00 Inclusive ORing such a value with the mask 1...1100 and testing the result for equality with this same mask then yields a simple, low-overhead test for a multiple-of-four value. --jg On 8/27/12, McKown, John john.mck...@healthmarkets.com wrote: Thanks for the technique. I'm not sure that I like the NILL instruction at this point. It could change an invalid (as in not planned for) RC into a valid RC. Looks like maybe I could use TMLL to just test. (TMLL R15,X'000C') -- John McKown Systems Engineer IV IT Administrative Services Group HealthMarkets(r) 9151 Boulevard 26 * N. Richland Hills * TX 76010 (817) 255-3225 phone * john.mck...@healthmarkets.com * www.HealthMarkets.com Confidentiality Notice: This e-mail message may contain confidential or proprietary information. If you are not the intended recipient, please contact the sender by reply e-mail and destroy all copies of the original message. HealthMarkets(r) is the brand name for products underwritten and issued by the insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance Company(r), Mid-West National Life Insurance Company of TennesseeSM and The MEGA Life and Health Insurance Company.SM -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER- l...@listserv.uga.edu] On Behalf Of Martin Truebner Sent: Monday, August 27, 2012 8:15 AM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: which instructions should I use? John, you still need base+displacement desire for an index register; They come in most cases when there is space in the nibbles for it. But for the case you cited there is no need to cover code in procedure division with a base. (Dynamic storage and literalpool do have a base!) -Here is how: CALL PROGRAM,(PARM1,PARM2),VL CHI R15,=Y(MAXENTRIES) JH INVALID_RC LR15,=A(RC0,RC4,RC8,RCC)(R15) BR R15 Your addon (check for a valid rc) could also be done with this NILL R15,X'000C' as a result you only have valid combinations left over (Yes I cheated and added an entry for C). -- Martin Pi_cap_CPU - all you ever need around MWLC/SCRT/CMT in z/VSE more at http://www.picapcpu.de
Re: which instructions should I use?
I have started using the MACHINE option to make sure that I don't accidently get carried away when reading the current PoPS. -- John McKown Systems Engineer IV IT Administrative Services Group HealthMarkets(r) 9151 Boulevard 26 * N. Richland Hills * TX 76010 (817) 255-3225 phone * john.mck...@healthmarkets.com * www.HealthMarkets.com Confidentiality Notice: This e-mail message may contain confidential or proprietary information. If you are not the intended recipient, please contact the sender by reply e-mail and destroy all copies of the original message. HealthMarkets(r) is the brand name for products underwritten and issued by the insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance Company(r), Mid-West National Life Insurance Company of TennesseeSM and The MEGA Life and Health Insurance Company.SM -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER- l...@listserv.uga.edu] On Behalf Of John Gilmore Sent: Monday, August 27, 2012 12:06 PM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: which instructions should I use? What you're doing is fine on any machine. Your question does, however, suggest that something akin to the MACHINE option should be available as a system variable, say SYSM_MACHINE, that could be interrogated within a macro to produce different code for different target machines. --jg On 8/27/12, McKown, John john.mck...@healthmarkets.com wrote: Destroys the contents of R15, so I guess I would load R15 into, say, R0 and do the OR operation on R0. However, I'm on a z9 and will likely never be on anything more advanced. So I'll need to load the mask into another register, say R1. That would either require an L R1,variable or literal (=X'FFFC'), or do an: AHI R1,X'04' followed by an LCR R1,R1. I don't know which of those is better. I guess the Load would be more easily understood by even a novice. LR R0,R15 L R1,=A(-4) OR R0,R1 CR R0,R1 JNE BAD_RC -- John McKown Systems Engineer IV IT Administrative Services Group HealthMarkets(r) 9151 Boulevard 26 * N. Richland Hills * TX 76010 (817) 255-3225 phone * john.mck...@healthmarkets.com * www.HealthMarkets.com Confidentiality Notice: This e-mail message may contain confidential or proprietary information. If you are not the intended recipient, please contact the sender by reply e-mail and destroy all copies of the original message. HealthMarkets(r) is the brand name for products underwritten and issued by the insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance Company(r), Mid-West National Life Insurance Company of TennesseeSM and The MEGA Life and Health Insurance Company.SM -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER- l...@listserv.uga.edu] On Behalf Of John Gilmore Sent: Monday, August 27, 2012 10:20 AM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: which instructions should I use? Register contents that are a multiple of 4 are all of the form x...xx00 Inclusive ORing such a value with the mask 1...1100 and testing the result for equality with this same mask then yields a simple, low-overhead test for a multiple-of-four value. --jg On 8/27/12, McKown, John john.mck...@healthmarkets.com wrote: Thanks for the technique. I'm not sure that I like the NILL instruction at this point. It could change an invalid (as in not planned for) RC into a valid RC. Looks like maybe I could use TMLL to just test. (TMLL R15,X'000C') -- John McKown Systems Engineer IV IT Administrative Services Group HealthMarkets(r) 9151 Boulevard 26 * N. Richland Hills * TX 76010 (817) 255-3225 phone * john.mck...@healthmarkets.com * www.HealthMarkets.com Confidentiality Notice: This e-mail message may contain confidential or proprietary information. If you are not the intended recipient, please contact the sender by reply e-mail and destroy all copies of the original message. HealthMarkets(r) is the brand name for products underwritten and issued by the insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance Company(r), Mid-West National Life Insurance Company of TennesseeSM and The MEGA Life and Health Insurance Company.SM -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER- l...@listserv.uga.edu] On Behalf Of Martin Truebner Sent: Monday, August 27, 2012 8:15 AM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: which instructions should I use? John, you still need base+displacement desire for an index register; They come in most cases when there is space in the nibbles for it. But for the case you cited there is no need to cover code
Re: which instructions should I use?
Your code requires 2 scratch registers. The following uses just 1 scratch register and does not require literal storage: LA R0,3 NR R0,R15 LTR R0,R0 BNZ BAD_RC (I still have to use code that works on boxes without the jump instructions.) Tony Thigpen -Original Message - From: McKown, John Sent: 08/27/2012 11:34 AM Destroys the contents of R15, so I guess I would load R15 into, say, R0 and do the OR operation on R0. However, I'm on a z9 and will likely never be on anything more advanced. So I'll need to load the mask into another register, say R1. That would either require an L R1,variable or literal (=X'FFFC'), or do an: AHI R1,X'04' followed by an LCR R1,R1. I don't know which of those is better. I guess the Load would be more easily understood by even a novice. LR R0,R15 L R1,=A(-4) OR R0,R1 CR R0,R1 JNE BAD_RC -- John McKown Systems Engineer IV IT Administrative Services Group HealthMarkets(r) 9151 Boulevard 26 * N. Richland Hills * TX 76010 (817) 255-3225 phone * john.mck...@healthmarkets.com * www.HealthMarkets.com Confidentiality Notice: This e-mail message may contain confidential or proprietary information. If you are not the intended recipient, please contact the sender by reply e-mail and destroy all copies of the original message. HealthMarkets(r) is the brand name for products underwritten and issued by the insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance Company(r), Mid-West National Life Insurance Company of TennesseeSM and The MEGA Life and Health Insurance Company.SM -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER- l...@listserv.uga.edu] On Behalf Of John Gilmore Sent: Monday, August 27, 2012 10:20 AM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: which instructions should I use? Register contents that are a multiple of 4 are all of the form x...xx00 Inclusive ORing such a value with the mask 1...1100 and testing the result for equality with this same mask then yields a simple, low-overhead test for a multiple-of-four value. --jg On 8/27/12, McKown, John john.mck...@healthmarkets.com wrote: Thanks for the technique. I'm not sure that I like the NILL instruction at this point. It could change an invalid (as in not planned for) RC into a valid RC. Looks like maybe I could use TMLL to just test. (TMLL R15,X'000C') -- John McKown Systems Engineer IV IT Administrative Services Group HealthMarkets(r) 9151 Boulevard 26 * N. Richland Hills * TX 76010 (817) 255-3225 phone * john.mck...@healthmarkets.com * www.HealthMarkets.com Confidentiality Notice: This e-mail message may contain confidential or proprietary information. If you are not the intended recipient, please contact the sender by reply e-mail and destroy all copies of the original message. HealthMarkets(r) is the brand name for products underwritten and issued by the insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance Company(r), Mid-West National Life Insurance Company of TennesseeSM and The MEGA Life and Health Insurance Company.SM -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER- l...@listserv.uga.edu] On Behalf Of Martin Truebner Sent: Monday, August 27, 2012 8:15 AM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: which instructions should I use? John, you still need base+displacement desire for an index register; They come in most cases when there is space in the nibbles for it. But for the case you cited there is no need to cover code in procedure division with a base. (Dynamic storage and literalpool do have a base!) -Here is how: CALL PROGRAM,(PARM1,PARM2),VL CHI R15,=Y(MAXENTRIES) JH INVALID_RC LR15,=A(RC0,RC4,RC8,RCC)(R15) BR R15 Your addon (check for a valid rc) could also be done with this NILL R15,X'000C' as a result you only have valid combinations left over (Yes I cheated and added an entry for C). -- Martin Pi_cap_CPU - all you ever need around MWLC/SCRT/CMT in z/VSE more at http://www.picapcpu.de
Re: which instructions should I use?
John McKown wrote: As an example of (1), I quite often do: CALL PROGRAM,(PARM1,PARM2),VL CHI R15,=Y(MAXENTRIES) JH INVALID_RC B*+4(R15) START JRC0 JRC4 JRC8 MAXENTRIES EQU *-START/4 There's no need for a based branch: just write JH INVALID_RC (as before) LARL 0,START AR 15,0 BR 15 START JRC0 JRC4 JRC8 You can check that the return code is a multiple of 4 with a TMLL instruction: TMLL 15,B'0011' JNZ BadRetCode
Re: which instructions should I use?
TMLL is better because more compact, assuming that John McKown---We're in a thicket of Johns---wants to use such an instruction. --jg On 8/27/12, John Ehrman ehr...@us.ibm.com wrote: John McKown wrote: As an example of (1), I quite often do: CALL PROGRAM,(PARM1,PARM2),VL CHI R15,=Y(MAXENTRIES) JH INVALID_RC B*+4(R15) START JRC0 JRC4 JRC8 MAXENTRIES EQU *-START/4 There's no need for a based branch: just write JH INVALID_RC (as before) LARL 0,START AR 15,0 BR 15 START JRC0 JRC4 JRC8 You can check that the return code is a multiple of 4 with a TMLL instruction: TMLL 15,B'0011' JNZ BadRetCode
Re: which instructions should I use?
I also use the CL to catch negatives. One of those tricks I got from this list. Why the LTR? I don't know. I guess the reason is that I don't hardly ever use an 'and' so I failed to notice that NR set the correct condition code when I wrote this many years ago. Tony Thigpen -Original Message - From: Gerhard Postpischil Sent: 08/27/2012 02:29 PM On 8/27/2012 1:19 PM, Tony Thigpen wrote: Your code requires 2 scratch registers. The following uses just 1 scratch register and does not require literal storage: LA R0,3 NR R0,R15 LTR R0,R0 BNZ BAD_RC Why do you need the LTR? NR sets the condition code. When I bother to add check code (mostly non-IBM calls), I use CL R15,=A(maxvalue) BH error this test catches negative returns as well. Gerhard Postpischil Bradford, VT
Re: which instructions should I use?
On Mon, 27 Aug 2012 14:13:12 -0500 McKown, John john.mck...@healthmarkets.com wrote: :Very nice! I'll just eliminate the LTR as other posts have shown and use the AR R15,0 / BR R14 that Mr. Ehrman showed as well. I first came up with my solution when I was a wee, young sysprog and have never bothered to change. If it ain't broke, don't fix it. : : CALL ... : LTR R15,R15 : JM BAD_RC : CHI R15,MAXJUMPS : LA R0,3 : NR R0,R15 Why not TMLL R15,3 : JNZ BAD_RC : LARL R0,JUMPS : AR R15,R0 : BR R15 :JUMPS J RC0 : J RC4 : J RC8 :MAXJUMPS EQU (*-JUMPS)/4 : :I did the LTR / JM to include checking a negative RC, instead of the CL Tony used, because I wanted to avoid needing a base register. Yes, I know I need one for the literal pool if I have any literals. I try to avoid literals as much as possible by using immediate instructions where the value is defined in an EQU. -- Binyamin Dissen bdis...@dissensoftware.com http://www.dissensoftware.com Director, Dissen Software, Bar Grill - Israel Should you use the mailblocks package and expect a response from me, you should preauthorize the dissensoftware.com domain. I very rarely bother responding to challenge/response systems, especially those from irresponsible companies.
Re: which instructions should I use?
Not sure that arch level that instruction is at. We are going to stay on the z9BC we have until it is eliminated from our environment. -- John McKown Systems Engineer IV IT Administrative Services Group HealthMarkets(r) 9151 Boulevard 26 * N. Richland Hills * TX 76010 (817) 255-3225 phone * john.mck...@healthmarkets.com * www.HealthMarkets.com Confidentiality Notice: This e-mail message may contain confidential or proprietary information. If you are not the intended recipient, please contact the sender by reply e-mail and destroy all copies of the original message. HealthMarkets(r) is the brand name for products underwritten and issued by the insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance Company(r), Mid-West National Life Insurance Company of TennesseeSM and The MEGA Life and Health Insurance Company.SM -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER- l...@listserv.uga.edu] On Behalf Of Binyamin Dissen Sent: Monday, August 27, 2012 3:01 PM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: which instructions should I use? On Mon, 27 Aug 2012 14:13:12 -0500 McKown, John john.mck...@healthmarkets.com wrote: :Very nice! I'll just eliminate the LTR as other posts have shown and use the AR R15,0 / BR R14 that Mr. Ehrman showed as well. I first came up with my solution when I was a wee, young sysprog and have never bothered to change. If it ain't broke, don't fix it. : : CALL ... : LTR R15,R15 : JM BAD_RC : CHI R15,MAXJUMPS : LA R0,3 : NR R0,R15 Why not TMLL R15,3 : JNZ BAD_RC : LARL R0,JUMPS : AR R15,R0 : BR R15 :JUMPS J RC0 : J RC4 : J RC8 :MAXJUMPS EQU (*-JUMPS)/4 : :I did the LTR / JM to include checking a negative RC, instead of the CL Tony used, because I wanted to avoid needing a base register. Yes, I know I need one for the literal pool if I have any literals. I try to avoid literals as much as possible by using immediate instructions where the value is defined in an EQU. -- Binyamin Dissen bdis...@dissensoftware.com http://www.dissensoftware.com Director, Dissen Software, Bar Grill - Israel Should you use the mailblocks package and expect a response from me, you should preauthorize the dissensoftware.com domain. I very rarely bother responding to challenge/response systems, especially those from irresponsible companies.
Re: which instructions should I use?
From: John Gilmore jwgli...@gmail.com Sent: Tuesday, 28 August 2012 1:19 AM Register contents that are a multiple of 4 are all of the form x...xx00 Inclusive ORing such a value with the mask 1...1100 and testing the result for equality with this same mask then yields a simple, low-overhead test for a multiple-of-four value. It's sufficient to test for the low-order 2 bits being zero.
Re: which instructions should I use?
How about no registers? TM X+3,3 BNZ ... - Original Message - From: Tony Thigpen t...@vse2pdf.com Sent: Tuesday, 28 August 2012 3:19 AM Your code requires 2 scratch registers. The following uses just 1 scratch register and does not require literal storage: LA R0,3 NR R0,R15 LTR R0,R0 BNZ BAD_RC (I still have to use code that works on boxes without the jump instructions.) Tony Thigpen
Re: which instructions should I use?
From: McKown, John john.mck...@healthmarkets.com Sent: Tuesday, 28 August 2012 1:34 AM Destroys the contents of R15, so I guess I would load R15 into, say, R0 and do the OR operation on R0. However, I'm on a z9 and will likely never be on anything more advanced. So I'll need to load the mask into another register, say R1. That would either require an L R1,variable or literal (=X'FFFC'), or do an: AHI R1,X'04' followed by an LCR R1,R1. I don't know which of those is better. I guess the Load would be more easily understood by even a novice. LR R0,R15 L R1,=A(-4) OR R0,R1 CR R0,R1 JNE BAD_RC Simpler is: SLL 15,30 LTR 15,15 BNZ ... or, if worried about preserving R15 LR0,15 SLL 0,30 LTR 0,0 BNZ ...
Re: which instructions should I use?
On 2012-08-27 11:26, John Ehrman wrote: There's no need for a based branch: just write JH INVALID_RC (as before) LARL 0,START AR 15,0 BR 15 START JRC0 JRC4 JRC8 Assuming the content of R15 (and R0) is expendable. Otherwise a BR where one loads the register with an offset from the current CSECT is hardly different from a based branch.) You can check that the return code is a multiple of 4 with a TMLL instruction: TMLL 15,B'0011' JNZ BadRetCode Nice. -- gil
Re: which instructions should I use?
On 2012-08-27 19:36, Robin Vowels wrote: or, if worried about preserving R15 LR0,15 SLL 0,30 LTR 0,0 BNZ ... Doesn't SLL set the condition code? -- gil
Re: which instructions should I use?
On 2012-08-27 12:31, Bill Fairchild wrote: LA R0,3 NR R1,R15 BNZ BAD_RC And in 3 or 4 years, IBM will have implemented all of this logic in a single instruction with an opcode something like this: LANRBNZ. And the processors will have over 4K different opcodes by then. The Data General Nova had no condition code in the PSW and no conditional branch. Rather, each RR instruction had a condition mask to cause the next instruction (usually a branch) to be skipped if the result of the operation met thecondition. Plus another bit in each RR instruction to suppress loading of the target register. -- gil
Re: which instructions should I use?
From: Paul Gilmartin paulgboul...@aim.com Sent: Tuesday, 28 August 2012 12:48 PM On 2012-08-27 19:36, Robin Vowels wrote: or, if worried about preserving R15 LR0,15 SLL 0,30 LTR 0,0 BNZ ... Doesn't SLL set the condition code? No. But SLA does.
Re: which instructions should I use?
I probably would have used: CLI 0(1,R3),X'00' JNE ... No literal. -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On Behalf Of Frank Swarbrick Sent: Friday, August 24, 2012 1:48 PM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: which instructions should I use? Assembler newbie here; please be gentle. Given the following: - r7 points to the input parm list - r2 indexes the input parm list I want to see if the first byte of the parm I am interested in is x'00'. l r3,0(r2,r7) r3 - current parm I can do this: clc 0(1,r3),=x'00' jne delimited_string Or I can do this: llc r9,0(,r3)r9 = parm byte 0 clijne r9,x'00',delimited_string How do I decide which is better? The second one uses more modern instructions, and 1 extra byte, but no literal. Frank
Re: which instructions should I use?
Oops. I meant: CLI 0(R3),X'00' -Original Message- From: Randy Schafer Sent: Friday, August 24, 2012 1:54 PM To: 'IBM Mainframe Assembler List' Subject: RE: which instructions should I use? I probably would have used: CLI 0(1,R3),X'00' JNE ... No literal. -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On Behalf Of Frank Swarbrick Sent: Friday, August 24, 2012 1:48 PM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: which instructions should I use? Assembler newbie here; please be gentle. Given the following: - r7 points to the input parm list - r2 indexes the input parm list I want to see if the first byte of the parm I am interested in is x'00'. l r3,0(r2,r7) r3 - current parm I can do this: clc 0(1,r3),=x'00' jne delimited_string Or I can do this: llc r9,0(,r3)r9 = parm byte 0 clijne r9,x'00',delimited_string How do I decide which is better? The second one uses more modern instructions, and 1 extra byte, but no literal. Frank
Re: which instructions should I use?
Is there any really difference between a BNE and a JNE ? Scott ford www.identityforge.com On Aug 24, 2012, at 2:55 PM, Randy Schafer randy.schafer.a...@statefarm.com wrote: Oops. I meant: CLI 0(R3),X'00' -Original Message- From: Randy Schafer Sent: Friday, August 24, 2012 1:54 PM To: 'IBM Mainframe Assembler List' Subject: RE: which instructions should I use? I probably would have used: CLI 0(1,R3),X'00' JNE ... No literal. -Original Message- From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On Behalf Of Frank Swarbrick Sent: Friday, August 24, 2012 1:48 PM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: which instructions should I use? Assembler newbie here; please be gentle. Given the following: - r7 points to the input parm list - r2 indexes the input parm list I want to see if the first byte of the parm I am interested in is x'00'. l r3,0(r2,r7) r3 - current parm I can do this: clc 0(1,r3),=x'00' jne delimited_string Or I can do this: llc r9,0(,r3)r9 = parm byte 0 clijne r9,x'00',delimited_string How do I decide which is better? The second one uses more modern instructions, and 1 extra byte, but no literal. Frank
Re: which instructions should I use?
Frank, as Randy already said CLI 0(R3),0 JNE NOT_ZERO or TM 0(R3),X'FF' JNZ NOT_ZERO will do without forceing the reader to go to POP and find out what you ment (and I would for certain use one of the new instructions, if I can replace two against one (or better)). -- Martin Pi_cap_CPU - all you ever need around MWLC/SCRT/CMT in z/VSE more at http://www.picapcpu.de
Re: which instructions should I use?
On 24 August 2012 14:48, Frank Swarbrick frank.swarbr...@yahoo.com wrote: Assembler newbie here; please be gentle. Given the following: - r7 points to the input parm list - r2 indexes the input parm list By fours, I trust... I want to see if the first byte of the parm I am interested in is x'00'. l r3,0(r2,r7) r3 - current parm I can do this: clc 0(1,r3),=x'00' jne delimited_string The traditional way to do this is to use CLI, i.e. CLI 0(R3),X'00' This is likely to be a bit faster than the CLC, because there is but a single storage reference. With the CLC, in the worst case the literal =X'00' could be in another page, not in the cache, and even paged out. But really there's very little in it for something you don't do very often. Of course with CLC you can later change the program to compare more than one byte, should this be necessary. Or I can do this: llc r9,0(,r3)r9 = parm byte 0 clijne r9,x'00',delimited_string Well... This may be faster, but only trivially so. It may be slower. It uses another register. Is it as clear and readable? I don't know; I haven't got every one of the shiny new instructions memorized, so upon encountering this code I'd have to look it up to be sure of what it's doing. How do I decide which is better? If your code is not going inside a loop that is executed very frequently, write using instructions and instruction sequences that are clear and well known. Someone will thank you for it later, even if you never meet that someone. Tony H.
Re: which instructions should I use?
IBM Mainframe Assembler List ASSEMBLER-LIST@LISTSERV.UGA.EDU wrote on 08/24/2012 03:11:25 PM: From: Scott Ford scott_j_f...@yahoo.com Is there any really difference between a BNE and a JNE ? depends if you have a base register for your code or not. BNE fails if no base register. JNE fails if label branched to is not in the same CSECT or is more than +/-65k bytes away. - The information contained in this communication (including any attachments hereto) is confidential and is intended solely for the personal and confidential use of the individual or entity to whom it is addressed. If the reader of this message is not the intended recipient or an agent responsible for delivering it to the intended recipient, you are hereby notified that you have received this communication in error and that any review, dissemination, copying, or unauthorized use of this information, or the taking of any action in reliance on the contents of this information is strictly prohibited. If you have received this communication in error, please notify us immediately by e-mail, and delete the original message. Thank you
