Re: [kicad-users] Connecting Voltage Regulators.

2010-07-29 Thread Pedro Martin
Hi John,
Maybe it is a warning, telling you that 2 outputs are connected together 
because the GND pins of both devices are defined as output.

If it is an error, change the pin definition to power pin. You will also be 
warned, but this time you can ignore the warning because you are sure that 
both GNDs can be connected together without any problem.

Regards,
Pedro.

 Hi
 
 I have a 7805 and 7815 with the GND of each connected together.
 
 I am getting an error 
 
 ErrType(5): Conflict problem between pins. Severity: error
 
 @ (163.830 mm,92.710 mm): Cmp #IC035, Pin GND (output) connected to 
 
 @ (165.100 mm,102.870 mm): Cmp #IC034, Pin GND (output) (net 8) 
 
 Any ideas?
 
 Cheers
 
 John
 
 
 




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Re: [kicad-users] Problemas con relleno de zonas

2010-06-02 Thread Pedro Martin
Hola:

El relleno de zonas ha ido cambiando ligeramene de versión a versión.
Yo no he probado la que estás ussando. De todas formas, intenta definir 
también la zona que invade toda la capa, a ver si de esta manera te lo 
permite.

Saludos,
Pedro.

 Buenas.  Estoy teniendo problemas al rellenar zonas.
 En una capa tengo definida una zona por sus limites y asociada a una red.  
En la misma capa necesito hacer otra zona rellena que incluya el resto de la 
capa, sin que se superponga a la zona anteriormente creada.
 En versiones anteriores de KiCAD esto lo lograba simplemente haciendo un 
relleno sin definir los límites: la zona que invadía toda la capa lo hacía 
sin pisar las zonas ya creadas y asociadas a otras reds.
 Estoy usando la versión 2010-4-21 BZR23xx, y no logro hacerlo de igual 
manera.  No se si con la nueva versión el procedimiento es otro o se trata de 
un bug.
 Muchas Gracias.
 



Re: [kicad-users] Passive components suddenly have pins numbered A, B instead of 1,2

2010-06-02 Thread Pedro Martin
Hi,

Try to be sure that pins in both component (eeschema) and footprint (pcbnew) 
have the same name.

Pedro.

 Started a new project and suddely no resistors or caps would connect in 
PCBNew. Turned out that the netlist had:
 
  ( /4C05FC73 C2 C7 C
   ( A ? )
   ( B GND )
  )
 
 Efter changing them (there were just a few)
 
  ( /4C05FC73 C2 C7 C
   ( 1 ? )
   ( 2 GND )
  )
 
 It works, but if I rewrite the net file from EESchema, it reverts back. What 
has happened? It is probably something silly I have done, but I cabnnot find 
out what?
 



Re: Sv: [kicad-users] Creating a PCB

2010-04-22 Thread Pedro Martin
Hi,

Check if pin names are 1,2,3 on the component and A,B,C on the footprint.
If so, change the footprint with the module editor (or the component with 
eeschema editor)

Pedro.

 Did you run a DRC (Design Rules Check) on the schematic before moving the 
netlist to PCBNew?
 
 - Anders Gustafsson
   Engineer, CNE6, ASE
   Pedago, The Aaland Islands (N60 E20)
   www.pedago.fi
   phone +358 18 12060
   mobile +358 40506 7099
   fax +358 18 14060
  
 
 
  bror brorikubbe...@yahoo.com 2010-04-22 19:19 
 Hello! Every body.
 when I have med a schematic, and moved it to a PCB, and start to place the 
component on its place one the PCB. There is components that have no 
connections to other components. Way?
 The components is TO-3`s.
 
 
 




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question.
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Kicad.
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Re: [kicad-users] Wire connections will not connect to components

2010-04-19 Thread Pedro Martin
Hi,

Which is the error message?
As the square on the wire has dissapeared, it seems the connection has been 
reached.

Regards,
Pedro.

 I don't think it's a grid problem.  I did try what you suggested.  I 
 increased the grid to it's highest visible resolution, .005 (5 mils), 
 the the same problem still persists.
 
 screenshot-1
 
 This image I created the wire from the resistor to the pin 7 on the IC.
 
 
 screenshot-2
 
 Here I reversed the creation, from pin 7 to the resistor.
 
 
 Paul
 
 
 
 
 
 
 
 
 On 04/19/10 12:55 PM, Pedro Martin wrote:
  Hi,
 
  Then is not a metric problem but a grid problem. Change to a smaller grid
  untill both terminals fit the grid.
 
 
 
 




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Re: [kicad-users] Force netnames

2010-04-09 Thread Pedro Martin
Hi,

In Eeschema, try to place a net name on a wire.

Regards,
Pedro.

 I've asked this before but didn't get any answers so I thought I'd try 
again.
 
 Is there any way to force a net to keep a certain name? Does anyone know how 
eeschema decides what name to use when generating the netlist? Are there any 
tricks to make it more likely that one name will be chosen over another?
 
 The background is that I've joined two nets, lets say VCC and VDD. When I 
generate the netlist it seems random which of those two names ends up in the 
netlist. Since I have several copper areas on the PCB, it's a pain to rename 
them all because the net changed from VCC to VDD.
 
 Replacing the names using Notepad is one suggestion, but not a very good 
one. It tends to mess up the project.
 
 /A
 
 
 



Re: [kicad-users] pcb without schema

2010-04-07 Thread Pedro Martin
Hi,

of course it is possible to do it. Just disble the DRC and begin to add 
footprints.
Anyway, creating the schema is really easy and you are going to waste with 
pcbnew the time you save before. The most important thing you will lose is 
the ratsnest.

Regards,
Pedro.

 Hi
 
 I'm new to the group.  I built a 70 foot long signal cable with temperature 
sensors and switches arrayed along it.  I use past tense because 23 June of 
last year a lightning strike came through and knocked the whole thing out.  
Nice big rip full length on a tree in front of the house.  So instead of 
doing functional circuitry I have decided to use pcb's and put lightning 
protection devices on the boards.  Need about 10-14 boards.
 
 The board is very simple and all the driving signals are at the computer end 
of the signal line.  Is this all beginning to sound like 1-wire?
 
 So how do I build this board in pcbnew without a schema? I looked at the pdf 
for pcbnew but it assumes schema?  Can I just make a 2 X 8 inch pcb outline 
and go from there?  Has anybody done this before?
 
 Thanks
 
 George Dalla Betta
 



Re: [kicad-users] ERC problem

2010-03-16 Thread Pedro Martin
Hi,
Some months ago, we discussed a similar problem. The solution was to replace 
all bus labels in horizontal position. We do not know why it worked this way.

I hope this trick may help you.

Pedro.

 I have a schematic with 8 sheets.
 I have some bus going from one sheet to another sheet through global labels.
 When I make an ERC, I have a lot of errors.
 I updated to the rc5 2 weeks ago and fix this problem by deleting and 
recreating the connections.
 I upgraded to last stable version of march 14 today, and have the problem 
coming back.
 When I erase and recreate a global label, the result is random, sometimes I 
have the same errors , some times not, sometimes it creates errors on other 
pins ???
 
 Any idea ?
 
 




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Re: [kicad-users] resolving names

2010-03-08 Thread Pedro Martin
Hi,

The correct method is changing pin names on the schematic symbol or on the pcb 
footprint, as you wish. What is important is to have the same name on both 
symbol and footprint.

Pedro.

 I sketched up a circuit that used a 7805 regulator. The schematic symbol had 
Vin, Gnd, and Vout for the pin names (and for the numbers, too).  The 
corresponding PCB footprint had pins 1, 2, and 3.  These were all in the 
standard installation libraries.
 
 I only noticed this since no ratlines appeared when moving the footprint 
about.  My quick solution was to create a new symbol with the pins renamed to 
match the footprint.
 
 What is the correct method to resolve pin names between footprints and the 
symbols?
 
 Thanks,
 --Jim
 



Re: [kicad-users] Kicad and GPL license

2010-01-04 Thread Pedro Martin
Hi,
The programm is GPL. Your designs are yours and you can apply the license you 
want.

Pedro.

 Hi,
  I also wanted to know how the Kicad licensing works, is it just the source 
code that is GPL or all schematics created from Kicad also are GPL ?
 and how about the component libararies ?
 
 Thanks in advance
 Regards
 yukku
 
 
 



Re: [kicad-users] Help with routing

2009-12-24 Thread Pedro Martin

 My transistor has a footprint using SOT23EBC, which is a simple surface
 mount SOT23 3 pad.  1 is the Base, 2 is the Emitter, and 3 is the Collector.
 I've tried several things with naming the connections as a net, etc.  I'm
 getting nowhere.  What am I missing?


SOT23EBC surely calls pins E, B and C instead of 1,2 and 3 in the component.

You should change pin names to be the same in both the component and the 
footprint. Edit one of them to do it.

Pedro.


Re: [kicad-users] Re: A zone generator bug?

2009-12-05 Thread Pedro Martin
Hi,
I use Kubuntu, but I always install Kicad this way:

** Under Linux:

You must be root.
goto /usr/local

Untar kicad.tgz : tar zxvf kicad.tgz

The main program is /usr/local/kicad/bin/kicad
If you use KDE, users can copy the shortcut /usr/local/kicad/bin/kicad.desktop
in user home directory/Desktop and use it to run kicad.


In the example, kikad.tgz stands for one of these files:
kicad-2009-02-16-final-CENTOS_4.4.tgz
kicad-2009-02-16-final-UBUNTU_8.10.tgz

Good luck,

Pedro.
 Yes, I know there is a new verion, but I don't know how to install it - the 
old version comes with the repositories in my distro PCLinuxOS.
 I think the new version includes the zones in the DRC control (my version 
does not) , then it is easy to discover if this bug appears also in the new 
version ( if I just do an DRC test after the zones are made).
 
 Jens
 
 
 --- In kicad-users@yahoogroups.com, Pedro Martin pki...@... wrote:
 
  Hi,
  
  I have not studied your problem, but some zone bugs were fixed in later 
  versions. Try 2009-02-16 version.
  
  Pedro.
  
   I've just encountered a very strange thing when generating a Zone in 
PCBnew. 
  [version: ** PCBNEW  (sept 1992 .. 2006) **Build Version:PCBNEW 
  (2007-07-09) - Unicode version]
   
   I have choosen the finest pitch (grid: 0.120 mm) and Zone clearance 
0.444 
  mm. I had done first the GND zone, and next I was about to do the VCC 
zone. 
  But it doesn't only generate the ordinary zone, but it also makes some 
very 
  broad tracks that in some places override the zone clearance space, and in 
  one spot actually shortcuts VCC to the GND zone.
   (I doscovered this after measuring zero ohms on the final product!)
   
   The faulty tracks belongs to the generated zone - they are not editable, 
but 
  disappear if I choose to delete the zone. 
   
   How can I avoid this to happen?
   
   I uploaded some screenshots where you can see the PCB with and without 
the 
  VCC Zone so you can understand what I mean.
   
   (pics: zone1.jpg, zone2.jpg, zone3.jpg and zone4.jpg at 
  
http://groups.yahoo.com/group/kicad-users/photos/album/1407660911/pic/list )
   
  
 
 
 



Re: [kicad-users] A zone generator bug?

2009-12-03 Thread Pedro Martin
Hi,

I have not studied your problem, but some zone bugs were fixed in later 
versions. Try 2009-02-16 version.

Pedro.

 I've just encountered a very strange thing when generating a Zone in PCBnew. 
[version: ** PCBNEW  (sept 1992 .. 2006) **Build Version:PCBNEW 
(2007-07-09) - Unicode version]
 
 I have choosen the finest pitch (grid: 0.120 mm) and Zone clearance 0.444 
mm. I had done first the GND zone, and next I was about to do the VCC zone. 
But it doesn't only generate the ordinary zone, but it also makes some very 
broad tracks that in some places override the zone clearance space, and in 
one spot actually shortcuts VCC to the GND zone.
 (I doscovered this after measuring zero ohms on the final product!)
 
 The faulty tracks belongs to the generated zone - they are not editable, but 
disappear if I choose to delete the zone. 
 
 How can I avoid this to happen?
 
 I uploaded some screenshots where you can see the PCB with and without the 
VCC Zone so you can understand what I mean.
 
 (pics: zone1.jpg, zone2.jpg, zone3.jpg and zone4.jpg at 
http://groups.yahoo.com/group/kicad-users/photos/album/1407660911/pic/list )
 



Re: [kicad-users] Creating new PCB footprint

2009-12-03 Thread Pedro Martin
Hi,

Before asigned a module to a component in cvpcb, the module (footprint) must 
exist in a library.

This library must be charged in your design.

In Preferences-Configuration you can add the library with the needed 
footprint.

Be sure that pin names are identical in the eeschema component and the pcbnew 
module.

Pedro.

 I just installed KiCAD and I need a 400 ball BGA package created to pair 
with my scm symbol but don't see how to add new packages in the CVpcb.  Any 
help to get me started would be appreciated.
 



Re: [kicad-users] Re: Making pads on proto board?

2009-11-24 Thread Pedro Martin
Hi,

Uncheck DRC ON inPreferences-general

Pedro.

 Yes, I can place parts, but i can't seem to add tracks in order to 
 connect pads.
 Unless there is a rats nest(from schematic) PCBnew won't let me
 connect pads with a track.
 I get an error, track to close to pad, or something similar.
 What tool are you using to place pads on a board?
 The only tool i could see was the track/via tool.
 
 --- In kicad-users@yahoogroups.com, kajdas kaj...@... wrote:
 
   I was hoping I could do this in just PCBnew, but alas no.
   I have to make a schematic first, which is ok.
  
  What do you mean?
  You should be able to place parts in PCBnew without the schematic.
  I place mounting holes  pads all the time without them being on the 
schematic.
  I also work on PCBs without the schematic, just the netlist from Orcad.
  M.
 
 
 



Re: [kicad-users] Drawing on PCBNEW

2009-11-23 Thread Pedro Martin
Hi,

In the new version do:

1. Click on the starting point with right button.
2. Release the right button and begin to draw.
Regards,

Pedro.

 My job is just to design new circuits and provide them as schematics. Then 
the product factories I cooperate with, do the rest mainly the drawing of the 
PCB layouts.
 
 So for many years I use, with thanks, Kicad (version 2007-01-15) to draw 
schematics only.
 Lately I liked to use PCBNEW to draw some layouts myself. First I downloaded 
the newest version (KiCad-2009-02-16-final-WinXP_autoinstall) and installed 
it on my PC that runs Windows XP.
 Perhaps by a mere coincidence, I liked first to draw a line (polygon) on the 
drawing layer. But the cursor while it looks like a pen, worked as a block 
selector instead. Obviously I had doubt that I am missing something so I 
returned back to the previous version on which, for the drawings, everything 
went fine.
 
 May I add that once (perhaps twice) and while trying to draw lines 
(polygons) on the new version (PCBNEW), the cursor suddenly started to do its 
job but I couldn't know what I did just before it.
 
 Since the old version is good for me, I wrote this message here just as a 
feedback (I usually read all messages here, and I don't remember reading 
about this... but I am sorry if my memory is short... I am 60 after all)
 
 



Re: [kicad-users] Sharing my projects with other people

2009-11-19 Thread Pedro Martin
Hi,
I have all my projects in my home and office computers.

The only thing I do is to copy the whole project folder from a computer to 
another. All components are in the cache file.

Anyway, it is not mandatory but it helps to have the same path for the 
libraries in both computers.

Pedro.

 How do I make a project portable, so that I can either give it to someone 
else, or use the project as the basis for starting a new one with a different 
name? 
 
 I've looked inside some of the project files and there are bunches of 
hard-coded directory paths that look like show stoppers.
 
 On my own computer, I've tried using an existing project as the basis for a 
new one by copying the brd sch cache files into the new folder and saving the 
pro file with a new name. Also I tried starting a new pro and adding the 
existing files.
 
 I wound up with holes in the schematic from lib issues, and the same hard 
coded paths problem.
 
 I'd like to demo KiCad to other people, but I can't give them a sample 
project to play with.
 
 -Ed 
 



Re: [kicad-users] QI NANONOTE

2009-11-13 Thread Pedro Martin
Hola Carlos

 1. There is a way to use zones for connectivity ?
Yes. In fact, a zone must be connected to a net.

 2. as you see on pcb we use annular rings, we can make a pad with this
 shape? At present, we use an annular ring attached to one pad.
Of course, a pad can be a rectangle, a circle, an oval or a trapezoid. See the 
module editor.

 3. we find some problems when we try to move some wire, because we need to
 move components and wires manually.
Yes, with Kicad we move components and wires manually.

regards,
Pedro.


Re: [kicad-users] KiCad PCBnew 3D Display Crashes

2009-10-23 Thread Pedro Martin
Hi,

I don't know why are you using a 2008 version. Try with 
kicad-2009-02-16-final, last stable version.

In a very old version, about 2005, the 3D dislay problem was related with the 
color depth stated in the system, 24 or 32 was needed. But now I think it is 
not that case.

Pedro.

 Hello Everyone,
 
 I'm using KiCad version Build: (20080825c-final) on Ubuntu Jaunty 9.04. I'm 
also using PCBnew Build: (20080825c-final) on the same machines. Out of my 3 
machines running the same OS, only 1 runs the 3d Display without crashing. 
The other two crash the 3D Display by simply closing PCBnew. Are there any 
files that I can look at to get an idea on what is happening?
 
 This also happens when browsing CVpcb, 'view selected footprint', 3D.
 
 
 
 
 
 



Re: [kicad-users] Re: has anyone sent their designs to a fab company? what settings? I want to use ...

2009-10-19 Thread Pedro Martin
Hi,

As Kicar Gerber viewer has some limitations (although is works fine), I also 
use gerbv, from gEDA. Opensource and free.

Regards,
Pedro.

 Use Linux version of Kicad. It works perfect.
 Gerber viewer in Kicad is fine but it does not do all of the spacing tests.
 For that you have to use ERC checking in PCBnew.
 However, the PCB houses each have their own limitations and it is easier for 
me to use their checkers so that they flag any limitations they have.
 Martin
 
  NeonJohn j...@neon-john.com wrote: 
  
  
  Richard wrote:
   
   That said, I do recommend that you preview the Gerber files and the
   drill file using the free previewer ViewMate
   (http://www.pentalogix.com/). It's not FOSS but it is sort of a de
   facto industry standard. If everything lines up and looks correct in
   ViewMate then you're probably good to go.
  
  
  How does this compare to the gerber viewer included in KiCAD.  I'm a
  Linux user so it's not so easy to test software that won't run under
  Wine and this one won't.
  
  Thanks,
  John
  
  
  -- 
  John DeArmond
  Tellico Plains, Occupied TN
  http://www.neon-john.com-- email from here
  http://www.johndearmond.com -- Best damned Blog on the net
  PGP key: wwwkeys.pgp.net: BCB68D77
 



Re: [kicad-users] Components Not Connected in PCBnew

2009-10-15 Thread Pedro Martin
Hi,

Usually this type of error is due to a different pin numbers in the component 
(eeschema) and the module (pcbnew).

Check if pins are numbered, for example, 1,2,3 in the component and A,B,C in 
the module.

Pedro.

 I'm working on a dual H-Bridge motor controller Arduino shield. I have the 
circuit complete in EESchema and the ERC is happy and all that good stuff. In 
PCBnew, I'm able to import all my components by reading the netlist, but not 
everything is connected by the rat nest.
 
 Interestingly enough, its only the MOSFETs that didn't get connected. Eight 
TO220 and four TO92. Everything else seems to be connected correctly.
 
 Any ideas? I'm very new to KiCad (been using it for a whole 8 hours now), so 
it's very likely I've just done something wrong. I can post screenshots if 
that would help. Thanks!
 



Re: [kicad-users] Intro

2009-10-13 Thread Pedro Martin
Hi,

You can send the bug report to this list. Developers usually read all the 
messages.

Pedro.

 Is there a bug list anywhere?  I've found several in both versions but
 don't have any idea where to report them other than this list.
 
 Thanks,
 John



Re: [kicad-users] Edit modules

2009-10-07 Thread Pedro Martin
Hi,

Open pcbnew, 5th icon on the top bar.

Pedro.


 I have just completed my first schematic and really like the software. I 
have several componants that cannot be selected from the supplied footprint 
library, so I will have to build my own. I have found tutorials that talk 
about the Module Editor but cannot see a way to open the editor. I suspect 
that I am missing something basic but this one has been a stumper. Thanks
 
 
 



Re: [kicad-users] Re: Screen not refreshing when zooming or moving mouse cursor in pcbnew?

2009-10-01 Thread Pedro Martin
Hi,

I mean I do not need to refresh all the time. In my opinion, the screen is 
refreshed alright.

Pedro.

 Are you saying it alwase refreshes all the time I would load kubuntu instead 
of ubuntu 9.. or just you hit f3 or refresh to refresh  it works?
 
 --- In kicad-users@yahoogroups.com, Pedro Martin pki...@... wrote:
 
  Hi,
  I use Kubuntu 8.04 and Kicad works fine, no problem with refreshing.
  
  Pedro.
  
  
   I use KiCad with OpenSuSE 11.1, and I am having problems with the screen 
  refresh in pcbnew, or rather lack thereof.
   
   It doesn't look like the screen is refreshing correctly. When I zoom or 
just 
  move the mouse around, the crosshair leaves alot of graphical 
  artifacts/copies of itself. I will have to use F3/refresh almost 
constantly 
  to see what I am doing.
   
   Is this a common problem under Linux? Anything I can tweak?
   
  
 
 
 



Re: [kicad-users] ERC problem

2009-09-27 Thread Pedro Martin
Hi,

Redo annotate and select keep existing annotation. It will annotate al the 
#PWR.

Pedro.

 Hello All,
 I am trying to do an ERC check on my schematic, but unfortunately when I run
 it, I get a dialog box open up with the following message
 
 Item not annotated: #PWR
 
 I have placed PWR flags on all the power and ground nets.
 
 I generated an ERC report, but there was nothing to check, searching for
 markers doesn't tell me anything and no markers are visible on the
 schematic.
 
 What do I look for?
 
 Thanks
 
 Chris
 
 -- 
 IBA #15631



Re: Sv: [kicad-users] beginner question: power for 7400 gates?

2009-09-08 Thread Pedro Martin
Hi,

Then use Preferences-Options-Show Pins-Show alls

Regards,
Pedro.

 Hello Anders,
 
 thanks for your quick reply!
 I might be blind but where can I actually see pin7 of the 7400 in LibEdit?
 
 And, what do I do if I have e.g. several different VCC levels (e.g. for 
CMOS) with some chips working on 5V and others on 12V? If all supply pins are 
auto-connected to the net VCC, this will be a problem.???
 
 Thanks for helping me to understand.
 Tom
 
 --- In kicad-users@yahoogroups.com, Anders Gustafsson 
anders.gustafs...@... wrote:
 
  They are clearly marked VCC and GND when I look at them, thus they will 
automatically be connected to your VCC and GND nets, respectively. Ie place 
Power Ports fro Vcc and GND and connect them.
  
  
  
  
  - Anders Gustafsson
Engineer, CNE6, ASE
Pedago, The Aaland Islands (N60 E20)
www.pedago.fi
phone +358 18 12060
mobile +358 40506 7099
fax +358 18 14060
   
   tom_iphi i...@... 2009-09-08 09:23 
  
  When I create a schematic with 7400 nand gates, I add the gates with the 
place component function from the standard kicad 74xx library. But I never 
get to see the power supply pins for the 7400 chip. How do I connect those 
(VCC, GND)???
 
 
 



Re: [kicad-users] Creating zones on 2 layer board

2009-08-12 Thread Pedro Martin
Hi,

I do not fully understand your problem but I will try to help.

Select the GND signal, higlight a GND track. Create the first zone on a side, 
say component, and fill it. Check the zone has been created.

Repeat the whole process on the solder layer.
You should have 2 independent zones, both attached to GND.

Pedro.


 I am using version 20090216-RC6. I am trying to have a filled zone on the 
solder side and the component side of a 2 layer board. I am trying to connect 
them to gnd net. I move from layer to layer drawing fill zone and then 
filling zones. What I end up with is zone only on one layer.
 What am I doing wrong?
 Thank you for your help.
 



Re: [kicad-users] Strange problem with Zones and DRC

2009-08-11 Thread Pedro Martin
Hi,

In the last months I have not worked with zones, but I did it in the past.

In pcbnew I used to do this:

Connect all signals to VDD and Ground as though no zone is to be created, but 
having in mind the area where I will create it.
Only after all the circuit was routed, I created the zones.
All the extra tracks I used are now covered by the zone.

Regards,
Pedro.


 Yeah, that was my posting a month or so back.  I tried (or thought I tried) 
everything that was suggested, but nothing has worked.
 
 I have not tried hand-routing all of the VSS-layer vias together and all the 
VDD-layer vias together.  That seems to be a very error-prone proposition.
 
 Maybe I just don't understand the intent behind zones?  Maybe DRC is just 
broken when it comes to zones?  I hope the problem lies with me and not DRC 
as I need to get this board finished ASAP.
 
 thanks,
 Greg
 
 
 
 
 
 From: Andy Eskelson andyya...@g0poy.co.uk
 To: kicad-users@yahoogroups.com
 Sent: Monday, August 10, 2009 7:11:16 PM
 Subject: Re: [kicad-users] Strange problem with Zones and DRC
 
 I think I recall seeing a post on this matter before...
 
 If my memory is working correctly:
 (I've never done this myself)
 
 I think the trick is to connect the vias together with
 tracks, (obviously on your VDD of VSS layer) Then create your zone, that
 should then merge the lot together and well as giving the DRC something
 to work on.
 
 
 Looking back through the archive I've found the thread...
 
 Apparently with the latest version of the software things should connect
 up without the need for tracks, the thread started  at
 
 [kicad-users] PLEASE helpAnyone out there??? from gregory.dyess on
 15 jun 2009
 
 Might be worth a read.
 
 
 
 
 Andy
 
 
 
 
 
 On Mon, 10 Aug 2009 16:19:45 -0700 (PDT)
 Greg Dyess gregory.dy...@yahoo.com wrote:
 
  OOOPS, this only partially went out earlier, so please accept my 
appologies for the resend.  This problem is becoming a major stumbling block 
and is holding up a project I need to get moving.
  
  I am seeing this very strange issue when using zones (at least it seems 
strange to me).I have a 4-layer board with almost all surface mount.  L1 is 
almost entirely dedicated as my VDD layer by creating a zone connected to 
my VDD net on that layer.  L2 is the same thing with my VSS (Ground) layer.
  
  When I want to connect a pad or trace to VDD or VSS, I simply place a via 
in the trace.  According to the 3D view of the board, the hole plating is 
connected to the VDD or VSS layer as I would expect.  The photoplots (Gerber) 
files seem to indicate the connections are there as well.  I can export the 
file and run the online router and it sees the connections.  
  
  The problem is when I run the DRC, it complains that the pads are not 
connected and throws several errors.  With almost 500 connections to VSS or 
VDD, hand-routing all of them to the inner layers would be extremely 
cumbersome and error-prone.  Just ignoring all of the errors isn't a good 
option either as I could easily miss legitimate problems.
  
  I have tried doing a refill on all zones (which DRC is supposed to do 
automatically) and no differences.
  I have tried starting a trace from the component pad, switching to the L1 
or L2 layer and continuing the trace.
  Nothing seems to work.  It's as if DRC doesn't recognize connections to 
inner layers on anything other than feed-through pads.
  
  Does anyone have any ideas as to what I could be doing wrong?
  Is this a bug in the DRC?  (I admit I don't know where or how to check for 
bugs, so pointers to this information would be greatly appreciated as well.)
  
  Any help would be greatly appreciated as this is now the critical point in 
getting this board completed so I can start working on the firmware.  I have 
attached a simple schematic and board to demonstrate the problem.
  
  BTW, I am running what I think is the latest version from February of this 
year on an Ubuntu 9.04 platform.  I will try the project later on my Windows 
XP system to see if it is any different.
  
  Thanks in advance,
  Greg
  
  
       
 
 
 
 
 Please read the Kicad FAQ in the group files section before posting your 
question.
 Please post your bug reports here. They will be picked up by the creator of 
Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your 
symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the 
kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
Links
 
 
 
 



Re: [kicad-users] Parallel Power Out pins: best current practice ?

2009-06-19 Thread Pedro Martin
Hi,

Sencond option is better, but if you don't like it, do what I do: I check 
every warning and then I ignore the warnings relate to 2 power out in these 
particular cases. The netlist will be all rigth.

Regards,
Pedro.

 Some chips route a power output to multiple pins to share the current
 more equally. Marking all the pins a Power Out will incur ERC's wrath
 when connecting them to each other.
 
 What's the current best practice for dealing with this ? Two ideas:
 
 - make only one Power Out, the others Passive or such
 
 - tick off the Power Out vs. Power Out conflict in the ERC settings
 
 I don't particularly like neither of them. Any suggestions ?
 
 Thanks,
 - Werner



Re: [kicad-users] dismembering relays in eeschema

2009-06-15 Thread Pedro Martin
Hi,

Let's say your ralay has 5 pins, and 1 and 2 are the coil.
Make pins 1 and 2 to be part A. make pins 3,4,5 to be part B.

When using, the component, you can place part A and part B wherever you need 
in your design: I have place part A in a sub-sheet and part B in a different 
sub-sheet. You only need to tell eeschema that both parts belong to the same 
component by given them the same number.

regards,
Pedro.

 Hello,
 
 In the schematic tool, is it possible to create a relay such that the coil 
and each of the contact sets is a separate object?  For instance, I have a 
DPDT relay and I want to place one set of contacts in one place, the other 
set of contacts someplace else and the coil in yet another place. (This, of 
course, could be extended to any number of poles).
 
 I've fooled with eeschema's library tool a little bit and while I can make 
the contacts as distinct sub-parts I can't do the coil or vice-versa.  And 
yes, I did uncheck the common parts box.
 
 Alternatively, is it possible to do something like this: create a contact 
part and a coil part (as distinct parts).  Place the coil and however many 
contacts I need and somehow combine the coil and the contacts into one 
physical part?
 
 Any ideas?
 
 TIA,
 eric
 
 



Re: [kicad-users] Re: dismembering relays in eeschema

2009-06-15 Thread Pedro Martin
Hi,

I have found what you need.
On the top bar, the last icon on the rigth, edit pins part per part, solves 
your problem.

Pedro.

 Pedro (or anyone else),
 
 Here's what I did:
 In eeschema, start up the library editor and select
 New Component.
  
 Select the appropriate number of Parts per Component
 (three in this case because I was doing a DPDT relay).
 
 Draw part A (the coil).  A rectangular box w/ two leads.
 The Common to Units box is unchecked for all objects.
 
 Draw part B (contact block).  Now here, for some reason,
 the two leads from part A have migrated to part B.
 (Just the leads, not the rectangle, so I have two pins on
 an otherwise blank sheet.)
 
 If I try to clear these leads on part B they are also
 cleared on part A.  When I put the three leads on part B
 they migrate to part A.  (Note the Common to Units box
 is still unchecked.)
 
 Is this a bug or am I doing something wrong?  Am I taking
 the wrong approach?  BTW I'm using ver. 20090216-final
 on XP.
 
 Thanks,
 eric
 
 
 --- In kicad-users@yahoogroups.com, Pedro Martin pki...@... wrote:
 
  Hi,
  
  Let's say your ralay has 5 pins, and 1 and 2 are the coil.
  Make pins 1 and 2 to be part A. make pins 3,4,5 to be part B.
  
  When using, the component, you can place part A and part B wherever you 
need 
  in your design: I have place part A in a sub-sheet and part B in a 
different 
  sub-sheet. You only need to tell eeschema that both parts belong to the 
same 
  component by given them the same number.
  
  regards,
  Pedro.
  
 
 
 



Re: [kicad-users] Re: Unplated hole in module editor

2009-06-04 Thread Pedro Martin
Hi,

Even in the case we make a mechanical hole, the pcb make doesn't know which 
hole must not be plated, so I always tell him which are the unplated holes.

Pedro.

 I agree with Dennevi. There should be a mechanical hole setting. As
 extraordinarily as KICAD has evolved, can't keep finding ways around to
 accomplish basic tasks.
 
 Kind Regards,
 
 Sigi Paez
 
 
 On Thu, May 28, 2009 at 7:45 AM, dennevi denn...@live.se wrote:
 
 
 
 
  You could also draw a circle in the edges_pcb layer instead of using a
  pad. We do this with unplated holes and it works great with pcb
  manufacturers.
 
  I would really like if it were possible to choose between hole and
  mecanical in the pad settings, and if it were possible to generate one
  drill-file with plated holes and a second drill-file with just unplated
  mecanical holes.
 
  Thanks for a great application!
 
 
  --- In kicad-users@yahoogroups.com kicad-users%40yahoogroups.com,
  evlotus7 btre...@... wrote:
  
   Thanks for your suggestions. The easiest way for me will be to go with
  Pedro's first option, I can't reasonably unplate 1600 1mm holes by hand.
  
   Thanks,
  
   P.S. When I checked the pcbnew manual: 12.8.2 - Setting pad properties, 
I
  noticed two more pad type (hole and mecanical). What happen to those pad
  type in the 20090216-final of Kicad?
  
   Bruno
  
  
   --- In kicad-users@yahoogroups.com kicad-users%40yahoogroups.com, Andy
  Eskelson andyyahoo@ wrote:
   
or make it a smaller hole then run the correct size drill through it
afterwards. That will remove any THP.
   
Andy
   
   
On Tue, 26 May 2009 21:46:26 +0200
Pedro Martin pkicad@ wrote:
   
 Hi,

 I think the hole wall will be covered with copper anyway, maybe
  making a short
 circuit between layers.

 There are 2 ways:
 1. Tell the pcb maker which holes will be not plated.
 2. If you send the gerbers to an automatic pcb maker, such as
  pcbexpress, let
 them fill the hole and afterwards you can sand it with an abrasive
  file.

 And, as Abhijit says, with zero annular rings.

 Both ways have worked for us.
 Pedro.

  right clock on pad and go to pad edit. uncheck both the coper and
  component
 side. Hoping it may solve your problem.
 
  Abhijit
 
 


 

 Please read the Kicad FAQ in the group files section before posting
  your question.
 Please post your bug reports here. They will be picked up by the
  creator of Kicad.
 Please visit http://www.kicadlib.org for details of how to
  contribute your symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit
  the kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo!
  Groups Links



   
  
 
   
 



Re: [kicad-users] SMD anchor

2009-05-27 Thread Pedro Martin
Hi,

I create them as pads, usually with number 0 (zero).

Pedro.

 I'm building a PCB module for an SMD flex PC connector. In addition to the 
pins, there are two solder pads used for structural attachment. These are not 
connected to any net.
 
 Can these be created as pads, with no Pad Num or Pad Net Name (is this 
valid), or should these anchor pads be created as a graphic in the copper 
layer?
 



Re: [kicad-users] Re: Unplated hole in module editor

2009-05-26 Thread Pedro Martin
Hi,

I think the hole wall will be covered with copper anyway, maybe making a short 
circuit between layers.

There are 2 ways:
1. Tell the pcb maker which holes will be not plated.
2. If you send the gerbers to an automatic pcb maker, such as pcbexpress, let 
them fill the hole and afterwards you can sand it with an abrasive file.

And, as Abhijit says, with zero annular rings.

Both ways have worked for us.
Pedro.

 right clock on pad and go to pad edit. uncheck both the coper and component 
side. Hoping it may solve your problem.
 
 Abhijit
 



Re: [kicad-users] Changing size of a part in library changes the part in all my schemas!

2009-05-20 Thread Pedro Martin
Hi,

All you have to do is rename R and C.
In the libraries you have charge in the project, there are 2 compnents 
called R and 2 components called C.
Your projects will charge the first R and C components found in your 
libraries.
I think you do not want 2 different components with the same name.

Regards,
Pedro.

 I decided that R and C was too large and used libedit to make them 
smaller. I have done some projects before and when I opened them in eeschema 
the schemas had changed! The components was replaced by the new ones - and 
because the pins had moved they was all disconnected from the wires.  That 
means that all my old projects are destroyed! (well, I suppose files, are 
still unchanged - but I can't make a change without manually reconnecting all 
the parts)
 
 I have also made new/different shapes on some other components too like IC's 
and transistors.
 
 Is there a way to have other sizes on the components in new projects but 
keep the old ones in already made projects? To have local libraries for my 
projects? Or what's the best solution in this case?
 
 Is there a rule that one should #never change existing parts in library# - 
only make new ones, so it will comply to old projects?
 
 
 Another thing: When I start making a new board in pcbnew and import the 
netlist all the modules piles up on one spot and I have to sort them out 
manually... I've made a Java-program that uses the .sch file to change 
the .brd file such that the components will be placed out according to the 
position in eeschema - that makes the start much easier. Unfortunately I'm a 
beginner in Java programming and my GUI is not good or user friendly - none 
of you would accept it, otherwise I could have released the code here. Is 
there another way to automatically place modules in pcbnew?
 



Re: [kicad-users] Why this bus doesn't work?

2009-05-19 Thread Pedro Martin
Hi,

Please, upload yourproject.pro and yourproject.cache.lib files and I'll give 
it a look.

Pedro.

 Hi everyone!
 
 I'm trying to send a bus to a sub-sheet but I can't make it work! I'm using
 the right label: DO[0..15] but the ERC keeps saying that the pins are not
 connected and the pins are not connected in the pcb.
 
 I'm attaching the schematics (Gmail won't let me send the project zip, it
 says that contains an executable). Can someone take a look at it and tell me
 what am I doing wrong please?
 
 Thanks a lot.
 
 
 Jaime Alberto Silva
 Socio / Representante Legal
 SG Automatización Ltda.
 Pereira \ Risaralda \ Colombia



Re: [kicad-users] Re: gerber files produced by kiCad

2009-05-17 Thread Pedro Martin
Hi,

See pcbnew manual, chapter 5.
Mask: keep out varnish covering. To prevent varnish (or mask) covering of 
the pads.
Soldp: solder paste allow on smd components. Used to create screens and 
stencils to applicate solder paste.

Not exactly but almost, one is the negative of the other one.

Pedro.

 the real question is :
 
 what is the differnce between soldcomp maskcomp ???
 
 
 
 
 --- In kicad-users@yahoogroups.com, Julien Bayle julien.ba...@... wrote:
 
  hi all experts,
  
  I'm inside a big project: http://www.julienbayle.net/diy/protodeck/
  
  I finished one of the PCBs it requires and I'm very close to order it
  from BatchPCB.
  But I have some doubts with the gerber files.
  
  So, as usual, I read again the nice pcbnew.pdf, but some doubts remain.
  
  Can we check together I'm ok ??
  
  xx.copper.pho = all the copper for the bottom face (if component
  are on top face ..)
  .cmp.pho = all the copper for the top face (if component are on
  top face ..)
  .silkscmp.pho = silkscreen ... ok
  .silkscu.pho = silkscreen ... ok
  .soldpcmp.pho = what is it exactly  ???
  .soldpcu.pho = what is it exactly  ???
  .maskcmp.pho = what is it exactly?   is it soldermask ? i.e the
  place where the protection resin won't be ?
  .maskcu.pho = what is it exactly?   is it soldermask ? i.e the
  place where the protection resin won't be ?
  
  I'd like to make the last check before to order.
  
  help would be appreciated.
  
  Julien
 
 
 



Re: [kicad-users] Re: How to change layer of text on silkscreen?

2009-05-06 Thread Pedro Martin
Hi,

Maybe you are using a version with a bug. I have try to force a text to change 
from component silkscreen to copper silscreen and I couldn't.

Does it happen to all your components on the component layer?
Does it happen when printing, generating gerbers or in the pcbnew editor?

Regards,
Pedro.

  The silkscreen appears on the same side as the component. If the component 
is 
  on the botton layer, the correspondent text appears on the botton 
silkscreen 
  layer.
 
 I double checked this and unfortunately this is not the case.
 
 All these components are placed on component layer but their silkscreen text 
appears on copper layer anyway.
 
 
 



Re: [kicad-users] KICAD success stories ?

2009-04-21 Thread Pedro Martin
Hi,

We have used Kicad in all our designs since 2005.

For example, Altera FPGA 484 pins BGA, 0.0060 Clearance, 0.0039 mask 
clearance, 6 layers, 0402 capacitors, through vias.

All routings are hand made and boards are in production.

Regards,
Pedro.



 I am doing a small research if KICAD will be capable to create boards  
 with 8 or more layers using high density components like FBGA parts.
 It's about a mobile phone / smart phone from OpenMoko, that now will  
 be further developed in a comunity.
 
 As I remember if I am right they used Mentor PADS if that is what you  
 mentioned. For a comunity it should better be an open source tool than a
 closed source.
 
 That's why I am asking for success stories or simply stating 'we using  
 KICAD for our project X containing these parts:
 
 As in my other post:





Please read the Kicad FAQ in the group files section before posting your 
question.
Please post your bug reports here. They will be picked up by the creator of 
Kicad.
Please visit http://www.kicadlib.org for details of how to contribute your 
symbols/modules to the kicad library.
For building Kicad from source and other development questions visit the 
kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
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Re: [kicad-users] Telling eeschema that it is ok to connect some bidirectional pins to ground

2009-03-22 Thread Pedro Martin
Hi,

I think that Andy means the pins must be identified in Eeschema, not in the 
programming of the ARM.

With the components editor you can tell Eeschema whether the pins are 
bidirectional, power, etc.

Pedro.

 On Sat, Mar 21, 2009 at 1:39 AM, Andy Eskelson andyya...@g0poy.co.uk 
wrote:
  I would guess that the pins on the device have been incorrectly
  identified.
 
 Thanks for the suggestion, but the pins are correctly identified as
 bidirectional,
 they are just regular IO pins of the ARM processor. The preprogrammed
 application
 on the ARM (a FAT  filesystem implementation) reads the values of the
 pins in order
 to decide how to communicate with the host system. Wiring the pins to
 ground indicates
 that I want to use the uart. However, eeschema (rightly) does not like this.
 -- 
 Pertti




Re: [kicad-users] Re: Fiducilas

2009-03-19 Thread Pedro Martin
Hi,

I cannot understand why a mask clearance of 3 mm around the fiducial.

I have fiducials of 1 and 0.8 mm.
I create a zone with no cut-outs, I include the fiducials into the zone and 
kicad avoid the fiducials with the zone clearance value stated in the zone 
settings.

And I set the standard (for my manufacturers from 0.1 mm) mask clearance.

In fact, fiducials are placed closer than 2 mm to some components.

Excuse me, are you sure than the no-solder-mask area is 3 mm and not fiducial 
diametre + 0.3 mm?

Good luck with kicad,

Pedro.

 Hi all,
 
 Yes, agreed, and yes again. I am using a component that is just put into the 
schematics and appeears on the PCB. So far I am following the - normally - 
recommened approach to have the design consistent.
 When trying to make things the right way it comes to also following the 
manufacturers recommendation which is to have a pad of ~1mm diameter with a 
no-solder-mask area of about 3mm diameter. Yes, they usually can cope with 
other things, I just wanted to know what's possible in Kicad. Plus I am using 
a new manufacturer this time...
 The inner pad is no problem at all, just an unconnected pad wich is 
perfectly avoided by the copper fill. But when it comes to the ring, Kicad 
does not support pad-stacks or keep-out areas. Means, I can not create an 
area of no copper fill in the footprint (module). Yes, to avoid copper 
flooding, I can manually create zone cut-outs for each pad. There are only 2 
drawbacks to this. Firstly, they have to be done one by one and not only once 
at footprint (module) desing level. And secondly, they are not round because 
there is no circular shape available for zone cut-outs.
 All in all, it is of course not holding me back from making that PCB and 
having fiducials, the original question was more about whether there is an 
easier way that I didn't see.
 
 One word about workarounds and fighting/using a software package:
 One normally does not change CAD packages like underwear. Once you have 
commited to a particular one you soon start putting lots of effort into it to 
get your design working. In the case of Kicad, I put quite some time into 
generating a library that is suitable for my needs in supporting unique part 
stock numbers. 
 Which means, that for the next issue I will go for a workaround instead of 
dropping Kicad and going to the next CAD package.
 
 Cheers,  Heiko
 
 
 --- In kicad-users@yahoogroups.com, Pedro Martin pki...@... wrote:
 
  Hi all,
  
  My fiducials are smd modules with only 1 round pin.
  There are added into pcbnew from add module on the rigth menu.
  They are not in the netlist. When creating a zone they are avoided.
  
  Try and see how it works.
  
  Pedro.
  
  
   On Tuesday 10 March 2009 23:37:16 oecherexpat wrote:
Hi Dan,
   
 When designing the ring, see to that it is connected to an unused
 component part. This way, the zone filler will avoid it.
   
You mean like a pad? How can I connect it to a signal? It is not a pad 
but
just a drawing on the copper layer so Kicad wouldn't let me connect 
it 
  to
a signal. Originally, I was thinking of just adding another pad but it 
  must
be a ring and the only way to do this from what I can see is to have a 
  hole
in the middle :-(
   
Cheers,  Heiko
   
   If you DON'T want to connect it, fine - but you still need to define it 
for 
  zone 
   filler to avoid it.
   
   If you DO need to connect it, either turn off the design rule check - or 
do 
  it 
   as it should be done: Design  it as a pad with a connection on your 
  component. 
   If you don't want/need a connection, invent a dummy connection in 
the 
   library/module editor for you component.
   
   
   
   Trust me! ( I'm not a doctor )
   
   If you start tweaking the design checks and do a lot of workarounds, it 
   WILL(!) come back and bite you in the proverbial rectum!
   
   If you run into a small problem like this, solve it the right way - it 
takes 
   the same amount of time doing it correct compared to the time spent on a 
   tweak.
   
   Finally, use KiCad, don't fight it!
   
   //Dan, M0DFI
  
 
 
 




Re: [kicad-users] Re: Fiducilas

2009-03-19 Thread Pedro Martin
Hi Mihai,

I've seen the first link and yes, it says so.
I could understand a zone clearance around the fiducial and not a solder mask 
clearance. In any case, they are the experts, not me.

regards,

Pedro.

 On Thu, Mar 19, 2009 at 09:34:01AM +0100, Pedro Martin wrote:
 
  I cannot understand why a mask clearance of 3 mm around the fiducial.
 
 It is recommended to ensure the optical recognition by the
 placing machine:
 
 http://www.google.com/search?q=fiducial+mark+requirements
 
 Mihai




Re: [kicad-users] A little big problem : my LED is not in the net

2009-03-15 Thread Pedro Martin
Hi,

I think it is not your led's problem.
Maybe the pins in the Eeschema component are numbered 1 and 2; and in the 
Pcbnew module the are numbered A and B. Change the component or the module.

Pedro.

 Hi everybody,
 I've made a small schematic that doesn't give me any errors, but when I want 
to route my board, my LED cannot be linked to the rest of the components 
(there is not white lines). I tried to delete it from the schematics and put 
it back but it doesn't change anything.
 
 Can someone help me ? I can make the board without it but hey, what's a 
board without a led ? :)
 thanks for help !
 




Re: [kicad-users] Module

2009-03-13 Thread Pedro Martin
Hi,

Don'n worry about that. As Kicad uses inches internally, all sizes are 
mulptiples of 1/1 inches.

The pad is moved 13 micrometres from the desired place, you will not notice 
it. And neither the machine of the pcb maker, I think they are less accurate.

Pedro.

 Hi,
 
 Today im try to make a new module for my PCB but when im try to place pad 
position at x=5mm,y=0mm then the position not appare at location that i need 
x=5.0013mm, y=0mm. Event im try to change user grid size to 0.0001mm, it 
doesen't make any diffrent for that pad location. 
 
 Does anyone here know?
 Any help is appreciated.
 
 shah.
 




Re: [kicad-users] grid

2009-03-12 Thread Pedro Martin
Hi,

The grid uses internally inches although it can be seen in mm.

Use the user grid to adapt the grid to a desired value.
Pedro.

 Hi all,
 
 Im using kicad almost three month, and i see this software have alot of 
improvement from version 2008-08-25 until 2009-02-16-RC5. But when im try to 
working in mm so i have problem about the grid. So i think this software can 
make improvement in that section. Im realy hope that grid also can show in 
metrix because we not only using inchi every time.
 
 shah
 




Re: [kicad-users] Bug? Load module, modify name, save does not work as expected

2009-03-12 Thread Pedro Martin
Hello,

Instead of insert module into current board save it in an existing or a new 
library with its new name CP8XX.
Then, in pcbnew, edit the module CP8, click on change module(s) and type 
the name of the new module, say CP8XX.

The module should have been changed.

In order to use a module in pcbnew, it must belong to a library.

Regards,
Pedro.

 Hi,
 
 I just started using KiCAD, and I got into a problem that appears to be a 
bug in the PCB module editor. (Searching the Internet for more than an hour 
didn't give any answers.)
 
 Documentation says it is possible to create a new module (footprint) by not 
doing it from scratch but rather by using an existing one as starting point. 
So this is what I did:
 
 I have an empty board. I start the module editor, where I load the 
module CP8 from one of the libraries (that's just an example). I want to 
make a new module based on that. So I make some modifications and I also 
change the Reference text field to CP8XX-it's supposed to be a new 
module.
 Finally, I insert module into current board. It appears on the board.
 
 However, when I left-click on the module in the board, I see in the bottom 
part of the window that it still has the name CP8. Changing the Reference 
field _did not_ change the module name. When I now archive this board into a 
new library, my shiny new module appears as CP8 there, not as CP8XX.
 
 Does anyone here know more about this?
 Any help is appreciated.
 
 Best Regards,
 Mathias
 
 




Re: [kicad-users] Vias covered by solder resist(tented)

2009-03-12 Thread Pedro Martin
Helllo,
On gerber generation, have you checked the vias on mask box?

Pedro.

 Hi,
 I have been working with several PCB manufacturers who usually complain 
about the vias being covered with solder resist (I believe tented is the 
correct term). When I generate the gerbers from KiCAD, I can see that no 
openings for the VIAs are operated in the solder mask, which means that 
basically the vias are covered in solder mask (green stuff).
 Is there an automated  way to make solder mask openings around all the vias 
in the design (I mean, a different way than doing it manually for every via, 
with zones)?
 
 I am familiar with the Mask Clearance setting under the Dimensions- 
Traks and vias menu, but it does not seem to operate on vias.
 
 Thanks in advance,
 Cristian
 
 
 




Re: [kicad-users] Re: Fiducilas

2009-03-11 Thread Pedro Martin
Hi all,

My fiducials are smd modules with only 1 round pin.
There are added into pcbnew from add module on the rigth menu.
They are not in the netlist. When creating a zone they are avoided.

Try and see how it works.

Pedro.


 On Tuesday 10 March 2009 23:37:16 oecherexpat wrote:
  Hi Dan,
 
   When designing the ring, see to that it is connected to an unused
   component part. This way, the zone filler will avoid it.
 
  You mean like a pad? How can I connect it to a signal? It is not a pad but
  just a drawing on the copper layer so Kicad wouldn't let me connect it 
to
  a signal. Originally, I was thinking of just adding another pad but it 
must
  be a ring and the only way to do this from what I can see is to have a 
hole
  in the middle :-(
 
  Cheers,  Heiko
 
 If you DON'T want to connect it, fine - but you still need to define it for 
zone 
 filler to avoid it.
 
 If you DO need to connect it, either turn off the design rule check - or do 
it 
 as it should be done: Design  it as a pad with a connection on your 
component. 
 If you don't want/need a connection, invent a dummy connection in the 
 library/module editor for you component.
 
 
 
 Trust me! ( I'm not a doctor )
 
 If you start tweaking the design checks and do a lot of workarounds, it 
 WILL(!) come back and bite you in the proverbial rectum!
 
 If you run into a small problem like this, solve it the right way - it takes 
 the same amount of time doing it correct compared to the time spent on a 
 tweak.
 
 Finally, use KiCad, don't fight it!
 
 //Dan, M0DFI




Re: [kicad-users] Drill Holes

2009-03-06 Thread Pedro Martin
Hi,

There are 2 ways to solve this problem:
1. Create a wider copper ring.
2. Tell the pcb maker that these hole are not-metallized.

And number 3, tell the pcb maker not to take in account this kind of DRC error 
(I think this one wil not work).

Regards,
Pedro.

 Hi, I've just started using KiCad, and I managed to do a fairly large, 
complex layout.  Everything has worked pretty well (no major problems with 
library management, connectivity checking or anything) but...
 
 The PCB manufacturer's auto DRC flagged the mounting holes I created by 
making a Screw module with one pad where the pad diameter is the same as 
the drill diameter.  (The DRC error is annular ring too narrow.)  I 
understand why that is, but is there any way to fix it, other than having 
copper around _all_ drill holes?
 
 Thanks,
 d.
 




Re: [kicad-users] Re: New version of Kicad

2009-03-02 Thread Pedro Martin
Hi Daniel,

Please, read the manual :-)

You have placed the labels near the wire but not on the wire. The labels are 
floating in the air. Place the label on the wire and the little square of the 
label will vanish.

See the file essai-2.sch in your folder, label in R2.

Pedro.


 --- In kicad-users@yahoogroups.com, yajeed2000 da...@... wrote:
 
  --- In kicad-users@yahoogroups.com, Daniel CORRE daniel-corre@
  wrote:
  
   Hello Kicad users,
   
   Thanks to the developer group for the latest version (02/28/2009).
   
   I still have problem with Labels. HELP, please !
   
   Friendly,
   Daniel
  
  Hi,
  If 2 or more pins (or a short wire segment connected to the pin of a
  component) on a schematic have the label input for example they 
 are
  all assumed to be electrically connected. This can make a schematic
  much clearer to understand and less cluttered.
  Try this for yourself by making a simple circuit and then create the
  net list. Then import into PCBnew to check that the wires with the
  same label names are indeed connected electrically.
  
  David.
 
 Hi, David, and thank you to answer,
 
 This method seems not to run ! I have put a project called essai in 
 the folder called Daniel's problem. The files are a test of this 
 label's connect and doesn't work right.
 
 Can yu load the files and verify my work ?
 
 Thank you,
 Daniel
 




Re: [kicad-users] pcbnew undo

2009-03-02 Thread Pedro Martin
Hi Angelo,

Pcbnew has not an undo function. As you say, it exists for the module editor 
and there is an undo last delete available.
 i still cannot figure out if the PcbNew have an undo or not.
 I find many posts that says to see the FAQ, and also many other that
 says that undo in not implemented, that also an undelete is available.


Of course it should be a better application with a true undo. After some pcbs 
made with pcbnew, I can say that anyone can manage to route by hand a whole 
pcb without the undo function. There is the possibility to move a block with 
only modules or tracks or zones, etc.
When routing, many times the undo-redo track is replace by 
delete-redo_track_from_scratch. Also, writing down the position of an item 
and moving it again to the original position is a tecnique that helps.


 Unfortunately, working on a pcb without undo is a big problem.
 I have to save the file everytime i move e block of components,
 otherwise i will get crazy with the rect. selection to select again
 the block just been moved to brig it back, stuck between many other
 components.

If it is not implemented, I'm sure it is for the difficulty to do it. Three 
years ago there was not undo for eeschema or the editors either.
I think there has been a great effort to implement the current undos.

 I would imagine that it is an hard functionality, since if i move
 1000 components with nets and wires, all must be tracked down in the
 stack, but hopefully it can be done.
 
 Also, undo exist in module editor, in eeschema and in eeschema library
 editor.
 
Regards,
Pedro.



Re: [kicad-users] Re: Kicad tutorial LED is not connected

2009-02-27 Thread Pedro Martin
Hi,

Pin numbers in Eeschema component must match pin numbers in Pcbnew footprint.
You need to change  the component or the footprint with the editor.

Pedro.

 if I change the footprint from LED-3MM to LEDV then it is working.
 
 But LEDV was not recommended for the LED Part.
 
 Does someone know to change this fault in the lib of kicad lib 20090216?
 
 There is a mistake in pin number 1  2 and K  A
 
 Thomas
 




Re: [kicad-users] SOT23 and 8-SOIC footprints

2009-02-23 Thread Pedro Martin
Hi,

These footprints are OK.
the letters EBC or GBS are the pin numbers.
You can change them with the editor. They must match the pins in the Eeschema 
component.

Pedro.

 Hi everybody, I'm not sure if I've looked in the right places; I need
 a SOT-23 and 8-SOIC footprint.
 
 There are footprints SOT23EBC and SOT23GBS, but no regular SOT23. 
 
 Where do you get these footprints from?
 Thanks,
 Alexander
 




Re: [kicad-users] layer stack-up question

2009-02-08 Thread Pedro Martin
Hi Dan, Christian,

Viewing the pcb on my working table:

-Top layer = components layer, for axial components and smd.
-Next layer = 15 layer=Inner_L14
-...
-Last but one= 2 layer = Inner_L1
-Bottom layer = soldering or copper layer.

Anyway, both top and bottom are called copper layers (plural) because both 
layers are the only ones allowing copper. Copper layer (singular) is always 
bottom layer.

When creating vias, you must define the pair of layers for the via.

And be careful with your pcb maker. For example, for pcbexpress numbering is 
top, inner_1, inner_2 and bottom in a 4 layer pcb.

In pcbnew standard colours, bottom is green and top is red. All green texts 
are inverted.

I have never used buried or blind vias because of the low yield of pcbmakers, 
which means high prices.

And, Dan, nowadays there are some manufacturers that mount smd in both 
sides...

regards,

Pedro.


 Hi Dan, thanks for the reply.
 
 I did a little experiment that would seem to contradict what you are saying. 
I routed a track on the copper layer and then I placed a microvia. The 
router tool automatically changed to Inner_L1. For me, this means 
that copper is on top.
 I confirmed this by routing a track on the component layer. I then placed 
a microvia and the routing tool changed to Inner_L14. For me, this would 
indicate that component is on bottom.
 
 All these are proofs to the extent to which we accept that Inner_L1 is 
immediately below the Top layer and that Inner_L14 is immediately above 
bottom layer. 
 
 In addition, the attached screencapture would also suggest that copper is 
top and component is bottom.
 
 Still, this would not explain why in the libraries yo find the smd 
components defined on component layer, so this would indicate you being 
right, and my experiments being wrong.
 
 Has anybody encountered any problems when using blind or buried vias?
 
 Regards,
 Cristian
 
 --- On Sat, 2/7/09, Dan Andersson d...@andersson.co.uk wrote:
 From: Dan Andersson d...@andersson.co.uk
 Subject: Re: [kicad-users] layer stack-up question
 To: kicad-users@yahoogroups.com
 Date: Saturday, February 7, 2009, 3:47 PM
 
 The copper layer is the bottom layer and it's more natural to
 see it as such 
 when designing with axial components.
 
 The upper surface layer is called component layer.
 
 This is a surviving description from the pre-smd age.
 
 The reason for mirroring text on the copper layer i that you are looking on 
 the pcb from above, you are looking trough your component layer as your 
 viewpoint is above the top of the pcb board.
 
 The defacto standard of mounting SMD's is on the top - component side.
 
 YOU DO NOT PLACE SMD ON BOTH SIDES! Unless you solder it by hand.
 
 //Dan, M0DFI
 
 
 On Saturday 07 February 2009 12:26:37 Berceanu Cristian wrote:
  Hi,
  I have only recently started to use KiCAd and I think it is great.
  However, I encountered some...contradictions. I am having trouble in
  understanding which is the Top layer and which is the Bottom Layer. In
  the help of Pcbnew I found the following statements:
 
  1. They are the usual layers of work, used by the automatic router,
  on which tracks can be placed. Layer 1 is the copper (solder) layer.
  Layer 16 is the component layer. The other layers are the internal
  layers (L2 to L15).
 
  2. All text on the 'copper' (sometimes called
 'solder' or 'bottom')
  side must be mirrored.
 
  For me, the first statement would indicate that the layer called
  copper is the top layer. But the second statement says that
 copper
  is the bottom layer. If the copper is the bottom layer, then
 it
  comes in contradiction not only with statement 1, but also with the
  fact that the SMD footprints in the library have their pads defined on
  the component layer (and normally, one would expect the SMDs
 to be
  defined by default on top, and only when you mirror them, they get on
  bottom).
 
  So...which is Top and which is Bottom?
 
  Thank you for your help!
 
  Regards,
  Cristian
 
 
 
 
 
 Please read the Kicad FAQ in the group files section before posting your
 question.
 Please post your bug reports here. They will be picked up by the creator of
 Kicad.
 Please visit http://www.kicadlib.org for details of how to contribute your
 symbols/modules to the kicad library.
 For building Kicad from source and other development questions visit the
 kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups
 Links
 
 
 
 
 
 




Re: [kicad-users] How to edit drawing lines / elements

2008-12-19 Thread Pedro Martin
Hi,

1. Select the tool, circle for example
2. Right click on the center point for the circle
3. Release the mouse button
4. Draw the circle.

Pedro.


 Hi,
 
 I am using KiCad for a while now and I must say that I am more than happy 
with program. 
 There is just one think I couldn't figure out. 
 
 How can I edit a drawing line or a drawing circle?
 
 Example: 
 
 If I go to the Drawing OR Edges layer and draw a simple line or circle and 
use Edit drawing 
 from the context menu nothing happens. The manual says that a dialog box 
should open but 
 unfortunately this doesn't work.
 
 What am I doing wrong? Sorry if this is a kind of stupid question.
 
 I am using KiCad 20080825 from the sourceforge site under win XP. 
 
 Thanks in advance for ANY help to understand what I am doing wrong.
 
 Manuel  
 




Re: [kicad-users] Module Editor Crashing

2008-12-17 Thread Pedro Martin
Download the stable version from kicad's offical page:

http://www.lis.inpg.fr/realise_au_lis/kicad/

Link ftp:
ftp://iut-tice.ujf-grenoble.fr/cao/

Pedro.

 Thank you for your reply.   How do I establish which variant of 20080825 
 I have?   I downloaded my copy on 2Dec08, and the about box says 
 20080825-final (rather than a, b, or c).   The file size of the 
 installer I have (kicad-20080825.exe) is identical to that listed on 
 sourceforge as the current Windows binary.   Is that 20080825c?
 
 Regards,
 
 Robert.
 
 Pedro Martin wrote:
  Hi,
  Be sure version is 20080825c
  
  Regards,
  Pedro.
  
  Version 20080825-final running on Windows XP Pro SP3.   In the module 
  editor, if I click on the Module Properties button on the toolbar, and 
  then in the resulting dialog click OK (with or without changing 
  anything), PCBNew crashes every time.   Clicking Cancel does not cause a 
  crash.   Can anyone help, please?
 
  Regards,
 
  Robert.
 
  
  
  
  
  Please read the Kicad FAQ in the group files section before posting your 
question.
  Please post your bug reports here. They will be picked up by the creator 
of Kicad.
  Please visit http://www.kicadlib.org for details of how to contribute your 
symbols/modules to the kicad library.
  For building Kicad from source and other development questions visit the 
kicad-devel group at http://groups.yahoo.com/group/kicad-develYahoo! Groups 
Links
  
  
  
  
  
  
  
  No virus found in this incoming message.
  Checked by AVG - http://www.avg.com 
  Version: 8.0.176 / Virus Database: 270.9.18/1850 - Release Date: 
15/12/2008 17:04
 



Re: [kicad-users] Re: Kicad libraries

2008-12-04 Thread Pedro Martin
Hi,

You are not using a library but a standalone component.
The .emp file contains a single module description. You need to add this 
component to a library that already exists or create a new one. Even though 
the new library may contain only one component.

Once you have imported the .emp file with the module editor, save it in a 
library. You can save it in your own new library and use it for the next 
components in .emp file.

You will see 2  files .dcm and .lib: the library files to import in the 
project.

Pedro.


 I can manage to open the .emp file if I go to PCBnew and then open up
 the module editor and then click on import module.  However I cant
 really do anything useful with this other than see that it is there.




[kicad-users] Kicad: Spanish localization

2008-11-22 Thread Pedro Martin
Hi,

I have upload to kicad-users-files-Spanish translation the kicad.mo and 
kicad.po files for the Spanish localization.

It is not a final release, since it could have some bugs because when 
translating you only see the messages and you don't see where they arre in 
the application. So some messages can have a good translation but a 
bad localization. Or a text can be too long for the available space.

I encourage Spanish kicad users to report me any bug found.

Regards,

Pedro.



Re: [kicad-users] I'm having trouble Drawing Objects

2008-11-20 Thread Pedro Martin
Hi,

To draw a rectangle, click on the start point, release the mouse button 
without moving the mouse and, afterwards, draw the rectangle.

Pedro.

 In Step 65 of the tutorial Click on the Add rectangle button. By left 
clicking and holding the 
 button down place a rectangle around the pin names.
 
 When I draw the rectangle when I release the mouse key the rectangle 
disappears. Any ideas?
 




Re: [kicad-users] Re: Connections in module editor

2008-11-19 Thread Pedro Martin
Hi Bob,

Well, I do not use autorouting...

Both options are good:
1. delete the connections done by the autorouter if it does not let you 
complete the routing and finish it manually or
2. if yhe routing is complete so not worry about it.

Pedro.


 
 Thank you, Pedro, but that does not seem to work for me (I have build
 20080825-final). When I set the same pin number on both leads and do
 auto-routing, PCBnew puts in traces to connect the same-numbered leads
 together. Apparently, PCBnew believes that the leads should be
 connected, but doesn't realize that they are already connected.
 
 - Bob
 
 
  Yes: set the same pin number on both leads.
 
  Pedro.
 
 




Re: [kicad-users] Problem with import of *.ses file where a layer contains a mutated vowel

2008-11-18 Thread Pedro Martin
Hi,

Edit the text file where the board is stored, I do not remember now the 
extension, and do find/replace instead of redo the whole pcb.

Pedro.

 Even if I open the the board in a non-german language the
 copper layer is called Lötseite. Therefor I have had to redraw the
 board in english in order to use freerouter.



Re: [kicad-users] Connections in module editor

2008-11-18 Thread Pedro Martin
Hi,

Yes: set the same pin number on both leads.

Pedro.

 I'm trying to create a footprint for a SPST switch. The component has
 two pairs of leads, with each pair wired together inside the switch.
 Is there a way to tell the module editor, or tell PCBNEW, that the
 leads are connected? It would somewhat simplify routing.



Re: [kicad-users] how to change all via diameters at once?

2008-11-15 Thread Pedro Martin
Hello,

Select a via with the pop-up menu and then Via Drill.
There is a global via change option.

Pedro.

 Hi,
 
 I have a board with lots of ground vias and I need to increase the size 
 of all of them. 
 Is there a way to change all at once or do I need to select every 
 single one of them?
 
 Thanks, Tom
 




Re: [kicad-users] Re: Changing solder mask dimension?

2008-11-12 Thread Pedro Martin
Hi,

I think you are wrong.
This changes the mask clearance around vias and pads. Traces are covered by 
the mask.
It is not possible to set the mask clearance in the module editor since it is 
not a pad property, but a circuit one.
I do not know if it is possible with other programs, with Kicad we only can 
set one mask clearance for the whole circuit.

Pedro.

 If I understand correctly, this only changes the mask clearance around
 vias and traces.  I need to change the clearance around the pads in
 the module editor.
 Doug
 
 --- In kicad-users@yahoogroups.com, bill Randall [EMAIL PROTECTED]
 wrote:
 
  Hi,
  I had the same problem - the PCB manufacturer said there was too
 much overlap of mask over pad.
  This can be set as follows in PCBNEW:
  Go to Dimensions (top tool bar)
  Go to Tracks and Vias
  Set Mask clearance as required (I used 0.004 and PCB manufacturer
 is happy with that)
  Bill
  UCT
  
   Pedro Martin [EMAIL PROTECTED] 11/11/2008 06:22 PM 
  
  Hi,
  
  Dimensions-Tracks and vias - Mask clearance
  
  Regards,
  Pedro.
  
   Maybe I missed this in the documentation, but I can't figure out
 how to
   change the solder mask opening size.
   
   I am laying out a 4 bump chip scale package and the default mask
 opening
   is too large. How do I change this dimension?
   
   Regards,
   Doug Deeds
   Forthright Solutions
   817 230 4483
   
  
 
 
 




Re: [kicad-users] Re: Changing solder mask dimension?

2008-11-12 Thread Pedro Martin
Hi Doug,

Why edit every pin each time you use the IC?

The only 2 parametres needed are clearance, i.e. minimum gap between tracks 
and so, and mask clearance for minimum solder gap.

Since these 2 parametres depend on the manufacturer technology, it is 
reasonable to think they shoul be unique for the whole pcb.

The only possible case for specific pad editing is the case that the pad metal 
area should be bigger than the solder paste area. And this is an unusual 
case.

For BGAs I have used a round one side pad, no problem at all. In this case I 
set the mask clearance to 0.0991 mm or 0.0039 inch.

Regards,
Pedro.

 This seems to be a poor way to do this since any time I use this IC I
 will have to manually edit each pin.  Luckily this particular one only
 has 4 pins.  And since there is no way to visibly detect changes in
 PCBnew you have to check each pin in a Gerber viewer.
 
 Since you have both done this, what is your opinion on how a fix
 should be implemented?  I think the module editor should implement
 this.  I initially was thinking that the editor should just allow you
 to change the mask clearance.  But I am wondering if also allowing
 another type of pad BGA would make better sense.




Re: [kicad-users] Can't place lines!

2008-11-05 Thread Pedro Martin
Hi,

Click and release the mouse button. If you keep the button pushed, it appearss 
the block command.

Pedro.

 Hello,
 
 I've been using Kicad for the last year in different projects at full 
 satisfaction.
 Yesterday I updated from version 2007-11-29 to the last one 2008-08-25 
 and now I can't place lines neither schematic editor nor pcb editor. 
 Instead of placing lines it opens a bloc command.
 The same happens to 4 PC's I've (Win XP), but if I downgrade to 
 previous version the problem repeats again!!!
 
 What's happening???
 
 Thanks in advance,
 
 Josep.
 




Re: [kicad-users] Re: Having trouble with the logic behind labels.

2008-11-02 Thread Pedro Martin
Well,

As I Have told before, I work as your first conclusion.

But there are 3 mistakes, in my opinion, in your eschemas:
In figures Im91, Img142 and Img220 global labels are floating (or dangling) 
while in Img122 they are connected to a net with a wire.

Again, I cannot understand why resistors R71 and R169 are well connected (what 
should mean there are no mistakes).

 My conclusion:
 
 On root sheet level, you must add net names to the hierarchical sheet
 pins of sub sheets that needs to be connected together, otherwise you
 end up with dangling connections between the different sub sheets.
 
 Pls. feel free to contradict this conclusion, should I've overlooked
 something.
 
 Another conclusion:

Here, as a designer, I think a root sheet with several subsheets is a good way 
to design.
I usually keepat the root sheet external connectors and I add a subsheet for 
each circuit block. So I do not see any pollution on the top level.

Regards,
Pedro.


 In one of my replies, I made the following assumption:  I thought that
 sub sheets with hierarchical sheet pins having the same name, were
 implicitly connected by EeSchema.
 But that's clearly not the case, that has been proven above...
 However, that doesn't mean it's not a pity: if my assumption would have
 been true, it could have avoided root sheet pollution with the
 (currently necessary) net labels.




Re: [kicad-users] Re: Having trouble with the logic behind labels.

2008-11-02 Thread Pedro Martin
Hi,

Excuse me, I have mixed up global labels with hierarchical labels. Yes, we 
were talking about hierarchical (inside the subsheet) labels and pin sheets 
(outside the subsheet). I usually do not use global labels.

 Just to avoid confusion: I've not used global labels, but hierarchical
 pins.  Global labels have text inside the label symbol...
 

 You mean, for img91 for example, you were expecting this:

Yes, it's what I mean.

 http://img205.imageshack.us/my.php?image=mcp23017sdaconnectedjl6.png
 http://img205.imageshack.us/my.php?image=mcp23017sdaconnectedjl6.png
 
 in stead of this:
 
 http://img91.imageshack.us/my.php?image=mcp23017sdadc4.png
 http://img91.imageshack.us/my.php?image=mcp23017sdadc4.png  ?
 
 Well, I've done the test and when I connect the dangling hierarchical
 labels to net names in both the sub sheets MCP23017 (see above) and
 Eeprom Memory Device, I have the following net list content:
 
   ( /48F0CE8C/455616DD R3H  R71 100 {Lib=R3H}
(1 N-000124 )
(2 /MCP23017/SDA )
   )
 
   ( /49049CF8/49049EFE R3H  R169 100 {Lib=R3H}
(1 N-000233 )
(2 /MCP23017/SDA )
   )
 
 So, again those two points in the different sub sheets are nicely
 connected together.  But in stead of having the net name /SDA, they
 have the net name /MCP23017/SDA, resulting in this in the net list:
 
 /MCP23017/Net 14 SDA
   R169 2
   R71 2
 
 Net 14 is connecting those two points together.  So, I assume PCB net
 will to a correct job wrt the given example, when it reads the net list.
 Right?

An example of one of my circuits:

http://img221.imageshack.us/my.php?image=imagenmo8.png

Instead of a wire connection, it's possible to use local labels.

Regards,
Pedro.

 Can you provide an example?  I don't see how you connect hierarchical
 sheet pins --with the same name-- of different sub sheets to each other
 on the root sheet level, without adding the --in the mean time proven--
 necessary net names...  I'm curious to see how you do this in your
 designs...  [:)]
 
 Best rgds,
 --Geert
 
 




Re: [kicad-users] How to create module with copper ?

2008-10-29 Thread Pedro Martin
Hello,

to change the layer of a segment when creating a component, select the segment 
with a rigth click. Then select Edit-Edit layer.

It will advise you that is dangerous to have copper lines in a module.

Pedro.

 Hi,
 
  
 
 I would like to create a new component in library with a copper area already
 drawn.
 
 I don’t know how to change the layer of the segments I’m drawing in the
 module editor. Is there any way to do that ? 
 
  
 
 Best
 
 Stephane
 




Re: [kicad-users] Re: ERC error Warning Pin passive Unconnected

2008-10-27 Thread Pedro Martin
Hi,
Usually this error happens when the wire grid does not match the component's 
pins.
See if the pins are on the selected grid or out of it. Then, trace the wire 
again.

Regards,
Pedro.

 So, it seems I am sometimes placing components, in a way that does not
 connect them, and not 'black square' is created at the interconnect.
 
 What do I do to force the connection?




Re: [kicad-users] Setting Grid

2008-10-27 Thread Pedro Martin
Hi,

I can change the grid without any problem.
My version is 2008 08 25c.

Anywhere on the sheet, right click shows a pop-up menu and then select grid.

Pedro.




 
 Just setting up kicad and trying to get a schematic entered.
 I can not set up the grid to 1 Mil.  After selecting it to 1 mil
 and hitting OK the grid does not change, and when returning to
 options, it is back at 50 mil.
 
 Yes, I have read the docs, and did not find anything there relating
 to this problem.  Is there a 'gotcha' page that has tips on things like
 this?
 
 Any suggestions appreciated.
 
 Wayne




Re: [kicad-users] LCD part / Library

2008-10-26 Thread Pedro Martin
Hello,

It is easier and faster to edit the CONN_14 module and add it 2 extra pins.

Regards,
Pedro.

 Hi,
 I'm placing a standard 2x16 LCD on a board, and have used a 'CONN_14' 
connector, but in reality, I'd like to use a 16 pin connector, which would 
support the 2 pins needed for the backlight LED.
 
 Can someone point me to a Library for either a 16 pin connector, or a 
complete LCD panel footprint?
 
 Thanks, Peter
 
 




Re: [kicad-users] bug in 'module editor'

2008-10-09 Thread Pedro Martin
Hi,

Download and install 20080825c. The problem is solved.

Pedro.

 Hey,
 
 since a few days i have been using Kicad, version 20080825. It works 
 very fine until I open 'the Module Editor' in the '.brd'-file. Moreover 
 when I am creating a new module, then opening the window 'Module 
 property'. If I then push the button 'ok', always an error occures and 
 the file is closed. Could you please tell me how to overcome this 
 problem?
 
 Many thanks,
 Wim
 




Re: [kicad-users] Re: Creating Solder Mask

2008-10-05 Thread Pedro Martin
Hi,

I think it is not possible. Solder masks are automatically created.
But for  placing copper pads at the edge of the pcb it is possible to make a 
connector with the desired number of pads and place it where you need it. The 
solder mask will be created automatically anyway.

Pedro.

 is there a possibility to edit the solder mask? I need some copper 
 pads at the edge of the PCB in order to solder the PCB to a metal box.
 
 Regards, Tom



Re: [kicad-users] Footprint vs module

2008-10-04 Thread Pedro Martin
Hi,

I think module is the same thing as footprint.

Maybe the difference could be to name module a footprint with fields, 
graphics, keywords and reference documentation.

Anyway, in the Spanish translation we have kept the word module (módulo) just 
because the author has use it (English module= French module and English 
footprint = French trace or empreinte).

Pedro.

 On Fri, 03 Oct 2008 23:11:42 -0500
 Karl Schmidt [EMAIL PROTECTED] wrote:
 
  I'm working on updating some kicad documentation - I think the terms
  are both used for the same thing, unless I'm missing something. Do I
  have this straight - eeschema seems to use footprint and PCBnew calls
  the same thing modules?
  
  In other programs, footprints are called patterns or
  decals (PADSpcb/powerlogic called them decals).
  
  
  
  Karl Schmidt EMail [EMAIL PROTECTED]
  Transtronics, Inc. WEB http://xtronics.com
  3209 West 9th StreetPh (785) 841-3089
  Lawrence, KS 66049 FAX (785) 841-0434
  
  Give me four parameters and I can fit an elephant;
  Give me five and I can wag its tail.
  (The source of the above quote?? Variants have been
  attributed to C.F. Gauss, Niels Bohr, Lord Kelvin, Enrico Fermi.)
  
  
 
 Footprint certainly refers to the physical footprint of an object
 on the PCB, so it is only relevant as a term within PCBnew and Cvpcb.
 
 EEschema uses abstract drawing symbols, and if I'm not mistaken, it uses
 the term components to describe such drawing symbols.
 
 A module seems to be the same thing as a footprint. If you hover
 your mouse pointer over the Cvpcb icon in the main Kicad window, it is
 described as Components to modules.
 
 Unless a module is a component combined with its footprint?




Re: [kicad-users] Pcbnew.exe chrashes

2008-09-21 Thread Pedro Martin
Hi,

I have tested it with Kubuntu 8.04 and the same version  20080825b crashes as 
well.

Pedro.

 Hallo,
 
 I installed today a current KiCad Version ( 20080825b ) from Autor's 
 WebSite. It works very ..., except Pcbnew-Editor. When I open Module-
 Properties Window in Module-Editor it shows all Module Properties. 
 But after klicking an OK-Button, entire Pcbnew-Apps chrashes.
 
 Version 20080825 was OK.
 
 System1:
 WinXP Pro
 4GB RAM
 
 System2:
 Vista 64 Bit
 4GB RAM
 
 System3:
 WinXP Pro
 4GB RAM
 
 Any sugestion??
 
 Thanks
 




Re: [kicad-users] Can anyone explain why EEschema uses A and B for pin numbers?

2008-09-18 Thread Pedro Martin
Hi,

I think you are not doing anything wrong.

But there are only 2 choices:
1. Edit eeschema R an C and change pin numbers to 1 an 2.
2. Edit the modules and change pin numbers to A and B.

Maybe there is another choice: copy and paste your old R and C from an older 
project to a new library and use them.

I guess you have already think of these solutions anyway...

Pedro.

 I'm having trouble generating a netlist that can be used in PCBnew. 
 EEschema has decided that all C and R components should have pins A and 
 B instead of 1 and 2. I'm using the default symbol libraries.
 
 PCBnew can't find the right pins on the modules I've picked, and this 
 means the ratsnest isn't complete - and the components aren't connected 
 to anything. 
 
 This keeps happening on new schematics...
 
 What am I doing wrong?
 




Re: [kicad-users] kicad

2008-09-16 Thread Pedro Martin
Hi,

Add the libraries with Preferences-Libs and Dirs
They shoul be at /usr/local/kicad/share/library

Pedro.

 hello guys
i installed kicad on my mandriva spring.on opening the
 eschema editor i am getting the error lib/power.lib and
 lib/device.libis not loaded as a result i am not able to add any
 components.
 somebody please help
 
 




Re: [kicad-users] Re: Please add kicad document translation group to about credits-Thanks

2008-09-09 Thread Pedro Martin
Hi,
French to Spanish translators:

Pedro Martín del Valle
Iñigo Zuluaga
Both manual and application (not up to date)

Pedro.

 
 Jean-Pierre,
 Here are the names of the people involved in the
 French to English translation of the user manual.
 
 David Briscoe
 Jean Dupont (Remy)
 Boris Barbour
 Dominique Laigle
 Paul Burke
 
 If I have missed anyone please let me know, or if there is any name or
 spelling error. Now everyone knows who to blame if they don't
 understand the manual.
 
 David.
 




Re: [kicad-users] PCBNew questions on global drill sizes and hiding values

2008-09-05 Thread Pedro Martin
Hi,

If you want to see the values on pcbnew but you do not want them to appear on 
the silkscreen layer, uncheck the box print module value when plotting to 
obtain the gerber files.

Pedro.

 I really don't want to place the values onthe silk screen, I assume 
 this is the default for most designers. I cannot see how to turn it off 
 at the board level. Any ideas. Again I have been editing footpronts to 
 do so.



Re: [kicad-users] Re: How to insert a track on both sides of the PCB?

2008-08-29 Thread Pedro Martin
Hi,

You can also uncheck the option tracks auto del in Preferences-General 
Options.

Pedro.

 Hi Thomas,
 You can try to disable the design rules check (DRC). After that, you
 may add one track and lock it, then draw the second track and lock it.
 After that, you can go on and enable DRCs. Hopefully, it can work!
 Regards.
 Remy.


 --- In kicad-users@yahoogroups.com, thomaswest24

 [EMAIL PROTECTED] wrote:
  For higher current I need to add a track between 2 pins on top and on
  bottom layer to double the possible current. But in my version of
  PCBNew this is not possible.
  First I draw the track on the top layer and all is OK. Then I switch
  to the bottom layer an draw the same track between the same pins.
  When this operation is finished the track at the top layer will be
  deleted automatically.
  My version of PCBNEW is 20080429-r1010.



Re: [kicad-users] Ratnest disappear in Pcbnew

2008-08-05 Thread Pedro Martin
Hi Peter,

there is an icon to show/not show the ratnest on the left bar.
Pedro.

 The second annoying little thing is the disapperances of the ratnest
 while routing. I found the only way to show it again is the re-reading
 of netlist.

 Peter


 
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 Please read the Kicad FAQ in the group files section before posting your
 question. Please post your bug reports here. They will be picked up by the
 creator of Kicad. Please visit http://www.kicadlib.org for details of how
 to contribute your symbols/modules to the kicad library. For building Kicad
 from source and other development questions visit the kicad-devel group at
 http://groups.yahoo.com/group/kicad-develYahoo! Groups Links






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Re: [kicad-users] Footprint substitution

2008-05-02 Thread Pedro Martin
Hi Patrick,

It is easier than that.

In pcbnew, select a module and edit its properties. Then click on change 
module button. You can change only this module or all modules of the same 
type.

Pedro.

 Dear all,
 
 One question on pcbnew, don't know whether there are simple way to 
 achieve.
 
 For instance I defined footprint of several resistors as R3 and 
 completed the PCB layout.  After that I found there is another R3-
 LARGE_PADS which is better.  Is there a simple way to substitute the 
 orginal footprint with the newer one?  I tried redefining the 
 netlist in cvpcb, but when pcbnew reads the altered netlist it 
 complaints the differences in footprint.  I have to:
 
 1. Delete the original modules;
 2. Read in the new netlist and replace the new modules;
 3. Re-route the traces to substituted components
 
 If anyone have experience on this please kindly advise.
 
 Thanks in advance,
 Patrick
 




[kicad-users] Zone drawing

2007-12-11 Thread Pedro Martin
Hi,

In PCBNEW (2007-11-29-RC2) - Unicode version there is a bug.

When creating a zone, the outline vanishes on doing zoom. Only the current 
line is kept visible. The outline appears again after filling the zone.

Pedro.


Re: [kicad-users] composite layers and negative plots

2007-09-20 Thread Pedro Martin
I do not understand the question.
My kicad generated gerbers do not contain G36 nor G37 codes in copper layers.
Neither for the tracks nor for the zones.

Pedro.
 Your gerbers contain composite layers and negative plots (G36 G37 
 commands).


Re: [kicad-users] Re: display on/off of different pcb layers !

2007-08-24 Thread Pedro Martin
Hi,

If selecting colors is not straightaway, try the high contrast button, left 
toolbar, last but one.
It highlights the current layer. Anyway I prefer the option Danilo pointed.

Pedro.

 
 Having to go to Preferences-Colors is not very intuitive or
 convenient; this isn't really a preference thing anyway.  I may want
 to view some tracks on one side without the other stuff obscuring my
 view, then quickly switch to the other side.


Re: [kicad-users] KiCad bug - Zones

2007-07-27 Thread Pedro Martin
Yes,

DRC doesn't check the zones, so they'd be done in last place.

Pedro.
 Hi Mark
 
 I noticed the DRC didn't pick it up either, maybe it doesn't check the
 zones?
 
 Glad I'm not the only one though!
 
 Cheers,
 
 Matt.
 
 On 27/07/07, Mark Webster [EMAIL PROTECTED] wrote:
 
   Hi Matt,
 
  Yes, I had this on one of my last boards. I'm not sure what I did wrong. I
  removed the zones and reflooded and it was fine. More worrying is the fact
  that the DRC check didn't pick up the misconnect.
 
  MarkW
 
  Hi all,
 
  I've done two different board layouts now with a GND zone on both, on
  both boards the GND zone connects to all the GND tracks ok, but ive
  had one occasion on each board where it has also gone over the top of
  another none-GND track - unfortunately both times I've not noticed
  this and had to resort to cutting the GND plane once the board has
  been made!
 
  Has anyone else had this problem or is it likely to be something I'm
  doing wrong?
 
  Many thanks in advance
 
  Regards
 
 
 
 
   
 



Re: [kicad-users] library problems

2007-07-02 Thread Pedro Martin
Hi,

Add the library to the project. Prefs- Libs and dirs

It doesn't matter where the library is copied.

Pedro.
 Hello,
 
 what's the correct way to 'use' a downloaded library ?
 Copying the .lib file and .mod file in 'library' and 'modules' 
 directories doesn't work. If I 'append' the lib code inside an already 
 exsisting .lib file anything work but I think it's not the correct way.
 



Re: [kicad-users] Re: Kicad compatible PCB manufacturer

2007-04-20 Thread Pedro Martin
Yes, I have worked with 3 manufacturers in Spain and all of them have accepted 
Gerber and drill (Excellon) files without knowing if they were generated with 
Kicad or any other tool.

Pedro.
 --- In kicad-users@yahoogroups.com, vlmprod [EMAIL PROTECTED] wrote:
 
  Hi,
  
  I read some weeks ago that a spanish PCB manufacturer was compatible 
  with Kicad. I forgot the name of it. Can someone help me please.
  Thanks
  
  V.Le Mieux
 
 
 Kicad can plot in the standard gerber format. A set of gerber files
 and a drill file should be accepted by any PCB manufacturer.
 So you can use any manufacturer, they don't need to know Kicad.
 
 Ian


Re: [kicad-users] Removing items from Gerber files

2007-04-18 Thread Pedro Martin

 I'm about to release my first PCB in Gerber format, and there's a few
 items on the plots that I want to remove. Specifically, I'd like to
 remove the board outline from the copper layers, and the copper pad
 from the board mounting holes. (When I created the module for a
 mounting hole, it wouldn't let me generate a pad smaller than the
 drilled hole size, flagging it as an error - is there some other way
 to produce non-electrical holes with no associated copper pad?)
 
 I can't figure out a way to stop these from being generated in the
 first place - is there an option somewhere? - so I tried instead
 deleting them in Gerbview. This works fine, but when I ask Gerbview to
 save the modified file, it simply doesn't save anything. Is this a
 known bug? I've tried both 'save layers' and 'save layers as...', but
 neither actually generates a new file.
 
 Any tips, or do I just need to attach a note when I send the board off
 for fabrication?
 

Yes, you can.
I change the edges layer into a technical layer (Eco1, Eco2, drawings...) 
before generating the gerber files. Then, I rename the file once generated.

For the hole, it is easier: when making the module, deselect the copper layers 
in the pad's properties.

Pedro.


Re: [kicad-users] Resolved : Power Flag on GND

2007-02-12 Thread Pedro Martin
Hi,

Well, you do not really need to do so: ERC test does not make anything on your 
circuit. Your pcb can be made alright anyway.

ERC test only tells you what coult it wrong. So, if you already know this net 
is alright, you can ignore it. Or you can edit the ERC message table and 
unmark this error message.

Pedro.
 GND was connected to OpenEm pin of a transistor, when I tried to
 connect PWR_FLAG, ERC detected a input power in the OpenEm of the
 transistor. I've just put a 0 Ohms resistor between transistor pin and
 GND.



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Re: [kicad-users] Checking Unrouted Traces?

2007-02-05 Thread Pedro Martin
Hi,
On the left toolbar you can find a button show ratnest. You will see all 
unconnected traces.

Pedro.

 I find the ratnests only show up when a node is clicked.
 Is there a way to check any unrouted traces on pcbnew board editor?  I 
 want to have a thorough check before releasing for sample request.



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Re: [kicad-users] Confused

2007-01-17 Thread Pedro Martin

 Anyhow - I believe I have the schematic done properly, but I cannot
 transitin to the next step (CVPCB) to prepaer the footprints etc for
 placement onto a PC Board.  Is it possible to send this file (.sch) to
 someone and have them check my work, so I know whether I'm on the right
 track or not?
 

Have you created a netlist?
It is the information cvpcb needs.

Pedro.


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Re: [kicad-users] Re: final Gerber !

2006-12-12 Thread Pedro Martin
Hi,

If you mean pcb edges, I think it is not possible unless you do what you have 
done, with Gerbview for example.

What we do is the following:

before creating Gerber files, draw the pcb edges on a technical layer, let's 
say comments. Eco1 or eco2 are also valid.
Then delete the pcd edges on the PcbEdges layer.
Generate gerber files. Now you can change the name of Comments.pho by 
PcbEdges.pho.

Regards,
Pedro.
 --- In kicad-users@yahoogroups.com, cfdevelop [EMAIL PROTECTED] wrote:
 
  Hi all,
  
  I don't know, how to disable the pcb board into the component and
  cuivre layer's ?
  
  thanks
 
 
 
 
 I succeeded in removing it, In editing the .pho !
 But this methode is not clean.
 
 is there an process to do this ??
 Because in my component layer's, I don't want the pcb outline in CU.
 
 thanks
 
 


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Please read the Kicad FAQ in the group files section before posting your 
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Please post your bug reports here. They will be picked up by the creator of 
Kicad.
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Re: [kicad-users] drill file problem

2006-10-30 Thread Pedro Martin
Hi,

I work with 3 pcb manufacturers and no one has problems to read the .drl 
files.
I think the format of the drilling file is Excellon, not Gerber.

Regards,
Pedro.
 Hi all,
 
 I need your help
 I have a problem with the drill file (.drl). I can't load .drl file in the 
gerbviewer. The error message at Load Drill is: Not yet available
 Also my local PCB manufacturer isn't able to see more than 8 holes on the 
board and ask me for another format like 2.3 or 3.4. 
 
 I know from Kicad Help that Pcbnew generates a separate file for each layer 
following the GERBER 274X standard, by default in 3.4 format.
 Is it the same default format for .drl file?
 
 Has anyone faced the same problem? What should I do?
 
 If it is necessary I can attach .drl file.
 
 Regards,
 Florin
 
 


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Please read the Kicad FAQ in the group files section before posting your 
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Please post your bug reports here. They will be picked up by the creator of 
Kicad.
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Re: [kicad-users] Is there a feature to allow me to place component on the Solder side

2006-09-28 Thread Pedro Martin
Hi Dan,

With invert module in the pop-up menu.

Pedro.
 
 I couldn't see where or how I can move SMT components to the solder side 
 of the PCB. I would like to reduce the size of the PCB and this is one 
 method I've used before when using another PCB tool. Some of the 
 terminology is different with this tool, so I might be getting confused 
 with trying to equate the available commands in KiCad from before.
 
 thanks,
 Dan
 
 


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Please read the Kicad FAQ in the group files section before posting your 
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Please post your bug reports here. They will be picked up by the creator of 
Kicad.
Please contribute your symbols/modules to the library folder in the group files 
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Re: [kicad-users] WARNING ! : BUG in EESchema !

2006-09-26 Thread Pedro Martin
Hi,

Try without space.
Pedro.

 In EESchema (28_08-2006):
 
 I have 2 independantes wires , I added the Labels :
 -LED ROUGE
 -LED IR
 
 When I generate the Netlist, EEschema connect my 2 wires, I think
 because the start of label are the same LED 
 
 Confirme?
 
 ++
 
 
 
 
 


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Kicad.
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Re: [kicad-users] PB Drill Layer ?!

2006-09-14 Thread Pedro Martin
Hi,

I have not tried GC-Prevue, but at least 3 other programs read the .drl 
(Excellon format) well.
Have you checked if you are importing an Excellon file?

If you want to know if the .drl has been well generated, edit it with a text 
editor.

Pedro.

 Hi,
 
 I traced a gerber layers(.pho)and drill layer (Default options).
 But when I Imported this files in GC-Prevue
 ( http://www.graphicode.com/pages/downloadprevue.cfm )
 The Gerber Layers are OK, and the Drill Layer doesn't correspond to
 the component ???!!(All holes are in the same place...)
 
 Anybody has encountered this problem?
 
 Thanks
 
 
 
 
 
 


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Please post your bug reports here. They will be picked up by the creator of 
Kicad.
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Re: [kicad-users] Placing multiple components of the same typ

2006-09-14 Thread Pedro Martin
Hi,

 When placing components of the same type, one has always to reselect
 the component in the history list of the Add components dialogue box
 (components selection is the correct name of the dialogue box).
 
 Is there a way to avoid this?  
 

Yes. Select the component and from the pop-up menu, copy-component. If you 
need more components at a time, put them all together and then copy-block.

Pedro.


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Re: [kicad-users] Adheshive layer

2006-09-12 Thread Pedro Martin
Hi,

Usually smd modules have not the adhesive layer. This layer is intended to 
place components that are stick or glued to other components: radiators 
(disipadores), etc.

If you need to stick all smd components, before wave soldering for example, I 
think you have to draw the lines on the adhesive layer.

Pedro.
 
 Hello,
 
 I'm trying to make a SMD board, and I'm seeing that SMD modules have not
 anything in the adheshive layer. Do you have to put the adheshive points
 manually, drawing lines on the adheshive layers?
 
 Thank you!
 


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Please read the Kicad FAQ in the group files section before posting your 
question.
Please post your bug reports here. They will be picked up by the creator of 
Kicad.
Please contribute your symbols/modules to the library folder in the group files 
section.
For building Kicad from source and other development questions visit the 
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