Hi Peter,
hm, I do agree, this sounds like it would be an absolutely reasonable
thing to do on a X310; the B210's master clock rates are way
significantly lower (especially in dual-RX mode), so my hope is that
the overwhelmingness of having software DDC is gone (or you just don't
care about it and
On Sat, Jun 30, 2018 at 5:05 AM Peter Sanchez via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Appreciate the feedback. Marcus, we have a project using RFNoC blocks on
> the X310 to run this workflow, 2x Rx --> Splitstream for each RX --> DDC
> for each split stream out --> FFT Sink. We would
Appreciate the feedback. Marcus, we have a project using RFNoC blocks on
the X310 to run this workflow, 2x Rx --> Splitstream for each RX --> DDC
for each split stream out --> FFT Sink. We would like to do the same on the
B210. This was overwhelming our CPU + GPU before we switched to RFNoC on
the
Hi Dan. Such a product is in the works. It was mentioned in Manuel Uhm's
presentation at GRCon 2017-- the USRP E320.
Single board approximately the size of a B210, AD9361, RFNoC-capable with
larger Zynq FPGA than E310 (XC7Z045).
Ettus Research intends to demo the E320 at GRCon 2018, so sign up t
What I meant and didn't explain well enough is a potential new Ettus
product would be a Zynq-based B2X0 clone. That would be RFNOC-capable.
On Fri, Jun 29, 2018 at 2:32 PM Ian Buckley via USRP-users <
usrp-users@lists.ettus.com> wrote:
> Er no.
>
> B200 has approximately the same number of FP
Er no.
B200 has approximately the same number of FPGA logic gates as E310, B210 twice
that amount.
The current design is simply larger than it needs to be because it shares all
it’s code with X300, I could have made it much smaller had there been a good
reason to.
The FPGA was simply chose
I think what would be more useful is a low-end USRP (low price like B200)
that is RFNOC-capable. I guess that might be something like an E310 in a
white case?
On Fri, Jun 29, 2018 at 9:12 AM GhostOp14 via USRP-users <
usrp-users@lists.ettus.com> wrote:
> I second RFNoC for the B series would be g
I second RFNoC for the B series would be great. They're an incredibly
popular and affordable series and I feel a little left out of the
capabilities of RFNoC due to the Spartan6. Bringing the Artix to the
B-series or supporting the Spartan6 could both be options I'd love to see.
(Just a community
To give an uplifting spin to all this:
Now, also, although larger than the one on the B200, the B210's FPGA
isn't really large unoccupied, so the amount of logic that you could
even hypothetically put in there is limited. Why's that uplifiting?
That FPGA was chosen for the board because there's u
Thank you
On Thu, Jun 28, 2018 at 2:01 PM, Ian Buckley wrote:
> There is no conceptual reason why you can’t build an RFNoC design on B210,
> it uses the same USRP3 base architecture and FPGA source files….*HOWEVER*….
> B210 is implemented with a Spartan6 FPGA and all the implementation work
> fo
There is no conceptual reason why you can’t build an RFNoC design on B210, it
uses the same USRP3 base architecture and FPGA source files….*HOWEVER*…. B210
is implemented with a Spartan6 FPGA and all the implementation work for RFNoC
is done using Xilinx’s Vivado design tools which support only
Hi All,
Is it possible to generate RFNoC blocks for the B210? I can't find a lot of
information about it. Can some one show me the URL if there is a website
talking about it?
Cheers
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