[Bug tree-optimization/122635] RISC-V: -mrvv-vector-bits=zvl introducing unoptimal vsetivli zero,0 and insns depending on AVL nops

[gkm at rivosinc dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122635

Greg McGary <gkm at rivosinc dot com> changed:

           What    |Removed                     |Added
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                 CC|                            |gkm at rivosinc dot com

--- Comment #3 from Greg McGary <gkm at rivosinc dot com> ---
I am attempting to debug the "cunroll" pass now, where the zero-length
MASK_LEN_LOAD first appears. I have no experience with this part of the code,
so wish me luck and/or offer advice & clues.