[Bug tree-optimization/122635] RISC-V: -mrvv-vector-bits=zvl introducing unoptimal vsetivli zero,0 and insns depending on AVL nops

[rdapp at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122635

Robin Dapp <rdapp at gcc dot gnu.org> changed:

           What    |Removed                     |Added
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     Ever confirmed|0                           |1
   Last reconfirmed|                            |2025-11-11
             Status|UNCONFIRMED                 |NEW