[EMAIL PROTECTED] wrote:
>
> From: Simon Barnes <[EMAIL PROTECTED]>
> To: <[EMAIL PROTECTED]>
> Sent: Wednesday, March 08, 2000 12:16 PM
> Subject: RE: MD: Sony's new Internet Audio Recording Interface
>
> > Rick was not assuming, he was asserting, that the ASIC contains a DSP core
> > to execute the ATRAC algorithm. And I further assert (and I know because I
> > have done it) that an FFT is performed on a DSP in a similar (but not
> > identical) way to how it would be done on a Pentiuk. DSPs have special
> > custom instructions to multiply and add in one operation, parallel
> > instructions, zero overhead branching and RAM running at the CPU clock,
> > which make them faster than general purpose CPUs at the same clock rate,
> but
> > all these together don't amount to more than 5 times faster. My totally
> > unsubstantiated guess is the R55's clock will be ~45 MHz (based on reading
> a
> > number off a chip on an MZR35's circuit board).
>
> Ok, but my P3 has RAM running at 100MHz (soon to be 133MHz) - but for some
> operations I would expect the internal cache to be used which would
> obviously be much much faster. Even if we assume it *is* 5x faster using a
> dedicated DSP than the Pentium-based CPU, that is still only (based on your
> assumption of a 45MHz clock) a 225MHz pentium - well below standard for
> desktop system by todays standards. If you take into account some of the new
> MMX instructions plus various other enhancements being made to processors
> then I can't see why it would be a problem.
>
> Magic
First: DSP cores normaly use SRAM. Ie, static RAM. This RAM normaly runs on the
core speed. Writing and reading to this type of RAM can be done in one cycle.
This RAM doesn't need a refresh. SDRAM is a dynamic RAM that runs on the same
clock-base as the CPU. But it is also a dynamic RAM that needs to be refreshed.
The refresh takes time!
Second: Most DSP architecutures have a mechanism that split the memory into
three or more parts. A program memory, a data-input and a data-output memory.
This split garentees that you can fetch the next instruction with it's input
execute the current instruction and write the output of the previous instruction
in one cycle. (Ie do three things at the same time).
The x86 has one memory for all. Ie, if you fetch an instruction, you can't write
to the memory or read from another adres.
Third: It's the OS in a Pentium class machine that does the cache prediction.
YOU as a programmer can't influence it much. On a DSP, you have total control
over the cache (if needed).
There are many other reasons why the ATRAC DSP can do it operations more
efficiently than a Pentium CPU. Most of them relate to the fact that the Pentium
has to do a lot more other things!
Cheers,
Ralph
--
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Ralph Smeets Functional Verification Centre Of Competence - CMG
Voice: (+33) (0)4 76 58 44 46 STMicroelectronics
Fax: (+33) (0)4 76 58 40 11 5, chem de la Dhuy
Mobile: (+33) (0)6 82 66 62 70 38240 MEYLAN
E-Mail: [EMAIL PROTECTED] FRANCE
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"For many years, mankind lived just like the animals. And then
something happened that unleashed the powers of our imagination:
We learned to talk."
-- Stephen Hawking, later used by Pink Floyd --
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