From: Ralph Smeets <[EMAIL PROTECTED]>
To: <[EMAIL PROTECTED]>
Sent: Wednesday, March 08, 2000 1:38 PM
Subject: Re: MD: Sony's new Internet Audio Recording Interface
> First: DSP cores normaly use SRAM. Ie, static RAM. This RAM normaly runs
on the
> core speed. Writing and reading to this type of RAM can be done in one
cycle.
> This RAM doesn't need a refresh. SDRAM is a dynamic RAM that runs on the
same
> clock-base as the CPU. But it is also a dynamic RAM that needs to be
refreshed.
> The refresh takes time!
Fair enough, however, modern DIMMs are much much faster than the RAM you
would find in the MD. The processor is also much much faster. If it takes me
3 instructions to do what the ATRAC chip does in 1, that means I can do it
at the same speed if my processor does instructions in 1/3 of the time. Some
instructions on CISC based systems take more than 1 clock cycle, but if the
processor clock is running much faster then this means it is still feasable
for it to perform on a par or even faster than a dedicated chip running at a
slower clock speed. It is for this very reason that a modern Pentium can
emulate systems such as the old BBC micro *faster* than the original
machines.
> Second: Most DSP architecutures have a mechanism that split the memory
into
> three or more parts. A program memory, a data-input and a data-output
memory.
> This split garentees that you can fetch the next instruction with it's
input
> execute the current instruction and write the output of the previous
instruction
> in one cycle. (Ie do three things at the same time).
> The x86 has one memory for all. Ie, if you fetch an instruction, you can't
write
> to the memory or read from another adres.
True, however if the data is comprised of 16 bit numbers, you can load more
than 1 register at a time by fetching up to 64 bits simultaneously from the
RAM - equivelent of doing 4 things at a time. Whereas the MD would store one
number and read another number simultaneously, I would read 4 numbers
simultaneously, then write 4 numbers simultaneously. This would actually be
faster.....
> Third: It's the OS in a Pentium class machine that does the cache
prediction.
> YOU as a programmer can't influence it much. On a DSP, you have total
control
> over the cache (if needed).
True, but if you know the way the Pentium chip treats the cache, you can
write the program code in such a way as to take full advantage of it. If you
know that there are instructions which both produce the same end result, but
one makes more use of the cache and so takes less time, you obviously pick
the instructions that take less time, giving you more overhead for other
things.
> There are many other reasons why the ATRAC DSP can do it operations more
> efficiently than a Pentium CPU. Most of them relate to the fact that the
Pentium
> has to do a lot more other things!
But this isn't really the argument. The question is whether the Pentium chip
has enough of a speed advantage to compete with the dedicated DSP. In this
instance I think it does. The Pentium is a much faster (in terms of core CPU
speed) chip than the DSP, and this should be more than enough to compensate
for the fact that it wont do the job as efficiently. There will also be
areas of the algo. which it will do as efficiently as the DSP because both
functions may be built into the processor as standard.
Magic
--
"Creativity is more a birthright than an acquisition, and the power of sound
is wisdom and understanding applied to the power of vibration."
Location : Portsmouth, England, UK
Homepage : http://www.mattnet.freeserve.co.uk
EMail : [EMAIL PROTECTED]
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