CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Thu Nov 14 01:36:00 UTC 2013
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_gpio_pci.c
Log Message:
Deal with new interrupt structure.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.7 -r1.1.2.8 src/sys/arch/mips/rmi/rmixl_gpio_pci.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_gpio_pci.c
diff -u src/sys/arch/mips/rmi/rmixl_gpio_pci.c:1.1.2.7 src/sys/arch/mips/rmi/rmixl_gpio_pci.c:1.1.2.8
--- src/sys/arch/mips/rmi/rmixl_gpio_pci.c:1.1.2.7 Sat Dec 15 03:05:56 2012
+++ src/sys/arch/mips/rmi/rmixl_gpio_pci.c Thu Nov 14 01:36:00 2013
@@ -29,7 +29,7 @@
#include sys/cdefs.h
-__KERNEL_RCSID(1, $NetBSD: rmixl_gpio_pci.c,v 1.1.2.7 2012/12/15 03:05:56 matt Exp $);
+__KERNEL_RCSID(1, $NetBSD: rmixl_gpio_pci.c,v 1.1.2.8 2013/11/14 01:36:00 matt Exp $);
#include sys/param.h
#include sys/atomic.h
@@ -93,11 +93,9 @@ static int (* const xlgpio_intrs[])(void
};
struct xlgpio_intrpin {
- int (*gip_func)(void *);
- void *gip_arg;
+ struct rmixl_intrhand_common gip_ihc;
uint8_t gip_ipl;
uint8_t gip_ist;
- bool gip_mpsafe;
char gip_pin_name[sizeof(pin XX)];
};
@@ -142,7 +140,10 @@ static struct xlgpio_softc xlgpio_sc = {
[0 ... 2*PINGROUP-1] = {
.gip_ipl = IPL_NONE,
.gip_ist = IST_NONE,
- .gip_func = xlgpio_stray_intr,
+ .gip_ihc = {
+.ihc_func = xlgpio_stray_intr,
+.ihc_disestablish = gpio_intr_disestablish,
+ },
},
},
.sc_groups = {
@@ -260,7 +261,7 @@ xlgpio_pci_attach(device_t parent, devic
snprintf(gip-gip_pin_name, sizeof(gip-gip_pin_name),
pin %zu, pin);
- KASSERT(gip-gip_func == xlgpio_stray_intr);
+ KASSERT(gip-gip_ihc.ihc_func == xlgpio_stray_intr);
}
/*
@@ -367,8 +368,8 @@ xlgpio_group_intr(struct xlgpio_softc *s
struct xlgpio_intrpin * const gip = gg-gg_pins[pin];
KASSERT(gip-gip_ipl == ipl);
- const int nrv = rmixl_intr_deliver(gip-gip_func, gip-gip_arg,
- gip-gip_mpsafe, evs[pin], ipl);
+ const int nrv = rmixl_intr_deliver(gip-gip_ihc,
+ evs[pin], ipl);
if (nrv)
rv = nrv;
sts = PIN_MASK(pin);
@@ -469,16 +470,18 @@ gpio_intr_establish(size_t pin, int ipl,
return NULL;
KASSERT((*inten_p mask) == 0);
- KASSERT(gip-gip_func != xlgpio_stray_intr);
+ KASSERT(gip-gip_ihc.ihc_func != xlgpio_stray_intr);
KASSERT(gip-gip_ipl == IPL_NONE);
KASSERT(gip-gip_ist == IST_NONE);
mutex_enter(sc-sc_intr_lock);
gip-gip_ipl = ipl;
- gip-gip_func = func;
- gip-gip_arg = arg;
- gip-gip_mpsafe = mpsafe;
+ gip-gip_ihc.ihc_func = func;
+ gip-gip_ihc.ihc_arg = arg;
+#ifdef MULTIPROCESSOR
+ gip-gip_ihc.ihc_mpsafe = mpsafe;
+#endif
if (ist == IST_EDGE) {
atomic_or_32(gg-gg_inttype, mask);
@@ -519,7 +522,7 @@ gpio_intr_disestablish(void *v)
KASSERT(sc-sc_pins[pin] == gip);
KASSERT(pin __arraycount(sc-sc_pins));
- KASSERT(gip-gip_func != xlgpio_stray_intr);
+ KASSERT(gip-gip_ihc.ihc_func != xlgpio_stray_intr);
*inten_p = ~mask;
xlgpio_write_4(sc, gg-gg_r_inten[gip-gip_ipl - IPL_VM], *inten_p);
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Tue Nov 5 18:44:02 UTC 2013
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_nand_pci.c
Log Message:
Start of a nand for xlp3xx/xlp2xx.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.2 -r1.1.2.3 src/sys/arch/mips/rmi/rmixl_nand_pci.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_nand_pci.c
diff -u src/sys/arch/mips/rmi/rmixl_nand_pci.c:1.1.2.2 src/sys/arch/mips/rmi/rmixl_nand_pci.c:1.1.2.3
--- src/sys/arch/mips/rmi/rmixl_nand_pci.c:1.1.2.2 Fri Dec 30 06:48:56 2011
+++ src/sys/arch/mips/rmi/rmixl_nand_pci.c Tue Nov 5 18:44:02 2013
@@ -27,16 +27,18 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
+#include locators.h
+
#include sys/cdefs.h
-__KERNEL_RCSID(1, $NetBSD: rmixl_nand_pci.c,v 1.1.2.2 2011/12/30 06:48:56 matt Exp $);
+__KERNEL_RCSID(1, $NetBSD: rmixl_nand_pci.c,v 1.1.2.3 2013/11/05 18:44:02 matt Exp $);
#include sys/param.h
+#include sys/condvar.h
#include sys/device.h
+#include sys/mutex.h
#include sys/bus.h
-#include locators.h
-
#include dev/pci/pcireg.h
#include dev/pci/pcivar.h
#include dev/pci/pcidevs.h
@@ -51,27 +53,118 @@ __KERNEL_RCSID(1, $NetBSD: rmixl_nand_p
static int xlnand_pci_match(device_t, cfdata_t, void *);
static void xlnand_pci_attach(device_t, device_t, void *);
+static int xlnand_pci_detach(device_t, int);
+
+static int xlnand_read_page(device_t, size_t, uint8_t *);
+static int xlnand_program_page(device_t, size_t, const uint8_t *);
+
+static void xlnand_select(device_t, bool);
+static void xlnand_command(device_t, uint8_t);
+static void xlnand_address(device_t, uint8_t);
+static void xlnand_busy(device_t);
+static void xlnand_read_buf(device_t, void *, size_t);
+static void xlnand_write_buf(device_t, const void *, size_t);
+
+static void xlnand_read_1(device_t, uint8_t *);
+static void xlnand_read_2(device_t, uint16_t *);
+static void xlnand_write_1(device_t, uint8_t);
+static void xlnand_write_2(device_t, uint16_t);
+
+static int xlnand_intr(void *);
+
+struct xlnand_chip {
+ device_t xlch_nanddev;
+ kcondvar_t xlch_cv_ready;
+
+ uint32_t xlch_cmds;
+ uint64_t xlch_addrs;
+ uint32_t xlch_data;
+ uint32_t xlch_int_mask;
+ uint8_t xlch_cmdshift;
+ uint8_t xlch_addrshift;
+ uint8_t xlch_num;
+ uint8_t xlch_datalen;
+ uint8_t xlch_chipnum;
+
+ struct nand_interface xlch_nand_if;
+ char xlch_wmesg[16];
+};
struct xlnand_softc {
- device_t sc_dev;
- bus_space_tag_t sc_bst;
- bus_space_handle_t sc_bsh;
+ device_t xlsc_dev;
+ bus_dma_tag_t xlsc_dmat;
+ bus_space_tag_t xlsc_bst;
+ bus_space_handle_t xlsc_bsh;
+ void *xlsc_ih;
+ uint8_t xlsc_buswidth;
+
+ kcondvar_t xlsc_cv_available;
+ struct xlnand_chip *xlsc_active_chip;
+
+ bus_dma_segment_t xlsc_xferseg;
+ bus_dmamap_t xlsc_xfermap;
+ void *xlsc_xferbuf;
+
+ struct xlnand_chip xlsc_chips[8];
+
+ kmutex_t xlsc_intr_lock __aligned(64);
+ kmutex_t xlsc_wait_lock __aligned(64);
+};
+
+#define CMDSEQ1(a,b) (((ONFI_ ## b) 8) | RMIXLP_NAND_CMD_ ## a)
+#define CMDSEQ2(a,b,c) (((ONFI_ ## c) 16) | CMDSEQ1(a,b))
+#define CMDSEQ3(a,b,c,d) (((ONFI_ ## d) 14) | CMDSEQ2(a,b,c))
+
+static const uint32_t xlnand_cmdseqs[] = {
+ CMDSEQ1(SEQ_0, RESET),
+ //CMDSEQ1(SEQ_0, SYNCRONOUS_RESET),
+ CMDSEQ1(SEQ_1, READ_ID),
+ CMDSEQ1(SEQ_2, READ_UNIQUE_ID),
+ CMDSEQ1(SEQ_2, READ_PARAMETER_PAGE),
+ CMDSEQ1(SEQ_2, GET_FEATURES),
+ CMDSEQ1(SEQ_3, SET_FEATURES),
+ //CMDSEQ1(SEQ_17, SET_FEATURES2),
+ CMDSEQ1(SEQ_4, READ_STATUS),
+ //CMDSEQ1(SEQ_5, SELECT_LUN_WITH_STATUS),
+ CMDSEQ2(SEQ_6, CHANGE_READ_COLUMN, CHANGE_READ_COLUMN_START),
+ //CMDSEQ2(SEQ_7, SELECT_CACHE_REGISTER, CHANGE_READ_COLUMN_START),
+ //CMDSEQ1(SEQ_8, CHANGE_WRITE_COLUMN),
+ //CMDSEQ1(SEQ_12, CHANGE_ROW_ADDRESS),
+ CMDSEQ2(SEQ_10, READ, READ_START),
+ CMDSEQ2(SEQ_10, READ, READ_CACHE_RANDOM),
+ CMDSEQ1(SEQ_11, READ_CACHE_SEQUENTIAL),
+ CMDSEQ1(SEQ_11, READ_CACHE_END),
+ CMDSEQ2(SEQ_12, READ, READ_INTERLEAVED),
+ //CMDSEQ2(SEQ_15, READ, READ, READ_START),
+ CMDSEQ2(SEQ_12, PAGE_PROGRAM, PAGE_PROGRAM_START),
+ CMDSEQ1(SEQ_13, PAGE_PROGRAM),
+ CMDSEQ2(SEQ_12, PAGE_PROGRAM, PAGE_CACHE_PROGRAM),
+ CMDSEQ2(SEQ_12, PAGE_PROGRAM, PAGE_PROGRAM_INTERLEAVED),
+ //CMDSEQ1(SEQ_0, WRITE_PAGE),
+ //CMDSEQ1(SEQ_0, WRITE_PAGE_CACHE),
+ //CMDSEQ1(SEQ_0, WRITE_PAGE_INTERLEAVED),
+ CMDSEQ2(SEQ_10, READ, READ_COPYBACK),
+ CMDSEQ2(SEQ_9, COPYBACK_PROGRAM, COPYBACK_PROGRAM_START),
+ CMDSEQ2(SEQ_12, COPYBACK_PROGRAM, COPYBACK_PROGRAM_INTERLEAVED),
+ CMDSEQ1(SEQ_13, COPYBACK_PROGRAM),
+ CMDSEQ2(SEQ_14, BLOCK_ERASE, BLOCK_ERASE_START),
+ CMDSEQ2(SEQ_14, BLOCK_ERASE, BLOCK_ERASE_INTERLEAVED),
};
static inline uint32_t
-xlnand_read_4(struct xlnand_softc *sc, bus_size_t off)
+xlnand_read_4(struct xlnand_softc *xlsc, bus_size_t off)
{
- return bus_space_read_4(sc-sc_bst, sc-sc_bsh, off);
+ return bus_space_read_4(xlsc-xlsc_bst, xlsc-xlsc_bsh, off);
}
static inline void
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Thu Aug 9 19:46:40 UTC 2012
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_fmn_pci.c
Log Message:
Deal with unallocated spill area in the fmn.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.1 -r1.1.2.2 src/sys/arch/mips/rmi/rmixl_fmn_pci.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_fmn_pci.c
diff -u src/sys/arch/mips/rmi/rmixl_fmn_pci.c:1.1.2.1 src/sys/arch/mips/rmi/rmixl_fmn_pci.c:1.1.2.2
--- src/sys/arch/mips/rmi/rmixl_fmn_pci.c:1.1.2.1 Thu Jan 19 17:34:18 2012
+++ src/sys/arch/mips/rmi/rmixl_fmn_pci.c Thu Aug 9 19:46:40 2012
@@ -29,7 +29,7 @@
#include sys/cdefs.h
-__KERNEL_RCSID(1, $NetBSD: rmixl_fmn_pci.c,v 1.1.2.1 2012/01/19 17:34:18 matt Exp $);
+__KERNEL_RCSID(1, $NetBSD: rmixl_fmn_pci.c,v 1.1.2.2 2012/08/09 19:46:40 matt Exp $);
#include sys/param.h
#include sys/device.h
@@ -237,10 +237,14 @@ xlfmn_pci_attach(device_t parent, device
* allocated to it.
*/
if (oq_config RMIXLP_FMN_OQ_CONFIG_SE) {
- if (((64 * sb + ss) 12) sc-sc_spill_base)
-sc-sc_spill_base = (64 * sb + ss) 12;
- if (((64 * sb + sl + 1) 12) sc-sc_spill_limit)
-sc-sc_spill_limit = (64 * sb + sl + 1) 12;
+ paddr_t spill_base = (64 * sb + ss) 12;
+ paddr_t spill_limit = (64 * sb + sl + 1) 12;
+ if (spill_base spill_limit) {
+if (spill_base sc-sc_spill_base)
+ sc-sc_spill_base = spill_base;
+if (spill_limit sc-sc_spill_limit)
+ sc-sc_spill_limit = spill_limit;
+ }
}
if ((oq_config RMIXLP_FMN_OQ_CONFIG_OE) == 0)
@@ -297,15 +301,19 @@ xlfmn_pci_attach(device_t parent, device
spill area: %s: base=%#PRIxPADDR, limit=%#PRIxPADDR\n,
buf, sc-sc_spill_base, sc-sc_spill_limit);
- /*
- * Let's try to allocate the spill area.
- */
- struct pglist mlist;
- int error = uvm_pglistalloc(sc-sc_spill_limit - sc-sc_spill_base,
- sc-sc_spill_base, sc-sc_spill_limit, 0, 0, mlist, 1, true);
- if (error)
- aprint_error_dev(sc-sc_dev,
- failed to allocate spill area: %d\n, error);
+ if (sc-sc_spill_base sc-sc_spill_limit) {
+ /*
+ * Let's try to allocate the spill area.
+ */
+ struct pglist mlist;
+ int error = uvm_pglistalloc(
+ sc-sc_spill_limit - sc-sc_spill_base,
+ sc-sc_spill_base, sc-sc_spill_limit,
+ 0, 0, mlist, 1, true);
+ if (error)
+ aprint_error_dev(sc-sc_dev,
+ failed to allocate spill area: %d\n, error);
+ }
aprint_normal_dev(sc-sc_dev, active queues: );
const char *pfx = ;
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Fri Mar 30 01:04:48 UTC 2012
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_fmn.c
Log Message:
Deal with station ids without names (not all XLS have all stations).
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.11 -r1.1.2.12 src/sys/arch/mips/rmi/rmixl_fmn.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_fmn.c
diff -u src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.11 src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.12
--- src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.11 Thu Jan 19 10:29:34 2012
+++ src/sys/arch/mips/rmi/rmixl_fmn.c Fri Mar 30 01:04:47 2012
@@ -790,8 +790,10 @@ rmixl_fmn_cpu_attach(struct cpu_info *ci
KASSERT(xname != NULL);
for (size_t i = 1; i fmn_info.fmn_nstid; i++) {
- evcnt_attach_dynamic(sc-sc_fmn_stid_evcnts[i],
- EVCNT_TYPE_MISC, NULL, xname, fmn_stid_ev_names[i]);
+ if (fmn_stid_ev_names[i][0] != '\0') {
+ evcnt_attach_dynamic(sc-sc_fmn_stid_evcnts[i],
+ EVCNT_TYPE_MISC, NULL, xname, fmn_stid_ev_names[i]);
+ }
}
for (size_t i = 0; i fmn_info.fmn_nbucket; i++) {
@@ -811,9 +813,11 @@ rmixl_fmn_init_thread(void)
KASSERT(fmn-fmn_stinfo[0].si_name == NULL);
for (size_t i = 1; i fmn_info.fmn_nstid; i++) {
- KASSERT(fmn-fmn_stinfo[i].si_name != NULL);
- snprintf(fmn_stid_ev_names[i], sizeof(fmn_stid_ev_names[i]),
- fmn %s rx msgs, fmn-fmn_stinfo[i].si_name);
+ if (fmn-fmn_stinfo[i].si_name != NULL) {
+ snprintf(fmn_stid_ev_names[i],
+ sizeof(fmn_stid_ev_names[i]),
+ fmn %s rx msgs, fmn-fmn_stinfo[i].si_name);
+ }
}
if (CPU_IS_PRIMARY(ci)) {
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Mon Feb 27 17:03:37 UTC 2012
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_cpuvar.h rmixl_intr.c
Log Message:
Add a test for recursive IPIs.
use __builtin_clzll
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.5 -r1.1.2.6 src/sys/arch/mips/rmi/rmixl_cpuvar.h
cvs rdiff -u -r1.1.2.35 -r1.1.2.36 src/sys/arch/mips/rmi/rmixl_intr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_cpuvar.h
diff -u src/sys/arch/mips/rmi/rmixl_cpuvar.h:1.1.2.5 src/sys/arch/mips/rmi/rmixl_cpuvar.h:1.1.2.6
--- src/sys/arch/mips/rmi/rmixl_cpuvar.h:1.1.2.5 Thu Jan 19 08:05:24 2012
+++ src/sys/arch/mips/rmi/rmixl_cpuvar.h Mon Feb 27 17:03:36 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_cpuvar.h,v 1.1.2.5 2012/01/19 08:05:24 matt Exp $ */
+/* rmixl_cpuvar.h,v 1.1.2.5 2012/01/19 08:05:24 matt Exp */
/*-
* Copyright (c) 2010 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -49,6 +49,7 @@ struct cpu_softc {
struct evcnt sc_irt_evcnts[160];
struct evcnt sc_fmn_stid_evcnts[RMIXL_FMN_NSTID];
struct evcnt sc_fmn_cpu_evcnts[8];
+ bool sc_in_ipi;
};
#endif /* _ARCH_MIPS_RMI_RMIXL_CPUVAR_H_ */
Index: src/sys/arch/mips/rmi/rmixl_intr.c
diff -u src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.35 src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.36
--- src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.35 Thu Jan 19 08:05:24 2012
+++ src/sys/arch/mips/rmi/rmixl_intr.c Mon Feb 27 17:03:36 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_intr.c,v 1.1.2.35 2012/01/19 08:05:24 matt Exp $ */
+/* rmixl_intr.c,v 1.1.2.35 2012/01/19 08:05:24 matt Exp */
/*-
* Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
@@ -64,7 +64,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.35 2012/01/19 08:05:24 matt Exp $);
+__KERNEL_RCSID(0, rmixl_intr.c,v 1.1.2.35 2012/01/19 08:05:24 matt Exp);
#include opt_ddb.h
#include opt_multiprocessor.h
@@ -761,16 +761,6 @@ void rmixl_ipl_eimr_map_print(void);
#endif
-static inline u_int
-dclz(uint64_t val)
-{
- u_int nlz;
-
- __asm volatile(dclz %0, %1 : =r(nlz) : r(val));
-
- return nlz;
-}
-
void
evbmips_intr_init(void)
{
@@ -1412,7 +1402,7 @@ evbmips_iointr(int ipl, vaddr_t pc, uint
if (eirr == 0)
break;
- vec = 63 - dclz(eirr);
+ vec = 63 - __builtin_clzll(eirr);
rmixl_intrvec_t * const iv = rmixl_intrvec[vec];
vecbit = 1ULL vec;
KASSERT (iv-iv_ipl == ipl);
@@ -1495,11 +1485,14 @@ rmixl_ipi_intr(void *arg)
KASSERT(ci-ci_cpl = IPL_SCHED);
KASSERT((uintptr_t)arg NIPIS);
+ KASSERT(!ci-ci_softc-sc_in_ipi);
/* if the request is clear, it was previously processed */
if ((ci-ci_request_ipis ipi_mask) == 0)
return 0;
+ ci-ci_softc-sc_in_ipi = true;
+
atomic_or_64(ci-ci_active_ipis, ipi_mask);
atomic_and_64(ci-ci_request_ipis, ~ipi_mask);
@@ -1507,6 +1500,7 @@ rmixl_ipi_intr(void *arg)
atomic_and_64(ci-ci_active_ipis, ~ipi_mask);
+ ci-ci_softc-sc_in_ipi = false;
return 1;
}
#endif /* MULTIPROCESSOR */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: matt Date: Thu Feb 16 10:48:39 UTC 2012 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_machdep.c Log Message: Add mips_ksegx_tlb_slot. When casting pointers, use intptr_t so we get proper sign extension. To generate a diff of this commit: cvs rdiff -u -r1.1.2.3 -r1.1.2.4 src/sys/arch/mips/rmi/rmixl_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixl_machdep.c diff -u src/sys/arch/mips/rmi/rmixl_machdep.c:1.1.2.3 src/sys/arch/mips/rmi/rmixl_machdep.c:1.1.2.4 --- src/sys/arch/mips/rmi/rmixl_machdep.c:1.1.2.3 Thu Feb 2 00:21:00 2012 +++ src/sys/arch/mips/rmi/rmixl_machdep.c Thu Feb 16 10:48:39 2012 @@ -204,6 +204,7 @@ struct rmixl_config rmixl_configuration #ifdef ENABLE_MIPS_KSEGX pt_entry_t mips_ksegx_pte; paddr_t mips_ksegx_start; +int mips_ksegx_tlb_slot = -1; #endif /* @@ -847,7 +848,7 @@ rmixl_fixup_curcpu(void) * just change the instruction bits around it. */ *insnp = insn ^ LOAD_CURCPU ^ MFC0_CURCPU; - mips_icache_sync_range((vaddr_t)insnp, 4); + mips_icache_sync_range((intptr_t)insnp, 4); } } }
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: matt Date: Thu Feb 16 18:57:16 UTC 2012 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_fmnvar.h Log Message: enable_cp2 needs a early clobber To generate a diff of this commit: cvs rdiff -u -r1.1.2.8 -r1.1.2.9 src/sys/arch/mips/rmi/rmixl_fmnvar.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixl_fmnvar.h diff -u src/sys/arch/mips/rmi/rmixl_fmnvar.h:1.1.2.8 src/sys/arch/mips/rmi/rmixl_fmnvar.h:1.1.2.9 --- src/sys/arch/mips/rmi/rmixl_fmnvar.h:1.1.2.8 Thu Jan 19 10:29:34 2012 +++ src/sys/arch/mips/rmi/rmixl_fmnvar.h Thu Feb 16 18:57:15 2012 @@ -239,7 +239,7 @@ rmixl_cp2_enable(void) or %[sr],%[mask] \n\t mtc0 %[sr],$%[c0_status] \n\t .set pop \n\t - : [rv] =r (rv), + : [rv] =r (rv), [sr] =r (sr) : [c0_status] n (MIPS_COP_0_STATUS), [mask] r (MIPS_SR_COP_2_BIT));
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Thu Feb 2 23:35:35 UTC 2012
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_pcix.c
Log Message:
We use avail_clusters_cnt now.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.12 -r1.1.2.13 src/sys/arch/mips/rmi/rmixl_pcix.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_pcix.c
diff -u src/sys/arch/mips/rmi/rmixl_pcix.c:1.1.2.12 src/sys/arch/mips/rmi/rmixl_pcix.c:1.1.2.13
--- src/sys/arch/mips/rmi/rmixl_pcix.c:1.1.2.12 Wed Jan 4 16:17:54 2012
+++ src/sys/arch/mips/rmi/rmixl_pcix.c Thu Feb 2 23:35:35 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_pcix.c,v 1.1.2.12 2012/01/04 16:17:54 matt Exp $ */
+/* rmixl_pcix.c,v 1.1.2.12 2012/01/04 16:17:54 matt Exp */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -40,7 +40,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_pcix.c,v 1.1.2.12 2012/01/04 16:17:54 matt Exp $);
+__KERNEL_RCSID(0, rmixl_pcix.c,v 1.1.2.12 2012/01/04 16:17:54 matt Exp);
#include opt_pci.h
#include pci.h
@@ -331,7 +331,7 @@ rmixl_pcix_attach(device_t parent, devic
* HBAR[0,1] if a 64 bit BAR pair
* must cover all RAM
*/
- extern u_quad_t mem_cluster_maxaddr;
+ extern u_quad_t avail_cluster_maxaddr;
uint64_t hbar_addr;
uint64_t hbar_size;
uint32_t hbar_size_lo, hbar_size_hi;
@@ -348,7 +348,7 @@ rmixl_pcix_attach(device_t parent, devic
hbar_addr |= (uint64_t)hbar_addr_hi 32;
hbar_size |= (uint64_t)hbar_size_hi 32;
}
- if ((hbar_addr != 0) || (hbar_size mem_cluster_maxaddr)) {
+ if ((hbar_addr != 0) || (hbar_size avail_cluster_maxaddr)) {
int error;
aprint_error_dev(self, HostBAR0 addr %#x, size %#x\n,
@@ -359,7 +359,7 @@ rmixl_pcix_attach(device_t parent, devic
aprint_error_dev(self, WARNING: firmware PCI-X setup error:
RAM %#PRIx64..%#PRIx64 not accessible by Host BAR,
enabling DMA bounce buffers\n,
- hbar_size, mem_cluster_maxaddr-1);
+ hbar_size, avail_cluster_maxaddr-1);
/*
* force use of bouce buffers for inaccessible RAM addrs
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: matt Date: Thu Feb 2 00:21:00 UTC 2012 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_machdep.c Log Message: Fix XLP case where we weren't copying mem_clusters to avail_clusters. To generate a diff of this commit: cvs rdiff -u -r1.1.2.2 -r1.1.2.3 src/sys/arch/mips/rmi/rmixl_machdep.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixl_machdep.c diff -u src/sys/arch/mips/rmi/rmixl_machdep.c:1.1.2.2 src/sys/arch/mips/rmi/rmixl_machdep.c:1.1.2.3 --- src/sys/arch/mips/rmi/rmixl_machdep.c:1.1.2.2 Fri Jan 27 21:23:31 2012 +++ src/sys/arch/mips/rmi/rmixl_machdep.c Thu Feb 2 00:21:00 2012 @@ -1122,6 +1122,8 @@ rmixlp_physaddr_dram_init(struct extent } mem_cluster_cnt = mp - mem_clusters; + avail_cluster_cnt = mem_cluster_cnt; + memcpy(avail_clusters, mem_clusters, sizeof(avail_clusters)); return memsize; } #endif /* MIPS64_XLP */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Fri Jan 27 21:23:31 UTC 2012
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_machdep.c
Log Message:
Keep mem_clusters as the original amount of memory and add avail_cluster
as the edited version.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.1 -r1.1.2.2 src/sys/arch/mips/rmi/rmixl_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_machdep.c
diff -u src/sys/arch/mips/rmi/rmixl_machdep.c:1.1.2.1 src/sys/arch/mips/rmi/rmixl_machdep.c:1.1.2.2
--- src/sys/arch/mips/rmi/rmixl_machdep.c:1.1.2.1 Wed Jan 4 16:17:54 2012
+++ src/sys/arch/mips/rmi/rmixl_machdep.c Fri Jan 27 21:23:31 2012
@@ -252,8 +252,10 @@ int physmem; /* Total physical memory *
int netboot; /* Are we netbooting? */
+phys_ram_seg_t avail_clusters[VM_PHYSSEG_MAX];
+u_int avail_cluster_cnt;
+u_quad_t avail_cluster_maxaddr;
phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
-u_quad_t mem_cluster_maxaddr;
u_int mem_cluster_cnt;
static uint64_t mem_clusters_init(rmixlfw_mmap_t *, rmixlfw_mmap_t *);
@@ -654,28 +656,28 @@ rmixl_mach_init_common(struct rmixl_conf
*/
/* reserve 0..start..kernend pages */
- mem_cluster_cnt = ram_seg_resv(mem_clusters, mem_cluster_cnt,
+ avail_cluster_cnt = ram_seg_resv(avail_clusters, avail_cluster_cnt,
0, round_page(MIPS_KSEG0_TO_PHYS(kernend)));
/* reserve reset exception vector page */
/* should never be in our clusters anyway... */
- mem_cluster_cnt = ram_seg_resv(mem_clusters, mem_cluster_cnt,
+ avail_cluster_cnt = ram_seg_resv(avail_clusters, avail_cluster_cnt,
0x1FC0, 0x1FC0+NBPG);
/* Stop this abomination */
- mem_cluster_cnt = ram_seg_resv(mem_clusters, mem_cluster_cnt,
+ avail_cluster_cnt = ram_seg_resv(avail_clusters, avail_cluster_cnt,
0x1800, 0x2000);
#ifdef MULTIPROCESSOR
/* reserve the cpu_wakeup_info area */
- mem_cluster_cnt = ram_seg_resv(mem_clusters, mem_cluster_cnt,
+ avail_cluster_cnt = ram_seg_resv(avail_clusters, avail_cluster_cnt,
(u_quad_t)trunc_page((vaddr_t)rcp-rc_cpu_wakeup_info),
(u_quad_t)round_page((vaddr_t)rcp-rc_cpu_wakeup_end));
#endif
#ifdef MEMLIMIT
/* reserve everything = MEMLIMIT */
- mem_cluster_cnt = ram_seg_resv(mem_clusters, mem_cluster_cnt,
+ avail_cluster_cnt = ram_seg_resv(avail_clusters, avail_cluster_cnt,
(u_quad_t)MEMLIMIT, (u_quad_t)~0);
#endif
@@ -684,10 +686,10 @@ rmixl_mach_init_common(struct rmixl_conf
* Now we need to reserve an aligned block of memory for pre-init
* allocations so we don't deplete KSEG0.
*/
- for (u_int i=0; i mem_cluster_cnt; i++) {
+ for (u_int i=0; i avail_cluster_cnt; i++) {
u_quad_t finish = round_page(
- mem_clusters[i].start + mem_clusters[i].size);
- u_quad_t start = roundup2(mem_clusters[i].start, VM_KSEGX_SIZE);
+ avail_clusters[i].start + avail_clusters[i].size);
+ u_quad_t start = roundup2(avail_clusters[i].start, VM_KSEGX_SIZE);
if (start MIPS_PHYS_MASK start + VM_KSEGX_SIZE = finish) {
mips_ksegx_start = start;
mips_ksegx_pte.pt_entry = mips_paddr_to_tlbpfn(start)
@@ -705,20 +707,20 @@ rmixl_mach_init_common(struct rmixl_conf
#endif
/* get maximum RAM address from the VM clusters */
- mem_cluster_maxaddr = 0;
- for (u_int i=0; i mem_cluster_cnt; i++) {
+ avail_cluster_maxaddr = 0;
+ for (u_int i=0; i avail_cluster_cnt; i++) {
u_quad_t tmp = round_page(
- mem_clusters[i].start + mem_clusters[i].size);
- if (tmp mem_cluster_maxaddr)
- mem_cluster_maxaddr = tmp;
+ avail_clusters[i].start + avail_clusters[i].size);
+ if (tmp avail_cluster_maxaddr)
+ avail_cluster_maxaddr = tmp;
}
- DPRINTF(mem_cluster_maxaddr %#PRIx64\n, mem_cluster_maxaddr);
+ DPRINTF(avail_cluster_maxaddr %#PRIx64\n, avail_cluster_maxaddr);
/*
- * Load mem_clusters[] into the VM system.
+ * Load avail_clusters[] into the VM system.
*/
mips_page_physload(MIPS_KSEG0_START, (vaddr_t) kernend,
- mem_clusters, mem_cluster_cnt, fl, fl_count);
+ avail_clusters, avail_cluster_cnt, fl, fl_count);
/*
* Initialize error message buffer (at end of core).
@@ -1156,6 +1158,8 @@ rmixl_physaddr_dram_init(struct extent *
}
mem_cluster_cnt = mp - mem_clusters;
+ avail_cluster_cnt = mem_cluster_cnt;
+ memcpy(avail_clusters, mem_clusters, sizeof(avail_clusters));
return memsize;
}
@@ -1278,12 +1282,16 @@ rmixlfw_init(int64_t infop)
mem_clusters[0].start = 0;
mem_clusters[0].size = MEMSIZE;
mem_cluster_cnt = 1;
+ memcpy(avail_clusters, mem_clusters, sizeof(avail_clusters[0]));
+ avail_cluster_cnt = cnt;
return MEMSIZE;
#else
uint64_t memsize = 0;
for (size_t i = 0; i mem_cluster_cnt; i++) {
memsize += mem_clusters[i].size;
+ avail_clusters[i] = mem_clusters[i];
}
+ avail_cluster_cnt = mem_cluster_cnt;
if (memsize)
return memsize;
@@ -1426,6 +1434,8 @@ mem_clusters_init(
cnt++;
}
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Thu Jan 19 08:03:22 UTC 2012
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixlvar.h
Log Message:
Improved true/false for cpu_rmixl?
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.25 -r1.1.2.26 src/sys/arch/mips/rmi/rmixlvar.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixlvar.h
diff -u src/sys/arch/mips/rmi/rmixlvar.h:1.1.2.25 src/sys/arch/mips/rmi/rmixlvar.h:1.1.2.26
--- src/sys/arch/mips/rmi/rmixlvar.h:1.1.2.25 Wed Jan 4 16:17:54 2012
+++ src/sys/arch/mips/rmi/rmixlvar.h Thu Jan 19 08:03:22 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixlvar.h,v 1.1.2.25 2012/01/04 16:17:54 matt Exp $ */
+/* $NetBSD: rmixlvar.h,v 1.1.2.26 2012/01/19 08:03:22 matt Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -67,7 +67,11 @@ static inline bool
cpu_rmixlr(const struct pridtab *ct)
{
#ifdef MIPS64_XLR
+#if (MIPS64_XLS + MIPS64_XLP) == 0
+ return true;
+#else
return cpu_rmixl(ct) cpu_rmixl_chip_type(ct) == CIDFL_RMI_TYPE_XLR;
+#endif
#else
return false;
#endif
@@ -77,7 +81,11 @@ static inline bool
cpu_rmixls(const struct pridtab *ct)
{
#ifdef MIPS64_XLS
+#if (MIPS64_XLR + MIPS64_XLP) == 0
+ return true;
+#else
return cpu_rmixl(ct) cpu_rmixl_chip_type(ct) == CIDFL_RMI_TYPE_XLS;
+#endif
#else
return false;
#endif
@@ -87,7 +95,11 @@ static inline bool
cpu_rmixlp(const struct pridtab *ct)
{
#ifdef MIPS64_XLP
+#if (MIPS64_XLR + MIPS64_XLS) == 0
+ return true;
+#else
return cpu_rmixl(ct) cpu_rmixl_chip_type(ct) == CIDFL_RMI_TYPE_XLP;
+#endif
#else
return false;
#endif
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Thu Jan 19 08:05:24 UTC 2012
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_cpu.c rmixl_cpuvar.h
rmixl_fmn.c rmixl_intr.c
Log Message:
Change struct rmixl_cpu_softc to cpu_softc and remove casts.
Fix IPIs.
More FMN cleanup.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.23 -r1.1.2.24 src/sys/arch/mips/rmi/rmixl_cpu.c
cvs rdiff -u -r1.1.2.4 -r1.1.2.5 src/sys/arch/mips/rmi/rmixl_cpuvar.h
cvs rdiff -u -r1.1.2.9 -r1.1.2.10 src/sys/arch/mips/rmi/rmixl_fmn.c
cvs rdiff -u -r1.1.2.34 -r1.1.2.35 src/sys/arch/mips/rmi/rmixl_intr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_cpu.c
diff -u src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.23 src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.24
--- src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.23 Wed Jan 4 16:17:53 2012
+++ src/sys/arch/mips/rmi/rmixl_cpu.c Thu Jan 19 08:05:24 2012
@@ -71,7 +71,7 @@ __KERNEL_RCSID(0, rmixl_cpu.c,v 1.1.2.2
static int cpu_rmixl_match(device_t, cfdata_t, void *);
static void cpu_rmixl_attach(device_t, device_t, void *);
-static void cpu_rmixl_attach_primary(struct rmixl_cpu_softc * const);
+static void cpu_rmixl_attach_primary(struct cpu_softc * const);
#ifdef NOTYET
static int cpu_fmn_intr(void *, rmixl_fmn_rxmsg_t *);
#endif
@@ -92,7 +92,7 @@ struct cpu_info *
rmixl_cpuinfo_print(u_int);
#endif /* DEBUG */
-CFATTACH_DECL_NEW(cpu_rmixl, sizeof(struct rmixl_cpu_softc),
+CFATTACH_DECL_NEW(cpu_rmixl, sizeof(struct cpu_softc),
cpu_rmixl_match, cpu_rmixl_attach, NULL, NULL);
#ifdef MULTIPROCESSOR
@@ -177,7 +177,7 @@ cpu_rmixl_match(device_t parent, cfdata_
static void
cpu_rmixl_attach(device_t parent, device_t self, void *aux)
{
- struct rmixl_cpu_softc * const sc = device_private(self);
+ struct cpu_softc * const sc = device_private(self);
struct cpu_info *ci = NULL;
static bool once = false;
extern void rmixl_spl_init_cpu(void);
@@ -252,7 +252,7 @@ cpu_rmixl_attach(device_t parent, device
* attach the primary processor
*/
static void
-cpu_rmixl_attach_primary(struct rmixl_cpu_softc * const sc)
+cpu_rmixl_attach_primary(struct cpu_softc * const sc)
{
struct cpu_info *ci = sc-sc_ci;
uint32_t ebase;
@@ -286,8 +286,8 @@ cpu_rmixl_attach_primary(struct rmixl_cp
void
cpu_rmixl_run(struct cpu_info *ci)
{
- struct rmixl_cpu_softc * const sc = (void *)ci-ci_softc;
- rmixl_fmn_init_thead();
+ struct cpu_softc * const sc = ci-ci_softc;
+ rmixl_fmn_init_thread();
cpucore_rmixl_run(device_parent(sc-sc_dev));
}
@@ -299,7 +299,7 @@ cpu_rmixl_run(struct cpu_info *ci)
void
cpu_rmixl_hatch(struct cpu_info *ci)
{
- struct rmixl_cpu_softc * const sc = (void *)ci-ci_softc;
+ struct cpu_softc * const sc = ci-ci_softc;
extern void rmixl_spl_init_cpu(void);
rmixl_spl_init_cpu(); /* spl initialization for this CPU */
@@ -395,7 +395,6 @@ cpu_setup_trampoline_callback(struct cpu
}
#endif /* MULTIPROCESSOR */
-
#ifdef DEBUG
void
rmixl_cpu_data_print(struct cpu_data *dp)
Index: src/sys/arch/mips/rmi/rmixl_cpuvar.h
diff -u src/sys/arch/mips/rmi/rmixl_cpuvar.h:1.1.2.4 src/sys/arch/mips/rmi/rmixl_cpuvar.h:1.1.2.5
--- src/sys/arch/mips/rmi/rmixl_cpuvar.h:1.1.2.4 Sat Dec 24 01:57:54 2011
+++ src/sys/arch/mips/rmi/rmixl_cpuvar.h Thu Jan 19 08:05:24 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_cpuvar.h,v 1.1.2.4 2011/12/24 01:57:54 matt Exp $ */
+/* $NetBSD: rmixl_cpuvar.h,v 1.1.2.5 2012/01/19 08:05:24 matt Exp $ */
/*-
* Copyright (c) 2010 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -31,17 +31,24 @@
#ifndef _ARCH_MIPS_RMI_RMIXL_CPUVAR_H_
#define _ARCH_MIPS_RMI_RMIXL_CPUVAR_H_
+#include mips/rmi/rmixl_fmnvar.h
+
struct rmixl_cpu_trampoline_args {
uint64_t ta_sp;
uint64_t ta_lwp;
uint64_t ta_cpuinfo;
};
-struct rmixl_cpu_softc {
+struct cpu_softc {
device_t sc_dev;
struct cpu_info *sc_ci;
+
+ void *sc_fmn_si; /* fast messaging network softint */
+
struct evcnt sc_vec_evcnts[64];
struct evcnt sc_irt_evcnts[160];
+ struct evcnt sc_fmn_stid_evcnts[RMIXL_FMN_NSTID];
+ struct evcnt sc_fmn_cpu_evcnts[8];
};
#endif /* _ARCH_MIPS_RMI_RMIXL_CPUVAR_H_ */
Index: src/sys/arch/mips/rmi/rmixl_fmn.c
diff -u src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.9 src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.10
--- src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.9 Wed Jan 4 16:17:53 2012
+++ src/sys/arch/mips/rmi/rmixl_fmn.c Thu Jan 19 08:05:24 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_fmn.c,v 1.1.2.9 2012/01/04 16:17:53 matt Exp $ */
+/* $NetBSD: rmixl_fmn.c,v 1.1.2.10 2012/01/19 08:05:24 matt Exp $ */
/*-
* Copyright (c) 2010 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -35,8 +35,8 @@
#include sys/param.h
#include sys/systm.h
#include sys/cpu.h
-#include sys/percpu.h
#include sys/atomic.h
+#include sys/intr.h
#include dev/pci/pcidevs.h
@@ -212,9 +212,10 @@ typedef struct fmn_intrhand {
typedef
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: matt Date: Thu Jan 19 08:06:54 UTC 2012 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixlreg.h Log Message: Fix IPI_CTRL_MAKE for RMIXLP Correct PCITAGs for CDE/SRIO/RXE. To generate a diff of this commit: cvs rdiff -u -r1.1.2.19 -r1.1.2.20 src/sys/arch/mips/rmi/rmixlreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixlreg.h diff -u src/sys/arch/mips/rmi/rmixlreg.h:1.1.2.19 src/sys/arch/mips/rmi/rmixlreg.h:1.1.2.20 --- src/sys/arch/mips/rmi/rmixlreg.h:1.1.2.19 Wed Jan 4 16:17:54 2012 +++ src/sys/arch/mips/rmi/rmixlreg.h Thu Jan 19 08:06:54 2012 @@ -1,4 +1,4 @@ -/* $NetBSD: rmixlreg.h,v 1.1.2.19 2012/01/04 16:17:54 matt Exp $ */ +/* $NetBSD: rmixlreg.h,v 1.1.2.20 2012/01/19 08:06:54 matt Exp $ */ /*- * Copyright (c) 2009 The NetBSD Foundation, Inc. @@ -1230,9 +1230,9 @@ #define RMIXLP_DMA_PCITAG _RMIXL_PCITAG(0,5,0) #define RMIXLP_SAE_PCITAG _RMIXL_PCITAG(0,5,1) #define RMIXLP_PKE_PCITAG _RMIXL_PCITAG(0,5,2) -#define RMIXLP_CDE_PCITAG _RMIXL_PCITAG(0,5,3) // 8xx/4xx -#define RMIXLP_SRIO_PCITAG _RMIXL_PCITAG(0,5,3) // 3xx -#define RMIXLP_RXE_PCITAG _RMIXL_PCITAG(0,5,4) +#define RMIXLP_CDE_PCITAG _RMIXL_PCITAG(0,5,3) +#define RMIXLP_SRIO_PCITAG _RMIXL_PCITAG(0,5,4) +#define RMIXLP_RXE_PCITAG _RMIXL_PCITAG(0,5,5) #define RMIXLP_UART1_PCITAG _RMIXL_PCITAG(0,6,0) #define RMIXLP_UART2_PCITAG _RMIXL_PCITAG(0,6,1) @@ -1249,8 +1249,11 @@ /* * PCI PCIe control (contains the IRT info) */ +#define PCI_RMIXLP_OQCOUNT _RMIXL_OFFSET(0x30) +#define PCI_RMIXLP_POE_FLOWS _RMIXL_OFFSET(0x30) #define PCI_RMIXLP_ONCHIP _RMIXL_OFFSET(0x31) #define PCI_RMIXLP_OFFCHIP _RMIXL_OFFSET(0x32) +#define PCI_RMIXLP_CONTEXTS _RMIXL_OFFSET(0x35) #define PCI_RMIXLP_STATID _RMIXL_OFFSET(0x3c) #define PCI_RMIXLP_IRTINFO _RMIXL_OFFSET(0x3d) @@ -1494,7 +1497,7 @@ #define RMIXLP_PIC_IPI_CTRL_DT __BITS(15,0) /* Dest Thread Enbs */ #define RMIXLP_PIC_IPI_CTRL_MAKE(nmi, tmask, tag) \ (__SHIFTIN((nmi), RMIXLP_PIC_IPI_CTRL_NMI) \ - | __SHIFTIN((tag), RMIXL_PIC_IPI_CTRL_RIV) \ + | __SHIFTIN((tag), RMIXLP_PIC_IPI_CTRL_RIV) \ | __SHIFTIN((tmask), RMIXLP_PIC_IPI_CTRL_DT)) /*
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: matt Date: Thu Jan 19 09:59:08 UTC 2012 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_fmnvar.h Log Message: Add more function prototypes. To generate a diff of this commit: cvs rdiff -u -r1.1.2.6 -r1.1.2.7 src/sys/arch/mips/rmi/rmixl_fmnvar.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixl_fmnvar.h diff -u src/sys/arch/mips/rmi/rmixl_fmnvar.h:1.1.2.6 src/sys/arch/mips/rmi/rmixl_fmnvar.h:1.1.2.7 --- src/sys/arch/mips/rmi/rmixl_fmnvar.h:1.1.2.6 Wed Jan 4 16:17:53 2012 +++ src/sys/arch/mips/rmi/rmixl_fmnvar.h Thu Jan 19 09:59:08 2012 @@ -1,4 +1,4 @@ -/* $Id: rmixl_fmnvar.h,v 1.1.2.6 2012/01/04 16:17:53 matt Exp $ */ +/* $Id: rmixl_fmnvar.h,v 1.1.2.7 2012/01/19 09:59:08 matt Exp $ */ /*- * Copyright (c) 2010 The NetBSD Foundation, Inc. * All rights reserved. @@ -31,6 +31,7 @@ #ifndef _ARCH_MIPS_RMIXL_RMIXL_FMNVAR_H_ #define _ARCH_MIPS_RMIXL_RMIXL_FMNVAR_H_ +#include sys/cpu.h #include mips/cpuregs.h #define RMIXL_FMN_CODE_PSB_WAKEUP 200 /* firmware MSGRNG_CODE_BOOT_WAKEUP */ @@ -346,11 +347,17 @@ rmixl_cp2_restore(uint32_t ocu) typedef int (*rmixl_fmn_intr_handler_t)(void *, rmixl_fmn_rxmsg_t *); +void rmixl_fmn_cpu_attach(struct cpu_info *ci); void rmixl_fmn_init(void); void rmixl_fmn_init_thread(void); void * rmixl_fmn_intr_establish(size_t, rmixl_fmn_intr_handler_t, void *); void rmixl_fmn_intr_disestablish(void *); void rmixl_fmn_intr_poll(u_int, rmixl_fmn_rxmsg_t *); + +size_t rmixl_fmn_qid_to_stid(size_t); +const char * + rmixl_fmn_stid_name(size_t); + /* * true == succes, false = failure */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: matt Date: Thu Jan 19 10:24:52 UTC 2012 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_iobus.c rmixl_usbi.c Log Message: Fix config ifattr. To generate a diff of this commit: cvs rdiff -u -r1.3.8.2 -r1.3.8.3 src/sys/arch/mips/rmi/rmixl_iobus.c cvs rdiff -u -r1.1.2.10 -r1.1.2.11 src/sys/arch/mips/rmi/rmixl_usbi.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixl_iobus.c diff -u src/sys/arch/mips/rmi/rmixl_iobus.c:1.3.8.2 src/sys/arch/mips/rmi/rmixl_iobus.c:1.3.8.3 --- src/sys/arch/mips/rmi/rmixl_iobus.c:1.3.8.2 Tue Dec 27 19:58:19 2011 +++ src/sys/arch/mips/rmi/rmixl_iobus.c Thu Jan 19 10:24:52 2012 @@ -1,4 +1,4 @@ -/* $NetBSD: rmixl_iobus.c,v 1.3.8.2 2011/12/27 19:58:19 matt Exp $ */ +/* $NetBSD: rmixl_iobus.c,v 1.3.8.3 2012/01/19 10:24:52 matt Exp $ */ /*- * Copyright (c) 2011 The NetBSD Foundation, Inc. @@ -47,7 +47,7 @@ */ #include sys/cdefs.h -__KERNEL_RCSID(0, $NetBSD: rmixl_iobus.c,v 1.3.8.2 2011/12/27 19:58:19 matt Exp $); +__KERNEL_RCSID(0, $NetBSD: rmixl_iobus.c,v 1.3.8.3 2012/01/19 10:24:52 matt Exp $); #include locators.h @@ -161,7 +161,7 @@ rmixl_iobus_obio_attach(device_t parent, rmixl_iobus_csconfig_init(sc); /* attach any children */ - config_search_ia(rmixl_iobus_search, self, rmixl_iobus, NULL); + config_search_ia(rmixl_iobus_search, self, xliobus, NULL); } static void Index: src/sys/arch/mips/rmi/rmixl_usbi.c diff -u src/sys/arch/mips/rmi/rmixl_usbi.c:1.1.2.10 src/sys/arch/mips/rmi/rmixl_usbi.c:1.1.2.11 --- src/sys/arch/mips/rmi/rmixl_usbi.c:1.1.2.10 Sat Dec 31 08:20:43 2011 +++ src/sys/arch/mips/rmi/rmixl_usbi.c Thu Jan 19 10:24:52 2012 @@ -1,4 +1,4 @@ -/* $NetBSD: rmixl_usbi.c,v 1.1.2.10 2011/12/31 08:20:43 matt Exp $ */ +/* rmixl_usbi.c,v 1.1.2.10 2011/12/31 08:20:43 matt Exp */ /*- * Copyright (c) 1998, 1999, 2000, 2002, 2003 The NetBSD Foundation, Inc. @@ -30,7 +30,7 @@ */ #include sys/cdefs.h -__KERNEL_RCSID(0, $NetBSD: rmixl_usbi.c,v 1.1.2.10 2011/12/31 08:20:43 matt Exp $); +__KERNEL_RCSID(0, rmixl_usbi.c,v 1.1.2.10 2011/12/31 08:20:43 matt Exp); #include locators.h @@ -163,7 +163,7 @@ rmixl_usbi_attach(device_t parent, devic aprint_normal(\n); /* attach any children */ - config_search_ia(rmixl_usbi_search, self, rmixl_usbi, NULL); + config_search_ia(rmixl_usbi_search, self, xlusbi, NULL); } static int
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Thu Jan 19 10:29:34 UTC 2012
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_cpu.c rmixl_fmn.c
rmixl_fmnvar.h
Log Message:
Unbreak things so that XLS/XLR boot again. :)
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.24 -r1.1.2.25 src/sys/arch/mips/rmi/rmixl_cpu.c
cvs rdiff -u -r1.1.2.10 -r1.1.2.11 src/sys/arch/mips/rmi/rmixl_fmn.c
cvs rdiff -u -r1.1.2.7 -r1.1.2.8 src/sys/arch/mips/rmi/rmixl_fmnvar.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_cpu.c
diff -u src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.24 src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.25
--- src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.24 Thu Jan 19 08:05:24 2012
+++ src/sys/arch/mips/rmi/rmixl_cpu.c Thu Jan 19 10:29:34 2012
@@ -245,7 +245,9 @@ cpu_rmixl_attach(device_t parent, device
aprint_normal(\n);
-cpu_attach_common(self, ci);
+ rmixl_fmn_cpu_attach(ci);
+
+ cpu_attach_common(self, ci);
}
/*
Index: src/sys/arch/mips/rmi/rmixl_fmn.c
diff -u src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.10 src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.11
--- src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.10 Thu Jan 19 08:05:24 2012
+++ src/sys/arch/mips/rmi/rmixl_fmn.c Thu Jan 19 10:29:34 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_fmn.c,v 1.1.2.10 2012/01/19 08:05:24 matt Exp $ */
+/* rmixl_fmn.c,v 1.1.2.10 2012/01/19 08:05:24 matt Exp */
/*-
* Copyright (c) 2010 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -638,7 +638,7 @@ fmn_init_noncore_xlrxls(fmn_info_t *fmn)
static void
fmn_init_thread_xlrxls(fmn_info_t *fmn)
{
- const fmn_station_info_t *si = fmn-fmn_stinfo;
+ const fmn_station_info_t *si = fmn-fmn_stinfo + 1;
uint32_t sts1;
uint32_t cfg;
@@ -780,7 +780,9 @@ rmixl_fmn_cpu_attach(struct cpu_info *ci
struct cpu_softc * const sc = ci-ci_softc;
KASSERT(sc-sc_fmn_si == NULL);
- sc-sc_fmn_si = softint_establish(SOFTINT_NET, fmn_softint, sc);
+ sc-sc_fmn_si = softint_establish(SOFTINT_NET|SOFTINT_MPSAFE,
+ fmn_softint, sc);
+ KASSERT(sc-sc_fmn_si != NULL);
KASSERT(sc-sc_dev != NULL);
@@ -937,6 +939,7 @@ fmn_intr(void *arg)
const bool is_xlp_p = cpu_rmixlp(mips_options.mips_cpu);
struct cpu_softc * const sc = curcpu()-ci_softc;
+ KASSERT(sc-sc_fmn_si != NULL);
softint_schedule(sc-sc_fmn_si);
if (!is_xlp_p) {
/*
Index: src/sys/arch/mips/rmi/rmixl_fmnvar.h
diff -u src/sys/arch/mips/rmi/rmixl_fmnvar.h:1.1.2.7 src/sys/arch/mips/rmi/rmixl_fmnvar.h:1.1.2.8
--- src/sys/arch/mips/rmi/rmixl_fmnvar.h:1.1.2.7 Thu Jan 19 09:59:08 2012
+++ src/sys/arch/mips/rmi/rmixl_fmnvar.h Thu Jan 19 10:29:34 2012
@@ -1,4 +1,4 @@
-/* $Id: rmixl_fmnvar.h,v 1.1.2.7 2012/01/19 09:59:08 matt Exp $ */
+/* rmixl_fmnvar.h,v 1.1.2.7 2012/01/19 09:59:08 matt Exp */
/*-
* Copyright (c) 2010 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -230,7 +230,6 @@ rmixl_cp2_enable(void)
uint32_t rv;
uint32_t sr;
- KASSERT(curcpu()-ci_cpl == IPL_HIGH);
__asm volatile(
.set push \n\t
.set noreorder \n\t
@@ -253,7 +252,6 @@ rmixl_cp2_restore(uint32_t ocu)
{
uint32_t cu2;
- KASSERT(curcpu()-ci_cpl == IPL_HIGH);
__asm volatile(
.set push \n\t
.set noreorder \n\t
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Thu Jan 19 17:29:23 UTC 2012
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_i2c_pci.c
Log Message:
Enable interrupts (even though they are not yet used).
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.2 -r1.1.2.3 src/sys/arch/mips/rmi/rmixl_i2c_pci.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_i2c_pci.c
diff -u src/sys/arch/mips/rmi/rmixl_i2c_pci.c:1.1.2.2 src/sys/arch/mips/rmi/rmixl_i2c_pci.c:1.1.2.3
--- src/sys/arch/mips/rmi/rmixl_i2c_pci.c:1.1.2.2 Tue Dec 27 19:57:18 2011
+++ src/sys/arch/mips/rmi/rmixl_i2c_pci.c Thu Jan 19 17:29:23 2012
@@ -29,7 +29,7 @@
#include sys/cdefs.h
-__KERNEL_RCSID(1, $NetBSD: rmixl_i2c_pci.c,v 1.1.2.2 2011/12/27 19:57:18 matt Exp $);
+__KERNEL_RCSID(1, $NetBSD: rmixl_i2c_pci.c,v 1.1.2.3 2012/01/19 17:29:23 matt Exp $);
#include sys/param.h
#include sys/device.h
@@ -54,17 +54,16 @@ int xli2c_debug = 0;
#define DPRINTF(x)
#endif
-static int xli2c_pci_match(device_t, cfdata_t, void *);
-static void xli2c_pci_attach(device_t, device_t, void *);
+static int xli2c_pci_match(device_t, cfdata_t, void *);
+static void xli2c_pci_attach(device_t, device_t, void *);
-static int xli2c_acquire_bus(void *, int);
-static void xli2c_release_bus(void *, int);
-static int xli2c_exec(void *, i2c_op_t, i2c_addr_t, const void *, size_t,
- void *, size_t, int);
-#if 0
-static int xli2c_intr(void *);
-#endif
-static int xli2c_wait_for_command(struct xli2c_softc *, uint8_t);
+static int xli2c_acquire_bus(void *, int);
+static void xli2c_release_bus(void *, int);
+static int xli2c_exec(void *, i2c_op_t, i2c_addr_t, const void *, size_t,
+ void *, size_t, int);
+
+static int xli2c_intr(void *);
+static int xli2c_wait_for_command(struct xli2c_softc *, uint8_t);
static inline uint8_t
xli2c_read_status(struct xli2c_softc *sc)
@@ -159,7 +158,6 @@ xli2c_pci_attach(device_t parent, device
/* MMM MAGIC */
xli2c_write_prescale(sc, rmixl_i2c_calc_prescale(1, 10));
-#if 0
pci_intr_handle_t pcih;
pci_intr_map(pa, pcih);
@@ -170,7 +168,6 @@ xli2c_pci_attach(device_t parent, device
const char * const intrstr = pci_intr_string(pa-pa_pc, pcih);
aprint_normal_dev(self, interrupting at %s\n, intrstr);
}
-#endif
memset(iba, 0, sizeof(iba));
iba.iba_tag = sc-sc_i2c;
@@ -201,7 +198,6 @@ xli2c_release_bus(void *v, int flags)
mutex_exit(sc-sc_buslock);
}
-#if 0
static int
xli2c_intr(void *v)
{
@@ -211,7 +207,6 @@ xli2c_intr(void *v)
return 0;
}
-#endif
/* send a command and busy wait for the byte data transfer to complete */
static int
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: matt Date: Thu Jan 19 17:32:48 UTC 2012 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_subr.S Log Message: KX needs to be enabled for n32 To generate a diff of this commit: cvs rdiff -u -r1.1.2.11 -r1.1.2.12 src/sys/arch/mips/rmi/rmixl_subr.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixl_subr.S diff -u src/sys/arch/mips/rmi/rmixl_subr.S:1.1.2.11 src/sys/arch/mips/rmi/rmixl_subr.S:1.1.2.12 --- src/sys/arch/mips/rmi/rmixl_subr.S:1.1.2.11 Tue Dec 6 17:44:46 2011 +++ src/sys/arch/mips/rmi/rmixl_subr.S Thu Jan 19 17:32:48 2012 @@ -132,7 +132,7 @@ END(rmixlfw_wakeup_cpu) * rmixl_cpu_trampoline - entry point for subordinate (non-#0) CPU wakeup */ NESTED(rmixl_cpu_trampoline, CALLFRAME_SIZ, ra) -#ifdef _LP64 +#ifndef __mips_o32 /* * reconstruct trampoline args addr: * sign-extend 32 bit KSEG0 address in a0
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Thu Jan 19 17:34:18 UTC 2012
Added Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_cde_pci.c
rmixl_fmn_pci.c rmixl_pke_pci.c rmixl_rxe_pci.c rmixl_srio_pci.c
Log Message:
PCI attachments (mostly stubs) for most XLP devices.
To generate a diff of this commit:
cvs rdiff -u -r0 -r1.1.2.1 src/sys/arch/mips/rmi/rmixl_cde_pci.c \
src/sys/arch/mips/rmi/rmixl_fmn_pci.c \
src/sys/arch/mips/rmi/rmixl_pke_pci.c \
src/sys/arch/mips/rmi/rmixl_rxe_pci.c \
src/sys/arch/mips/rmi/rmixl_srio_pci.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Added files:
Index: src/sys/arch/mips/rmi/rmixl_cde_pci.c
diff -u /dev/null src/sys/arch/mips/rmi/rmixl_cde_pci.c:1.1.2.1
--- /dev/null Thu Jan 19 17:34:18 2012
+++ src/sys/arch/mips/rmi/rmixl_cde_pci.c Thu Jan 19 17:34:18 2012
@@ -0,0 +1,133 @@
+/*-
+ * Copyright (c) 2011 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Matt Thomas of 3am Software Foundry.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include sys/cdefs.h
+
+__KERNEL_RCSID(1, $NetBSD: rmixl_cde_pci.c,v 1.1.2.1 2012/01/19 17:34:18 matt Exp $);
+
+#include sys/param.h
+#include sys/device.h
+#include sys/bus.h
+
+#include locators.h
+
+#include dev/pci/pcireg.h
+#include dev/pci/pcivar.h
+#include dev/pci/pcidevs.h
+
+#include mips/rmi/rmixlreg.h
+#include mips/rmi/rmixlvar.h
+
+#include locators.h
+
+#ifdef DEBUG
+int xlcde_debug = 0;
+#define DPRINTF(x, ...) do { if (xlcde_debug) printf(x, ## __VA_ARGS__); } while (0)
+#else
+#define DPRINTF(x)
+#endif
+
+static int xlcde_pci_match(device_t, cfdata_t, void *);
+static void xlcde_pci_attach(device_t, device_t, void *);
+static int xlcde_intr(void *);
+
+struct xlcde_softc {
+ device_t sc_dev;
+ pci_chipset_tag_t sc_pc;
+ pcitag_t sc_tag;
+ bus_space_tag_t sc_bst;
+ bus_space_handle_t sc_bsh;
+};
+
+CFATTACH_DECL_NEW(xlcde_pci, sizeof(struct xlcde_softc),
+xlcde_pci_match, xlcde_pci_attach, NULL, NULL);
+
+static int
+xlcde_pci_match(device_t parent, cfdata_t cf, void *aux)
+{
+ struct pci_attach_args * const pa = aux;
+
+ if (pa-pa_id == PCI_ID_CODE(PCI_VENDOR_NETLOGIC, PCI_PRODUCT_NETLOGIC_XLP_CDE))
+ return 1;
+
+return 0;
+}
+
+static void
+xlcde_pci_attach(device_t parent, device_t self, void *aux)
+{
+ struct rmixl_config * const rcp = rmixl_configuration;
+ struct pci_attach_args * const pa = aux;
+ struct xlcde_softc * const sc = device_private(self);
+
+ sc-sc_dev = self;
+ sc-sc_bst = rcp-rc_pci_ecfg_eb_memt;
+ sc-sc_pc = pa-pa_pc;
+ sc-sc_tag = pa-pa_tag;
+
+ /*
+ * Why isn't this accessible via a BAR?
+ */
+ if (bus_space_subregion(sc-sc_bst, rcp-rc_pci_ecfg_eb_memh,
+ pa-pa_tag, 0, sc-sc_bsh)) {
+ aprint_error(: can't map registers\n);
+ return;
+ }
+
+ aprint_naive(: XLP CDE Controller\n);
+ aprint_normal(: XLP Compression/Decompression Engine\n);
+
+ const pcireg_t statinfo = pci_conf_read(sc-sc_pc, sc-sc_tag,
+ PCI_RMIXLP_STATID);
+
+ const size_t stid_start = PCI_RMIXLP_STATID_BASE(statinfo);
+ const size_t stid_count = PCI_RMIXLP_STATID_COUNT(statinfo);
+ if (stid_count) {
+ aprint_normal_dev(sc-sc_dev, %zu station%s starting at %zu\n,
+ stid_count, (stid_count == 1 ? : s), stid_start);
+ }
+
+ pci_intr_handle_t pcih;
+ pci_intr_map(pa, pcih);
+
+ if (pci_intr_establish(pa-pa_pc, pcih, IPL_VM, xlcde_intr, sc) == NULL) {
+ aprint_error_dev(self, failed to establish interrupt\n);
+ } else {
+ const char * const intrstr = pci_intr_string(pa-pa_pc, pcih);
+ aprint_normal_dev(self, interrupting at
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Thu Jan 19 18:26:15 UTC 2012
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_nae.c
Log Message:
Fix CFATTACH_DECL_NEW so kernels build again.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.1 -r1.1.2.2 src/sys/arch/mips/rmi/rmixl_nae.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_nae.c
diff -u src/sys/arch/mips/rmi/rmixl_nae.c:1.1.2.1 src/sys/arch/mips/rmi/rmixl_nae.c:1.1.2.2
--- src/sys/arch/mips/rmi/rmixl_nae.c:1.1.2.1 Sat Dec 24 01:57:54 2011
+++ src/sys/arch/mips/rmi/rmixl_nae.c Thu Jan 19 18:26:15 2012
@@ -29,7 +29,7 @@
#include sys/cdefs.h
-__KERNEL_RCSID(1, $NetBSD: rmixl_nae.c,v 1.1.2.1 2011/12/24 01:57:54 matt Exp $);
+__KERNEL_RCSID(1, $NetBSD: rmixl_nae.c,v 1.1.2.2 2012/01/19 18:26:15 matt Exp $);
#include sys/param.h
#include sys/device.h
@@ -39,7 +39,11 @@ __KERNEL_RCSID(1, $NetBSD: rmixl_nae.c,
static int nae_match(device_t, cfdata_t, void *);
static void nae_attach(device_t, device_t, void *);
-CFATTACH_DECL_NEW(nae, 0,
+struct nae_gmac_softc {
+ device_t sc_dev;
+};
+
+CFATTACH_DECL_NEW(nae_gmac, sizeof(struct nae_gmac_softc),
nae_match, nae_attach, 0, 0);
static int
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Thu Jan 19 07:58:58 UTC 2012
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_cpucore.c
Log Message:
Add missing arg.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.13 -r1.1.2.14 src/sys/arch/mips/rmi/rmixl_cpucore.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_cpucore.c
diff -u src/sys/arch/mips/rmi/rmixl_cpucore.c:1.1.2.13 src/sys/arch/mips/rmi/rmixl_cpucore.c:1.1.2.14
--- src/sys/arch/mips/rmi/rmixl_cpucore.c:1.1.2.13 Wed Jan 4 16:17:53 2012
+++ src/sys/arch/mips/rmi/rmixl_cpucore.c Thu Jan 19 07:58:58 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_cpucore.c,v 1.1.2.13 2012/01/04 16:17:53 matt Exp $ */
+/* $NetBSD: rmixl_cpucore.c,v 1.1.2.14 2012/01/19 07:58:58 matt Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -38,7 +38,7 @@
#include locators.h
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_cpucore.c,v 1.1.2.13 2012/01/04 16:17:53 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_cpucore.c,v 1.1.2.14 2012/01/19 07:58:58 matt Exp $);
#include opt_multiprocessor.h
@@ -233,7 +233,7 @@ cpucore_rmixl_hatch(device_t self)
if (sc-sc_hatched == false) {
/* PCRs for core#0 are set up in mach_init() */
if (sc-sc_core != 0)
- rmixl_pcr_init_core();
+ rmixl_pcr_init_core(cpu_rmixlp(mips_options.mips_cpu));
sc-sc_hatched = true;
}
}
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Mon Jan 9 22:03:13 UTC 2012
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixlp_pcie.c
Log Message:
Use a map of bar0 sizes instead of a switch statement.
Return the proper IRT entry for the 2nd i2c controller.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.7 -r1.1.2.8 src/sys/arch/mips/rmi/rmixlp_pcie.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixlp_pcie.c
diff -u src/sys/arch/mips/rmi/rmixlp_pcie.c:1.1.2.7 src/sys/arch/mips/rmi/rmixlp_pcie.c:1.1.2.8
--- src/sys/arch/mips/rmi/rmixlp_pcie.c:1.1.2.7 Wed Jan 4 16:17:54 2012
+++ src/sys/arch/mips/rmi/rmixlp_pcie.c Mon Jan 9 22:03:13 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixlp_pcie.c,v 1.1.2.7 2012/01/04 16:17:54 matt Exp $ */
+/* $NetBSD: rmixlp_pcie.c,v 1.1.2.8 2012/01/09 22:03:13 matt Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -40,7 +40,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixlp_pcie.c,v 1.1.2.7 2012/01/04 16:17:54 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixlp_pcie.c,v 1.1.2.8 2012/01/09 22:03:13 matt Exp $);
#include opt_pci.h
#include pci.h
@@ -132,6 +132,8 @@ static struct rmixlp_pcie_softc {
[RMIXLP_PCITAG_IDX(RMIXLP_NAE_PCITAG)] = 4-0x2,
[RMIXLP_PCITAG_IDX(RMIXLP_POE_PCITAG)] = 4-0x2000,
[RMIXLP_PCITAG_IDX(RMIXLP_AHCI_PCITAG)] = 4-0x400,
+ [RMIXLP_PCITAG_IDX(RMIXLP_FMN_PCITAG)] = 4-0x4000,
+ [RMIXLP_PCITAG_IDX(RMIXLP_SRIO_PCITAG)] = 4-0x2,
},
};
@@ -962,49 +964,22 @@ rmixlp_pcie_conf_read(void *v, pcitag_t
offset == 0x60)
offset = 0x100;
+ /*
+ * I2C incorrectly reports the wrong IRT for the 2nd I2C controller
+ * so correct it here.
+ */
+ if (tag == RMIXLP_I2C2_PCITAG offset == PCI_RMIXLP_IRTINFO)
+ return 0x00010088;
+
if (_RMIXL_PCITAG_BUS(tag) == 0 (_RMIXL_PCITAG_DEV(tag) 7) 0) {
- if (tag == sc-sc_mapprobe) {
- if (offset == PCI_MAPREG_START + 4) {
-aprint_debug_dev(sc-sc_dev,
-tag %#lx reg %#x: %#x\n,
-tag, offset, 0x);
-return 0x;
- }
-#if 0
- return sc-sc_bus0_bar0_sizes[RMIXLP_PCITAG_IDX(tag)];
-#else
- switch (_RMIXL_PCITAG_DEV(tag)) {
- case _RMIXL_PCITAG_DEV(RMIXLP_EHCI0_PCITAG):
-rv = 4-0x400;
-break;
- case _RMIXL_PCITAG_DEV(RMIXLP_NAE_PCITAG):
-switch (_RMIXL_PCITAG_FUNC(tag)) {
-case _RMIXL_PCITAG_FUNC(RMIXLP_NAE_PCITAG):
- rv = 4-0x2;
- break;
-case _RMIXL_PCITAG_FUNC(RMIXLP_POE_PCITAG):
- rv = 4-0x2000;
- break;
-case _RMIXL_PCITAG_FUNC(RMIXLP_AHCI_PCITAG):
- rv = 4-0x400;
- break;
-default:
- rv = 0x;
- break;
-}
-break;
- case _RMIXL_PCITAG_DEV(RMIXLP_FMN_PCITAG):
-rv = 4-0x4000;
-break;
- default:
-rv = 0x;
-break;
- }
+ if (tag == sc-sc_mapprobe (offset -8) == PCI_BAR0) {
+ rv = (offset == PCI_BAR0)
+ ? sc-sc_bus0_bar0_sizes[RMIXLP_PCITAG_IDX(tag)]
+ : 0x;
aprint_debug_dev(sc-sc_dev,
conf_read: tag %#lx reg %#x: %#x\n,
tag, offset, rv);
return rv;
-#endif
}
}
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Sat Dec 31 08:20:43 UTC 2011
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_com.c rmixl_gpio_pci.c
rmixl_intr.c rmixl_intr.h rmixl_obio.c rmixl_pcie.c rmixl_pcix.c
rmixl_usbi.c rmixlp_pcie.c
Log Message:
Switch to using IST_foo instead of private enums.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.16 -r1.1.2.17 src/sys/arch/mips/rmi/rmixl_com.c
cvs rdiff -u -r1.1.2.3 -r1.1.2.4 src/sys/arch/mips/rmi/rmixl_gpio_pci.c
cvs rdiff -u -r1.1.2.32 -r1.1.2.33 src/sys/arch/mips/rmi/rmixl_intr.c
cvs rdiff -u -r1.1.2.10 -r1.1.2.11 src/sys/arch/mips/rmi/rmixl_intr.h \
src/sys/arch/mips/rmi/rmixl_pcix.c
cvs rdiff -u -r1.1.2.17 -r1.1.2.18 src/sys/arch/mips/rmi/rmixl_obio.c
cvs rdiff -u -r1.1.2.19 -r1.1.2.20 src/sys/arch/mips/rmi/rmixl_pcie.c
cvs rdiff -u -r1.1.2.9 -r1.1.2.10 src/sys/arch/mips/rmi/rmixl_usbi.c
cvs rdiff -u -r1.1.2.5 -r1.1.2.6 src/sys/arch/mips/rmi/rmixlp_pcie.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_com.c
diff -u src/sys/arch/mips/rmi/rmixl_com.c:1.1.2.16 src/sys/arch/mips/rmi/rmixl_com.c:1.1.2.17
--- src/sys/arch/mips/rmi/rmixl_com.c:1.1.2.16 Sat Dec 24 01:57:54 2011
+++ src/sys/arch/mips/rmi/rmixl_com.c Sat Dec 31 08:20:43 2011
@@ -1,4 +1,4 @@
-/* $Id: rmixl_com.c,v 1.1.2.16 2011/12/24 01:57:54 matt Exp $ */
+/* $Id: rmixl_com.c,v 1.1.2.17 2011/12/31 08:20:43 matt Exp $ */
/*-
* Copyright (c) 2006 Urbana-Champaign Independent Media Center.
* Copyright (c) 2006 Garrett D'Amore.
@@ -101,7 +101,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_com.c,v 1.1.2.16 2011/12/24 01:57:54 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_com.c,v 1.1.2.17 2011/12/31 08:20:43 matt Exp $);
#include sys/param.h
#include sys/systm.h
@@ -214,9 +214,8 @@ rmixl_com_attach(device_t parent, device
com_attach_subr(sc);
- rmixl_intr_establish(obio-obio_intr,
- IPL_VM, RMIXL_TRIG_LEVEL, RMIXL_POLR_HIGH,
- comintr, sc, true);
+ rmixl_intr_establish(obio-obio_intr, IPL_VM, IST_LEVEL_HIGH,
+ comintr, sc, true);
}
Index: src/sys/arch/mips/rmi/rmixl_gpio_pci.c
diff -u src/sys/arch/mips/rmi/rmixl_gpio_pci.c:1.1.2.3 src/sys/arch/mips/rmi/rmixl_gpio_pci.c:1.1.2.4
--- src/sys/arch/mips/rmi/rmixl_gpio_pci.c:1.1.2.3 Sat Dec 31 04:30:52 2011
+++ src/sys/arch/mips/rmi/rmixl_gpio_pci.c Sat Dec 31 08:20:43 2011
@@ -29,7 +29,7 @@
#include sys/cdefs.h
-__KERNEL_RCSID(1, $NetBSD: rmixl_gpio_pci.c,v 1.1.2.3 2011/12/31 04:30:52 matt Exp $);
+__KERNEL_RCSID(1, $NetBSD: rmixl_gpio_pci.c,v 1.1.2.4 2011/12/31 08:20:43 matt Exp $);
#include sys/param.h
#include sys/atomic.h
@@ -303,8 +303,7 @@ xlgpio_pci_attach(device_t parent, devic
for (size_t ipl = IPL_VM; ipl = IPL_HIGH ; ipl++) {
const size_t irt = ipl - IPL_VM;
if (rmixl_intr_establish(irtstart + irt, ipl,
- RMIXL_TRIG_LEVEL, RMIXL_POLR_HIGH,
- xlgpio_intrs[irt], sc, true) == NULL)
+ IST_LEVEL_HIGH, xlgpio_intrs[irt], sc, true) == NULL)
panic(%s: failed to establish interrupt %zu,
__func__, irtstart + irt);
}
Index: src/sys/arch/mips/rmi/rmixl_intr.c
diff -u src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.32 src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.33
--- src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.32 Sat Dec 31 07:53:12 2011
+++ src/sys/arch/mips/rmi/rmixl_intr.c Sat Dec 31 08:20:43 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_intr.c,v 1.1.2.32 2011/12/31 07:53:12 matt Exp $ */
+/* $NetBSD: rmixl_intr.c,v 1.1.2.33 2011/12/31 08:20:43 matt Exp $ */
/*-
* Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
@@ -64,7 +64,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.32 2011/12/31 07:53:12 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.33 2011/12/31 08:20:43 matt Exp $);
#include opt_ddb.h
#include opt_multiprocessor.h
@@ -726,8 +726,7 @@ static int rmixl_pic_init_done;
static uint32_t rmixl_irt_thread_mask(__cpuset_t);
static void rmixl_irt_init(size_t);
static void rmixl_irt_disestablish(size_t);
-static void rmixl_irt_establish(size_t, size_t,
- rmixl_intr_trigger_t, rmixl_intr_polarity_t);
+static void rmixl_irt_establish(size_t, size_t, int);
static size_t rmixl_intr_get_vec(int);
#ifdef MULTIPROCESSOR
@@ -1082,8 +1081,7 @@ rmixl_irt_disestablish(size_t irt)
* - construct an IRT Entry for irt and write to PIC
*/
static void
-rmixl_irt_establish(size_t irt, size_t vec, rmixl_intr_trigger_t trigger,
- rmixl_intr_polarity_t polarity)
+rmixl_irt_establish(size_t irt, size_t vec, int ist)
{
const bool is_xlp_p = cpu_rmixlp(mips_options.mips_cpu);
@@ -1093,22 +1091,14 @@ rmixl_irt_establish(size_t irt, size_t v
panic(%s: bad irt %zu\n, __func__, irt);
/*
- * All XLP interrupt are level.
+ * All XLP interrupt are level (high).
*/
- if (trigger != RMIXL_TRIG_LEVEL
- (is_xlp_p || trigger !=
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Sat Dec 31 03:33:13 UTC 2011
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_gpio_pci.c
Log Message:
Fix xlgpio_pin_ctl inversion problem.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.1 -r1.1.2.2 src/sys/arch/mips/rmi/rmixl_gpio_pci.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_gpio_pci.c
diff -u src/sys/arch/mips/rmi/rmixl_gpio_pci.c:1.1.2.1 src/sys/arch/mips/rmi/rmixl_gpio_pci.c:1.1.2.2
--- src/sys/arch/mips/rmi/rmixl_gpio_pci.c:1.1.2.1 Fri Dec 30 06:48:55 2011
+++ src/sys/arch/mips/rmi/rmixl_gpio_pci.c Sat Dec 31 03:33:13 2011
@@ -29,7 +29,7 @@
#include sys/cdefs.h
-__KERNEL_RCSID(1, $NetBSD: rmixl_gpio_pci.c,v 1.1.2.1 2011/12/30 06:48:55 matt Exp $);
+__KERNEL_RCSID(1, $NetBSD: rmixl_gpio_pci.c,v 1.1.2.2 2011/12/31 03:33:13 matt Exp $);
#include sys/param.h
#include sys/atomic.h
@@ -100,7 +100,7 @@ struct xlgpio_intrpin {
#define PINGROUP (PINMASK+1)
#define PIN_GROUP(pin) ((pin) / PINGROUP)
#define PIN_SELECT(pin) ((pin) PINMASK)
-#define PIN_MASK(pin) (1 ((pin) PINMASK))
+#define PIN_MASK(pin) (1 PIN_SELECT(pin))
struct xlgpio_softc {
device_t sc_dev;
@@ -493,7 +493,7 @@ xlgpio_pin_write(void *arg, int pin, int
{
struct xlgpio_softc * const sc = arg;
struct xlgpio_group * const gg = sc-sc_groups[PIN_GROUP(pin)];
- const uint32_t mask = 1 (pin PINMASK);
+ const uint32_t mask = PIN_MASK(pin);
mutex_enter(sc-sc_pin_lock);
@@ -515,23 +515,25 @@ static void
xlgpio_pin_ctl(void *arg, int pin, int flags)
{
struct xlgpio_softc * const sc = arg;
- const bus_size_t r_padoe = RMIXLP_GPIO_PADOE(pin / PINGROUP);
- const uint32_t mask = 1 (pin PINMASK);
+ struct xlgpio_group * const gg = sc-sc_groups[PIN_GROUP(pin)];
+ const uint32_t mask = PIN_MASK(pin);
mutex_enter(sc-sc_pin_lock);
KASSERT(pin sc-sc_pincnt);
- const uint32_t old = xlgpio_read_4(sc, r_padoe);
- uint32_t new;
+ uint32_t new_padoe;
switch (flags (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) {
- case GPIO_PIN_INPUT: new = old | mask; break;
- case GPIO_PIN_OUTPUT: new = old ~mask; break;
- default: new = old;
+ case GPIO_PIN_OUTPUT: new_padoe = gg-gg_padoe | mask; break;
+ case GPIO_PIN_INPUT: new_padoe = gg-gg_padoe ~mask; break;
+ default: new_padoe = gg-gg_padoe;
+ }
+
+ if (gg-gg_padoe != new_padoe) {
+ gg-gg_padoe = new_padoe;
+ xlgpio_write_4(sc, gg-gg_r_padoe, gg-gg_padoe);
}
- if (old != new)
- xlgpio_write_4(sc, r_padoe, new);
mutex_exit(sc-sc_pin_lock);
}
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Sat Dec 31 04:30:53 UTC 2011
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_gpio_pci.c rmixlreg.h
Log Message:
Deal with the movement of some GPIO registers on the XPL3xx.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.2 -r1.1.2.3 src/sys/arch/mips/rmi/rmixl_gpio_pci.c
cvs rdiff -u -r1.1.2.16 -r1.1.2.17 src/sys/arch/mips/rmi/rmixlreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_gpio_pci.c
diff -u src/sys/arch/mips/rmi/rmixl_gpio_pci.c:1.1.2.2 src/sys/arch/mips/rmi/rmixl_gpio_pci.c:1.1.2.3
--- src/sys/arch/mips/rmi/rmixl_gpio_pci.c:1.1.2.2 Sat Dec 31 03:33:13 2011
+++ src/sys/arch/mips/rmi/rmixl_gpio_pci.c Sat Dec 31 04:30:52 2011
@@ -29,7 +29,7 @@
#include sys/cdefs.h
-__KERNEL_RCSID(1, $NetBSD: rmixl_gpio_pci.c,v 1.1.2.2 2011/12/31 03:33:13 matt Exp $);
+__KERNEL_RCSID(1, $NetBSD: rmixl_gpio_pci.c,v 1.1.2.3 2011/12/31 04:30:52 matt Exp $);
#include sys/param.h
#include sys/atomic.h
@@ -151,9 +151,9 @@ static struct xlgpio_softc xlgpio_sc = {
[2] = RMIXLP_GPIO_INTEN(2, 0),
[3] = RMIXLP_GPIO_INTEN(3, 0),
},
- .gg_r_intpol = RMIXLP_GPIO_INTPOL(0),
- .gg_r_inttype = RMIXLP_GPIO_INTTYPE(0),
- .gg_r_intstat = RMIXLP_GPIO_INTSTAT(0),
+ .gg_r_intpol = RMIXLP_GPIO_8XX_INTPOL(0),
+ .gg_r_inttype = RMIXLP_GPIO_8XX_INTTYPE(0),
+ .gg_r_intstat = RMIXLP_GPIO_8XX_INTSTAT(0),
},
[1] = {
.gg_pins = xlgpio_sc.sc_pins + PINGROUP,
@@ -166,9 +166,9 @@ static struct xlgpio_softc xlgpio_sc = {
[2] = RMIXLP_GPIO_INTEN(2, 1),
[3] = RMIXLP_GPIO_INTEN(3, 1),
},
- .gg_r_intpol = RMIXLP_GPIO_INTPOL(1),
- .gg_r_inttype = RMIXLP_GPIO_INTTYPE(1),
- .gg_r_intstat = RMIXLP_GPIO_INTSTAT(1),
+ .gg_r_intpol = RMIXLP_GPIO_8XX_INTPOL(1),
+ .gg_r_inttype = RMIXLP_GPIO_8XX_INTTYPE(1),
+ .gg_r_intstat = RMIXLP_GPIO_8XX_INTSTAT(1),
},
},
.sc_gpio_chipset = {
@@ -266,10 +266,18 @@ xlgpio_pci_attach(device_t parent, devic
KASSERT(gg-gg_inttype == 0);
/*
+ * These are at different offsets on the 3xx than the 8xx/4xx.
+ */
+ if (rmixl_xlp_variant = RMIXLP_3XX) {
+ gg-gg_r_intpol = RMIXLP_GPIO_3XX_INTPOL(group);
+ gg-gg_r_inttype = RMIXLP_GPIO_3XX_INTTYPE(group);
+ gg-gg_r_intstat = RMIXLP_GPIO_3XX_INTSTAT(group);
+ }
+
+ /*
* Disable all interrupts for group.
* Get shadow copy of registers.
*/
-
gg-gg_padoe = xlgpio_read_4(sc, gg-gg_r_padoe);
gg-gg_paddrv = xlgpio_read_4(sc, gg-gg_r_paddrv);
xlgpio_write_4(sc, gg-gg_r_intpol, gg-gg_intpol);
@@ -283,6 +291,7 @@ xlgpio_pci_attach(device_t parent, devic
/*
* GPIO has 4 interrupts which map 1:1 on IPL_VM to IPL_HIGH
+ * (12 on 3xx but we only use 4).
*/
const pcireg_t irtinfo = xlgpio_read_4(sc, PCI_RMIXLP_IRTINFO);
@@ -291,8 +300,9 @@ xlgpio_pci_attach(device_t parent, devic
KASSERT(irtcount = IPL_HIGH - IPL_VM + 1);
- for (size_t irt = 0; irt irtcount; irt++) {
- if (rmixl_intr_establish(irtstart + irt, IPL_VM + irt,
+ for (size_t ipl = IPL_VM; ipl = IPL_HIGH ; ipl++) {
+ const size_t irt = ipl - IPL_VM;
+ if (rmixl_intr_establish(irtstart + irt, ipl,
RMIXL_TRIG_LEVEL, RMIXL_POLR_HIGH,
xlgpio_intrs[irt], sc, true) == NULL)
panic(%s: failed to establish interrupt %zu,
@@ -469,7 +479,7 @@ gpio_intr_disestablish(void *v)
*inten_p = ~mask;
xlgpio_write_4(sc, gg-gg_r_inten[gip-gip_ipl - IPL_VM], *inten_p);
- xlgpio_write_4(sc, RMIXLP_GPIO_INTSTAT(group), mask); /* ACK it */
+ xlgpio_write_4(sc, gg-gg_r_intstat, mask); /* ACK it */
gip-gip_ipl = IPL_NONE;
gip-gip_ist = IST_NONE;
Index: src/sys/arch/mips/rmi/rmixlreg.h
diff -u src/sys/arch/mips/rmi/rmixlreg.h:1.1.2.16 src/sys/arch/mips/rmi/rmixlreg.h:1.1.2.17
--- src/sys/arch/mips/rmi/rmixlreg.h:1.1.2.16 Fri Dec 30 06:48:56 2011
+++ src/sys/arch/mips/rmi/rmixlreg.h Sat Dec 31 04:30:52 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixlreg.h,v 1.1.2.16 2011/12/30 06:48:56 matt Exp $ */
+/* $NetBSD: rmixlreg.h,v 1.1.2.17 2011/12/31 04:30:52 matt Exp $ */
/*-
* Copyright (c) 2009 The NetBSD Foundation, Inc.
@@ -912,23 +912,12 @@
#define RMIXLP_GPIO_INTEN(n,g) _RMIXL_OFFSET(0x46+2*(n)+(g)) // Interrupt 0 Enable Register 0
#define RMIXLP_GPIO_INTEN0(n) _RMIXL_OFFSET(0x46+2*(n)) // Interrupt 0 Enable Register 0
#define RMIXLP_GPIO_INTEN1(n) _RMIXL_OFFSET(0x47+2*(n)) // Interrupt 0 Enable Register 0
-#define RMIXLP_GPIO_INTEN00 _RMIXL_OFFSET(0x46) // Interrupt 0 Enable Register 0
-#define RMIXLP_GPIO_INTEN01 _RMIXL_OFFSET(0x47) // Interrupt 0 Enable Register 1
-#define RMIXLP_GPIO_INTEN10 _RMIXL_OFFSET(0x48) // Interrupt 1 Enable Register 0
-#define RMIXLP_GPIO_INTEN11 _RMIXL_OFFSET(0x49) // Interrupt 1 Enable Register 1
-#define RMIXLP_GPIO_INTEN20 _RMIXL_OFFSET(0x4A) // Interrupt 2 Enable Register 0
-#define RMIXLP_GPIO_INTEN21 _RMIXL_OFFSET(0x4B) // Interrupt 2 Enable Register 1
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: matt Date: Sat Dec 31 04:54:28 UTC 2011 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_i2creg.h rmixl_naereg.h rmixlp_pcie.c rmixlreg.h Log Message: Consolidate and complete PCITAGs. Print/Set BARs for AHCI and SRIO. To generate a diff of this commit: cvs rdiff -u -r1.1.2.1 -r1.1.2.2 src/sys/arch/mips/rmi/rmixl_i2creg.h \ src/sys/arch/mips/rmi/rmixl_naereg.h cvs rdiff -u -r1.1.2.4 -r1.1.2.5 src/sys/arch/mips/rmi/rmixlp_pcie.c cvs rdiff -u -r1.1.2.17 -r1.1.2.18 src/sys/arch/mips/rmi/rmixlreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixl_i2creg.h diff -u src/sys/arch/mips/rmi/rmixl_i2creg.h:1.1.2.1 src/sys/arch/mips/rmi/rmixl_i2creg.h:1.1.2.2 --- src/sys/arch/mips/rmi/rmixl_i2creg.h:1.1.2.1 Sat Dec 24 01:57:54 2011 +++ src/sys/arch/mips/rmi/rmixl_i2creg.h Sat Dec 31 04:54:28 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: rmixl_i2creg.h,v 1.1.2.1 2011/12/24 01:57:54 matt Exp $ */ +/* $NetBSD: rmixl_i2creg.h,v 1.1.2.2 2011/12/31 04:54:28 matt Exp $ */ /*- * Copyright (c) 2011 The NetBSD Foundation, Inc. * All rights reserved. @@ -38,8 +38,8 @@ * XLP I2C Controller defintions */ -#define RMIXLP_I2C0_PCITAG _RMIXL_PCITAG(0,6,2) -#define RMIXLP_I2C1_PCITAG _RMIXL_PCITAG(0,6,3) +#define RMIXLP_I2C1_PCITAG _RMIXL_PCITAG(0,6,2) +#define RMIXLP_I2C2_PCITAG _RMIXL_PCITAG(0,6,3) #define RMIXLP_I2C_CFG_OFFSET _RMIXL_OFFSET(0x40) #define RMIXLP_I2C_IOSIZE _RMIXL_OFFSET(0x40) Index: src/sys/arch/mips/rmi/rmixl_naereg.h diff -u src/sys/arch/mips/rmi/rmixl_naereg.h:1.1.2.1 src/sys/arch/mips/rmi/rmixl_naereg.h:1.1.2.2 --- src/sys/arch/mips/rmi/rmixl_naereg.h:1.1.2.1 Sat Dec 24 01:57:54 2011 +++ src/sys/arch/mips/rmi/rmixl_naereg.h Sat Dec 31 04:54:28 2011 @@ -31,17 +31,38 @@ #define _MIPS_RMI_RMIXL_NAEREG_H /* - * RX P2P Descriptor + * RX P2P Descriptor (slightly different betewen XLS/XLR and XLP). */ -#define RMIXL_NEA_RXD_CONTEXT __BITS(63,54) +#define RMIXLS_NEA_RXD_EOP __BIT(63) +#define RMIXLS_NEA_RXD_STATUS __BITS(62,56) +#define RMIXLS_NEA_RXD_CLASSID __BITS(55,54) +#define RMIXLP_NEA_RXD_CONTEXT __BITS(59,54) #define RMIXL_NEA_RXD_LENGTH __BITS(53,40) -#define RMIXL_NEA_RXD_ADDRESS __BITS(39,6) -#define RMIXL_NEA_RXD_UP __BIT(5) -#define RMIXL_NEA_RXD_ERR __BIT(4) -#define RMIXL_NEA_RXD_IC __BIT(3) -#define RMIXL_NEA_RXD_TC __BIT(2) -#define RMIXL_NEA_RXD_PP __BIT(1) -#define RMIXL_NEA_RXD_P2P __BIT(0) +/* + * L2 cacheline aligned address + */ +#define RMIXL_NEA_RXD_ADDRESS __BITS(39,5) +#define RMIXLP_NEA_RXD_UP __BIT(5) +#define RMIXLP_NEA_RXD_ERR __BIT(4) +#define RMIXLS_NEA_RXD_UP __BIT(4) +#define RMIXLS_NEA_RXD_PORTID __BIT(3,0) +#define RMIXLP_NEA_RXD_IC __BIT(3) // IP CSUM valid +#define RMIXLP_NEA_RXD_TC __BIT(2) // TCP CSUM valid +#define RMIXLP_NEA_RXD_PP __BIT(1) // Prepad present +#define RMIXLP_NEA_RXD_P2P __BIT(0) + +/* + * RXD Status field for XLS/XLR. + */ +#define RMIXLS_RXD_STATUS_ERROR __BIT(6) +#define RMIXLS_RXD_STATUS_OK_BROADCAST __BIT(5) +#define RMIXLS_RXD_STATUS_OK_MULTICAST __BIT(4) +#define RMIXLS_RXD_STATUS_OK_UNICAST __BIT(3) +#define RMIXLS_RXD_STATUS_ERROR_CODE __BIT(2) +#define RMIXLS_RXD_STATUS_ERROR_CRC __BIT(1) +#define RMIXLS_RXD_STATUS_OK_MACADDR __BITS(2,1) +#define RMIXLS_RXD_STATUS_ERROR_LENGTH __BIT(0) +#define RMIXLS_RXD_STATUS_OK_VLAN __BIT(0) #define RMIXL_NEA_TXD_TYPE __BITS(63,62) #define RMIXL_NEA_TXD_RDEX __BIT(61) @@ -88,13 +109,19 @@ #define RMIXL_NEA_MSCD2_CRC_INS_OFFS __BITS(15,0) #define RMIXL_NEA_TXFBD_TYPE __BITS(63,62) -#define RMIXL_NEA_TXFBD_RDX __BIT(61) -#define RMIXL_NEA_TXFBD__RSRVD0 __BITS(60,58) -#define RMIXL_NEA_TXFBD_TS_VALID __BIT(57) -#define RMIXL_NEA_TXFBD_TX_DONE __BIT(56) -#define RMIXL_NEA_TXFBD_MAX_COLL_LATE_ABORT __BIT(55) -#define RMIXL_NEA_TXFBD_UNDERRUN __BIT(54) -#define RMIXL_NEA_TXFBD__RSRVD1 __BITS(53,50) +#define RMIXLP_NEA_TXFBD_RDX __BIT(61) +#define RMIXLP_NEA_TXFBD__RSRVD0 __BITS(60,58) +#define RMIXLS_NEA_TXFBD_COLLISION __BIT(61) +#define RMIXLS_NEA_TXFBD_BUS_ERROR __BIT(60) +#define RMIXLS_NEA_TXFBD_UNDERRUN __BIT(59) +#define RMIXLS_NEA_TXFBD_ABORT __BIT(58) +#define RMIXLP_NEA_TXFBD_TS_VALID __BIT(57) +#define RMIXLP_NEA_TXFBD_TX_DONE __BIT(56) +#define RMIXLP_NEA_TXFBD_MAX_COLL_LATE_ABORT __BIT(55) +#define RMIXLP_NEA_TXFBD_UNDERRUN __BIT(54) +#define RMIXLS_NEA_TXFBD_PORT_ID __BITS(57,54) +#define RMIXLP_NEA_TXFBD__RSRVD1 __BITS(53,50) +#define RMIXLS_NEA_TXFBD_LENGTH __BITS(53,40) // always 0 #define RMIXL_NEA_TXFBD_CONTEXT __BITS(49,40) #define RMIXL_NEA_TXFBD_ADDRESS __BITS(39,0) @@ -102,6 +129,16 @@ #define RMIXL_NEA_RXFID_ADDRESS __BITS(39,6) #define RMIXL_NEA_RXFID__RSRVD1 __BITS(5,0) +#define RMIXL_NAE_GMAC0_BASE(n) (0x + 0x2000*(n)) +#define RMIXL_NAE_GMAC1_BASE(n) (0x0200 +
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: matt Date: Sat Dec 31 07:53:13 UTC 2011 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_intr.c Log Message: XLP8xx and XLP3xx have different IRT layouts. To generate a diff of this commit: cvs rdiff -u -r1.1.2.31 -r1.1.2.32 src/sys/arch/mips/rmi/rmixl_intr.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixl_intr.c diff -u src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.31 src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.32 --- src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.31 Sat Dec 24 01:57:54 2011 +++ src/sys/arch/mips/rmi/rmixl_intr.c Sat Dec 31 07:53:12 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: rmixl_intr.c,v 1.1.2.31 2011/12/24 01:57:54 matt Exp $ */ +/* $NetBSD: rmixl_intr.c,v 1.1.2.32 2011/12/31 07:53:12 matt Exp $ */ /*- * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko. @@ -64,7 +64,7 @@ */ #include sys/cdefs.h -__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.31 2011/12/24 01:57:54 matt Exp $); +__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.32 2011/12/31 07:53:12 matt Exp $); #include opt_ddb.h #include opt_multiprocessor.h @@ -111,9 +111,9 @@ int iointr_debug = IOINTR_DEBUG; /* XXX this will need to deal with node */ #define RMIXLP_PICREG_READ(off) \ - rmixlp_read_8(RMIXL_PIC_PCITAG, (off)) + rmixlp_read_8(RMIXLP_PIC_PCITAG, (off)) #define RMIXLP_PICREG_WRITE(off, val) \ - rmixlp_write_8(RMIXL_PIC_PCITAG, (off), (val)); + rmixlp_write_8(RMIXLP_PIC_PCITAG, (off), (val)); /* * do not clear these when acking EIRR @@ -128,6 +128,7 @@ int iointr_debug = IOINTR_DEBUG; * use the right display string table for the CPU that's running. */ +#ifdef MIPS64_XLR /* * rmixl_irtnames_xlrxxx * - use for XLRxxx @@ -156,7 +157,7 @@ static const char * const rmixl_irtnames pic int 20 (gmac3), /* 20 */ pic int 21 (xgs0), /* 21 */ pic int 22 (xgs1), /* 22 */ - pic int 23 (irq23), /* 23 */ + pic int 23 (?), /* 23 */ pic int 24 (hyper_fatal), /* 24 */ pic int 25 (bridge_aerr), /* 25 */ pic int 26 (bridge_berr), /* 26 */ @@ -166,7 +167,9 @@ static const char * const rmixl_irtnames pic int 30 (gpio_fatal), /* 30 */ pic int 31 (reserved), /* 31 */ }; +#endif /* MIPS64_XLR */ +#ifdef MIPS64_XLS /* * rmixl_irtnames_xls2xx * - use for XLS2xx @@ -187,20 +190,20 @@ static const char * const rmixl_irtnames pic int 12 (i2c1), /* 12 */ pic int 13 (pcmcia), /* 13 */ pic int 14 (gpio_a), /* 14 */ - pic int 15 (irq15), /* 15 */ + pic int 15 (?), /* 15 */ pic int 16 (bridge_tb), /* 16 */ pic int 17 (gmac0), /* 17 */ pic int 18 (gmac1), /* 18 */ pic int 19 (gmac2), /* 19 */ pic int 20 (gmac3), /* 20 */ - pic int 21 (irq21), /* 21 */ - pic int 22 (irq22), /* 22 */ + pic int 21 (?), /* 21 */ + pic int 22 (?), /* 22 */ pic int 23 (pcie_link2), /* 23 */ pic int 24 (pcie_link3), /* 24 */ pic int 25 (bridge_err), /* 25 */ pic int 26 (pcie_link0), /* 26 */ pic int 27 (pcie_link1), /* 27 */ - pic int 28 (irq28), /* 28 */ + pic int 28 (?), /* 28 */ pic int 29 (pcie_err), /* 29 */ pic int 30 (gpio_b), /* 30 */ pic int 31 (usb), /* 31 */ @@ -226,20 +229,20 @@ static const char * const rmixl_irtnames pic int 12 (i2c1), /* 12 */ pic int 13 (pcmcia), /* 13 */ pic int 14 (gpio_a), /* 14 */ - pic int 15 (irq15), /* 15 */ + pic int 15 (?), /* 15 */ pic int 16 (bridge_tb), /* 16 */ pic int 17 (gmac0), /* 17 */ pic int 18 (gmac1), /* 18 */ pic int 19 (gmac2), /* 19 */ pic int 20 (gmac3), /* 20 */ - pic int 21 (irq21), /* 21 */ - pic int 22 (irq22), /* 22 */ - pic int 23 (irq23), /* 23 */ - pic int 24 (irq24), /* 24 */ + pic int 21 (?), /* 21 */ + pic int 22 (?), /* 22 */ + pic int 23 (?), /* 23 */ + pic int 24 (?), /* 24 */ pic int 25 (bridge_err), /* 25 */ pic int 26 (pcie_link0), /* 26 */ pic int 27 (pcie_link1), /* 27 */ - pic int 28 (irq28), /* 28 */ + pic int 28 (?), /* 28 */ pic int 29 (pcie_err), /* 29 */ pic int 30 (gpio_b), /* 30 */ pic int 31 (usb), /* 31 */ @@ -265,16 +268,16 @@ static const char * const rmixl_irtnames pic int 12 (i2c1), /* 12 */ pic int 13 (pcmcia), /* 13 */ pic int 14 (gpio_a), /* 14 */ - pic int 15 (irq15), /* 15 */ + pic int 15 (?), /* 15 */ pic int 16 (bridge_tb), /* 16 */ pic int 17 (gmac0), /* 17 */ pic int 18 (gmac1), /* 18 */ pic int 19 (gmac2), /* 19 */ pic int 20 (gmac3), /* 20 */ - pic int 21 (irq21), /* 21 */ - pic int 22 (irq22), /* 22 */ - pic int 23 (irq23), /* 23 */ - pic int 24 (irq24), /* 24 */ + pic int 21 (?), /* 21 */ + pic int 22 (?), /* 22 */ + pic int 23 (?), /* 23 */ + pic int 24 (?), /* 24 */ pic int 25 (bridge_err), /* 25 */ pic int 26 (pcie_link0), /* 26 */ pic int 27 (pcie_link1), /* 27 */ @@ -283,12 +286,14 @@ static const char * const rmixl_irtnames pic int 30 (gpio_b), /* 30 */ pic int 31 (usb), /* 31 */ }; +#endif /*
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Fri Dec 30 06:42:29 UTC 2011
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixlp_pcie.c
Log Message:
Cleanup USB byte swap support.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.3 -r1.1.2.4 src/sys/arch/mips/rmi/rmixlp_pcie.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixlp_pcie.c
diff -u src/sys/arch/mips/rmi/rmixlp_pcie.c:1.1.2.3 src/sys/arch/mips/rmi/rmixlp_pcie.c:1.1.2.4
--- src/sys/arch/mips/rmi/rmixlp_pcie.c:1.1.2.3 Wed Dec 28 05:35:06 2011
+++ src/sys/arch/mips/rmi/rmixlp_pcie.c Fri Dec 30 06:42:29 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixlp_pcie.c,v 1.1.2.3 2011/12/28 05:35:06 matt Exp $ */
+/* $NetBSD: rmixlp_pcie.c,v 1.1.2.4 2011/12/30 06:42:29 matt Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -40,7 +40,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixlp_pcie.c,v 1.1.2.3 2011/12/28 05:35:06 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixlp_pcie.c,v 1.1.2.4 2011/12/30 06:42:29 matt Exp $);
#include opt_pci.h
#include pci.h
@@ -108,6 +108,7 @@ static struct rmixlp_pcie_softc {
bus_dma_tag_t sc_dmat64;
rmixlp_pcie_lnkcfg_t sc_lnkcfg;
uint8_tsc_lnkmode;
+ boolsc_usb_bswapped;
kmutex_t sc_mutex;
} rmixlp_pcie_softc = {
.sc_pc = rmixl_configuration.rc_pci_chipset,
@@ -296,6 +297,15 @@ rmixlp_pcie_attach(device_t parent, devi
/*
* Make sure the USB devices aren't still in reset.
*/
+ /*
+ * Disable byte swapping.
+ */
+#ifdef BYTESWAP_USB
+ pci_conf_write(sc-sc_pc, RMIXLP_EHCI0_PCITAG,
+ RMIXLP_USB_BYTE_SWAP_DIS, 1);
+#endif
+ sc-sc_usb_bswapped = (pci_conf_read(sc-sc_pc, RMIXLP_EHCI0_PCITAG,
+ RMIXLP_USB_BYTE_SWAP_DIS) != 0);
rmixlp_pcie_usb_init_hook(sc-sc_pc, RMIXLP_EHCI0_PCITAG);
rmixlp_pcie_usb_init_hook(sc-sc_pc, RMIXLP_OHCI0_PCITAG);
rmixlp_pcie_usb_init_hook(sc-sc_pc, RMIXLP_OHCI1_PCITAG);
@@ -513,6 +523,38 @@ rmixlp_pcie_link_bar_update(struct rmixl
}
}
+static void
+rmixlp_pcie_print_bus0_bar0(struct rmixlp_pcie_softc *sc, pcitag_t tag)
+{
+ const size_t bar = PCI_BAR0;
+ pcireg_t ml = rmixlp_pcie_conf_read(sc, tag, PCI_BAR0);
+
+ switch (PCI_MAPREG_TYPE(ml)|PCI_MAPREG_MEM_TYPE(ml)) {
+ case PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT: {
+ bus_addr_t addr = PCI_MAPREG_MEM_ADDR(ml);
+ if (addr) {
+ aprint_normal_dev(sc-sc_dev,
+ tag %#lx bar[0]: mem32=%#PRIxBUSADDR\n,
+ tag, addr);
+ }
+ break;
+ }
+ case PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_64BIT: {
+ pcireg_t mu = rmixlp_pcie_conf_read(sc, tag, bar + 4);
+ bus_addr_t addr =
+ PCI_MAPREG_MEM64_ADDR(ml|((uint64_t)mu 32));
+ if (addr) {
+ aprint_normal_dev(sc-sc_dev,
+ tag %#lx bar[0]: mem64=%#PRIxBUSADDR\n,
+ tag, addr);
+ }
+ break;
+ }
+ default:
+ return;
+ }
+}
+
static bus_addr_t
rmixlp_pcie_set_bus0_bar0(struct rmixlp_pcie_softc *sc, pcitag_t tag,
bus_addr_t pbase)
@@ -531,8 +573,10 @@ rmixlp_pcie_set_bus0_bar0(struct rmixlp_
pbase = (pbase + bar_size - 1) -bar_size;
KASSERT((uint32_t)pbase == pbase);
rmixlp_pcie_conf_write(sc, tag, bar, pbase);
- printf(%s: tag %#lx bar[0]: mem32=%#PRIxBUSADDR size=%#PRIxBUSSIZE\n,
- __func__, tag, pbase, bar_size);
+ aprint_normal_dev(sc-sc_dev,
+ tag %#lx bar[0]: mem32=%#PRIxBUSADDR
+ size=%#PRIxBUSSIZE\n,
+ tag, pbase, bar_size);
pbase += bar_size;
break;
}
@@ -550,8 +594,10 @@ rmixlp_pcie_set_bus0_bar0(struct rmixlp_
(pbase 0) 0x);
rmixlp_pcie_conf_write(sc, tag, bar + 4,
(pbase 32) 0x);
- printf(%s: tag %#lx bar[0]: mem64=%#PRIxBUSADDR size=%#PRIxBUSSIZE\n,
- __func__, tag, pbase, bar_size);
+ aprint_normal_dev(sc-sc_dev,
+ tag %#lx bar[0]: mem64=%#PRIxBUSADDR
+ size=%#PRIxBUSSIZE\n,
+ tag, pbase, bar_size);
pbase += bar_size;
break;
@@ -600,16 +646,26 @@ rmixlp_pcie_configure_bus(struct rmixlp_
#endif
if (0) {
- bus_addr_t pbase = rcp-rc_pci_mem.r_pbase;
- pbase = rmixlp_pcie_set_bus0_bar0(sc, RMIXLP_EHCI0_PCITAG, pbase);
- pbase = rmixlp_pcie_set_bus0_bar0(sc, RMIXLP_OHCI0_PCITAG, pbase);
- pbase = rmixlp_pcie_set_bus0_bar0(sc, RMIXLP_OHCI1_PCITAG, pbase);
- pbase = rmixlp_pcie_set_bus0_bar0(sc, RMIXLP_EHCI1_PCITAG, pbase);
- pbase = rmixlp_pcie_set_bus0_bar0(sc, RMIXLP_OHCI2_PCITAG, pbase);
- pbase = rmixlp_pcie_set_bus0_bar0(sc, RMIXLP_OHCI3_PCITAG, pbase);
- pbase = rmixlp_pcie_set_bus0_bar0(sc, RMIXLP_NAE_PCITAG, pbase);
- pbase = rmixlp_pcie_set_bus0_bar0(sc, RMIXLP_POE_PCITAG, pbase);
- pbase = rmixlp_pcie_set_bus0_bar0(sc, RMIXLP_FMN_PCITAG, pbase);
+ bus_addr_t mem = rcp-rc_pci_mem.r_pbase;
+ mem = rmixlp_pcie_set_bus0_bar0(sc, RMIXLP_EHCI0_PCITAG, mem);
+ mem = rmixlp_pcie_set_bus0_bar0(sc, RMIXLP_OHCI0_PCITAG, mem);
+ mem = rmixlp_pcie_set_bus0_bar0(sc, RMIXLP_OHCI1_PCITAG, mem);
+ mem = rmixlp_pcie_set_bus0_bar0(sc,
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Fri Dec 30 06:45:00 UTC 2011
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixlvar.h
Log Message:
Add a field to track available GPIO pins.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.23 -r1.1.2.24 src/sys/arch/mips/rmi/rmixlvar.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixlvar.h
diff -u src/sys/arch/mips/rmi/rmixlvar.h:1.1.2.23 src/sys/arch/mips/rmi/rmixlvar.h:1.1.2.24
--- src/sys/arch/mips/rmi/rmixlvar.h:1.1.2.23 Wed Dec 28 05:36:11 2011
+++ src/sys/arch/mips/rmi/rmixlvar.h Fri Dec 30 06:45:00 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixlvar.h,v 1.1.2.23 2011/12/28 05:36:11 matt Exp $ */
+/* $NetBSD: rmixlvar.h,v 1.1.2.24 2011/12/30 06:45:00 matt Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -154,6 +154,7 @@ struct rmixl_config {
struct extent * rc_pci_io_ex;
struct extent * rc_srio_mem_ex;
int rc_mallocsafe;
+ uint64_t rc_gpio_available;
rmixlfw_info_t rc_psb_info;
rmixlfw_psb_type_t rc_psb_type;
volatile struct rmixlfw_cpu_wakeup_info *
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Fri Dec 30 06:48:56 UTC 2011
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_intr.h rmixl_nand_pci.c
rmixl_sdio.c rmixl_spi_pci.c rmixlreg.h
Added Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_gpio_pci.c
Log Message:
Add GPIO support for XLP.
Let NAND, MMC/SD, and SPI remove their pins from the GPIO available pin mask.
To generate a diff of this commit:
cvs rdiff -u -r0 -r1.1.2.1 src/sys/arch/mips/rmi/rmixl_gpio_pci.c
cvs rdiff -u -r1.1.2.9 -r1.1.2.10 src/sys/arch/mips/rmi/rmixl_intr.h
cvs rdiff -u -r1.1.2.1 -r1.1.2.2 src/sys/arch/mips/rmi/rmixl_nand_pci.c \
src/sys/arch/mips/rmi/rmixl_sdio.c src/sys/arch/mips/rmi/rmixl_spi_pci.c
cvs rdiff -u -r1.1.2.15 -r1.1.2.16 src/sys/arch/mips/rmi/rmixlreg.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_intr.h
diff -u src/sys/arch/mips/rmi/rmixl_intr.h:1.1.2.9 src/sys/arch/mips/rmi/rmixl_intr.h:1.1.2.10
--- src/sys/arch/mips/rmi/rmixl_intr.h:1.1.2.9 Sat Dec 24 01:57:54 2011
+++ src/sys/arch/mips/rmi/rmixl_intr.h Fri Dec 30 06:48:55 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_intr.h,v 1.1.2.9 2011/12/24 01:57:54 matt Exp $ */
+/* $NetBSD: rmixl_intr.h,v 1.1.2.10 2011/12/30 06:48:55 matt Exp $ */
/*-
* Copyright (c) 2010 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -107,4 +107,8 @@ void rmixl_intr_init_clk(void);
void rmixl_intr_init_ipi(void);
#endif
+void * gpio_intr_establish(size_t /* pin */, int /* ipl */, int /* ist */,
+ int (*)(void *), void *, bool);
+
+void gpio_intr_disestablish(void *);
#endif /* _MIPS_RMI_RMIXL_INTR_H_ */
Index: src/sys/arch/mips/rmi/rmixl_nand_pci.c
diff -u src/sys/arch/mips/rmi/rmixl_nand_pci.c:1.1.2.1 src/sys/arch/mips/rmi/rmixl_nand_pci.c:1.1.2.2
--- src/sys/arch/mips/rmi/rmixl_nand_pci.c:1.1.2.1 Tue Dec 27 19:58:19 2011
+++ src/sys/arch/mips/rmi/rmixl_nand_pci.c Fri Dec 30 06:48:56 2011
@@ -29,7 +29,7 @@
#include sys/cdefs.h
-__KERNEL_RCSID(1, $NetBSD: rmixl_nand_pci.c,v 1.1.2.1 2011/12/27 19:58:19 matt Exp $);
+__KERNEL_RCSID(1, $NetBSD: rmixl_nand_pci.c,v 1.1.2.2 2011/12/30 06:48:56 matt Exp $);
#include sys/param.h
#include sys/device.h
@@ -58,6 +58,18 @@ struct xlnand_softc {
bus_space_handle_t sc_bsh;
};
+static inline uint32_t
+xlnand_read_4(struct xlnand_softc *sc, bus_size_t off)
+{
+ return bus_space_read_4(sc-sc_bst, sc-sc_bsh, off);
+}
+
+static inline void
+xlnand_write_4(struct xlnand_softc *sc, bus_size_t off, uint32_t v)
+{
+ bus_space_write_4(sc-sc_bst, sc-sc_bsh, off, v);
+}
+
CFATTACH_DECL_NEW(xlnand_pci, sizeof(struct xlnand_softc),
xlnand_pci_match, xlnand_pci_attach, NULL, NULL);
@@ -87,10 +99,22 @@ xlnand_pci_attach(device_t parent, devic
* Why isn't this accessible via a BAR?
*/
if (bus_space_subregion(sc-sc_bst, rcp-rc_pci_ecfg_eb_memh,
- pa-pa_tag | 0x100, 0, sc-sc_bsh)) {
+ pa-pa_tag, 0, sc-sc_bsh)) {
aprint_error(: can't map registers\n);
return;
}
aprint_normal(: XLP NAND Controller\n);
+
+ /*
+ * If a NAND is using non-0 RDY/BSY signals, we need to take control
+ * of those from GPIO.
+ */
+ uint32_t r = xlnand_read_4(sc, RMIXLP_NAND_RDYBSY_SEL);
+ for (r = 3; r != 0; r = 3) {
+ u_int rdybsy = r 7;
+ if (rdybsy != 0) {
+ rcp-rc_gpio_available = ~__BIT(33 + rdybsy);
+ }
+ }
}
Index: src/sys/arch/mips/rmi/rmixl_sdio.c
diff -u src/sys/arch/mips/rmi/rmixl_sdio.c:1.1.2.1 src/sys/arch/mips/rmi/rmixl_sdio.c:1.1.2.2
--- src/sys/arch/mips/rmi/rmixl_sdio.c:1.1.2.1 Sat Dec 24 01:57:54 2011
+++ src/sys/arch/mips/rmi/rmixl_sdio.c Fri Dec 30 06:48:56 2011
@@ -29,7 +29,7 @@
#include sys/param.h
-__KERNEL_RCSID(1, $NetBSD: rmixl_sdio.c,v 1.1.2.1 2011/12/24 01:57:54 matt Exp $);
+__KERNEL_RCSID(1, $NetBSD: rmixl_sdio.c,v 1.1.2.2 2011/12/30 06:48:56 matt Exp $);
#include sys/device.h
#include sys/bus.h
@@ -91,8 +91,10 @@ xlsdio_attach(device_t parent, device_t
pci_conf_write(pa-pa_pc, pa-pa_tag, RMIXLP_MMC_SYSCTRL, r);
DELAY(1000);
r |= RMIXLP_MMC_SYSCTRL_CA; /* Cache Allocate */
+#if 0
r |= RMIXLP_MMC_SYSCTRL_EN0; /* Enable Slot 0 */
r |= RMIXLP_MMC_SYSCTRL_EN1; /* Enable Slot 1 */
+#endif
r = ~RMIXLP_MMC_SYSCTRL_CLK_DIS; /* Don't Disable Clock */
pci_conf_write(pa-pa_pc, pa-pa_tag, RMIXLP_MMC_SYSCTRL, r);
@@ -113,7 +115,15 @@ xlsdio_attach(device_t parent, device_t
pci_conf_write(pa-pa_pc, pa-pa_tag,
offset + SDHC_NINTR_STATUS, 0x);
- config_found(self, xaa, xlsdio_print);
+ if (r RMIXLP_MMC_SYSCTRL_EN(slot)) {
+ /*
+ * For any SDHC port we are using, we must remove
+ * the pins used by it from those that GPIO will
+ * offer to userland.
+ */
+ rcp-rc_gpio_available = ~RMIXLP_MMC_GPIO_PINS(slot);
+ config_found(self, xaa, xlsdio_print);
+ }
}
}
Index: src/sys/arch/mips/rmi/rmixl_spi_pci.c
diff -u
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: matt Date: Tue Dec 27 16:07:34 UTC 2011 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_pcie.c Log Message: Fix _LP64 compile issue. To generate a diff of this commit: cvs rdiff -u -r1.1.2.18 -r1.1.2.19 src/sys/arch/mips/rmi/rmixl_pcie.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixl_pcie.c diff -u src/sys/arch/mips/rmi/rmixl_pcie.c:1.1.2.18 src/sys/arch/mips/rmi/rmixl_pcie.c:1.1.2.19 --- src/sys/arch/mips/rmi/rmixl_pcie.c:1.1.2.18 Sat Dec 24 01:57:54 2011 +++ src/sys/arch/mips/rmi/rmixl_pcie.c Tue Dec 27 16:07:34 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: rmixl_pcie.c,v 1.1.2.18 2011/12/24 01:57:54 matt Exp $ */ +/* $NetBSD: rmixl_pcie.c,v 1.1.2.19 2011/12/27 16:07:34 matt Exp $ */ /* * Copyright (c) 2001 Wasabi Systems, Inc. @@ -40,7 +40,7 @@ */ #include sys/cdefs.h -__KERNEL_RCSID(0, $NetBSD: rmixl_pcie.c,v 1.1.2.18 2011/12/24 01:57:54 matt Exp $); +__KERNEL_RCSID(0, $NetBSD: rmixl_pcie.c,v 1.1.2.19 2011/12/27 16:07:34 matt Exp $); #include opt_pci.h #include pci.h @@ -388,7 +388,7 @@ rmixl_pcie_attach(device_t parent, devic __func__, rcp-rc_pci_ecfg.r_pbase, rcp-rc_pci_ecfg.r_size / 2); - sc-sc_pci_ecfg_memh = rcp-rc_pci_ecfg_memh; + sc-sc_pci_ecfg_memh = rcp-rc_pci_ecfg_el_memh; #else printf(%s: skipping mapping of pci ECFG LE registers (base=%#PRIxBUSADDR size=%#PRIxBUSSIZE)\n,
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: matt Date: Tue Dec 27 16:22:01 UTC 2011 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixlp_pcie.c Log Message: Make it compile if PCI_NETBSD_CONFIGURE is not present. To generate a diff of this commit: cvs rdiff -u -r1.1.2.1 -r1.1.2.2 src/sys/arch/mips/rmi/rmixlp_pcie.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixlp_pcie.c diff -u src/sys/arch/mips/rmi/rmixlp_pcie.c:1.1.2.1 src/sys/arch/mips/rmi/rmixlp_pcie.c:1.1.2.2 --- src/sys/arch/mips/rmi/rmixlp_pcie.c:1.1.2.1 Sat Dec 24 01:57:54 2011 +++ src/sys/arch/mips/rmi/rmixlp_pcie.c Tue Dec 27 16:22:01 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: rmixlp_pcie.c,v 1.1.2.1 2011/12/24 01:57:54 matt Exp $ */ +/* $NetBSD: rmixlp_pcie.c,v 1.1.2.2 2011/12/27 16:22:01 matt Exp $ */ /* * Copyright (c) 2001 Wasabi Systems, Inc. @@ -40,7 +40,7 @@ */ #include sys/cdefs.h -__KERNEL_RCSID(0, $NetBSD: rmixlp_pcie.c,v 1.1.2.1 2011/12/24 01:57:54 matt Exp $); +__KERNEL_RCSID(0, $NetBSD: rmixlp_pcie.c,v 1.1.2.2 2011/12/27 16:22:01 matt Exp $); #include opt_pci.h #include pci.h @@ -331,6 +331,7 @@ rmixlp_pcie_attach(device_t parent, devi #endif } +#ifdef PCI_NETBSD_CONFIGURE void rmixlp_pcie_bar_alloc(struct rmixl_region *rp, u_long size_mb, u_long align_mb) @@ -355,6 +356,7 @@ rmixlp_pcie_bar_alloc(struct rmixl_regio rp-r_pbase = pbase; rp-r_size = (uint64_t)size_mb 20; } +#endif /* PCI_NETBSD_CONFIGURE */ /* * rmixlp_pcie_lnkcfg_get - lookup the lnkcfg for this XLP
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Tue Dec 27 19:57:19 UTC 2011
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_i2c_pci.c
Log Message:
Add commented out intr establishment.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.1 -r1.1.2.2 src/sys/arch/mips/rmi/rmixl_i2c_pci.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_i2c_pci.c
diff -u src/sys/arch/mips/rmi/rmixl_i2c_pci.c:1.1.2.1 src/sys/arch/mips/rmi/rmixl_i2c_pci.c:1.1.2.2
--- src/sys/arch/mips/rmi/rmixl_i2c_pci.c:1.1.2.1 Sat Dec 24 01:57:54 2011
+++ src/sys/arch/mips/rmi/rmixl_i2c_pci.c Tue Dec 27 19:57:18 2011
@@ -29,7 +29,7 @@
#include sys/cdefs.h
-__KERNEL_RCSID(1, $NetBSD: rmixl_i2c_pci.c,v 1.1.2.1 2011/12/24 01:57:54 matt Exp $);
+__KERNEL_RCSID(1, $NetBSD: rmixl_i2c_pci.c,v 1.1.2.2 2011/12/27 19:57:18 matt Exp $);
#include sys/param.h
#include sys/device.h
@@ -61,6 +61,9 @@ static int xli2c_acquire_bus(void *, in
static void xli2c_release_bus(void *, int);
static int xli2c_exec(void *, i2c_op_t, i2c_addr_t, const void *, size_t,
void *, size_t, int);
+#if 0
+static int xli2c_intr(void *);
+#endif
static int xli2c_wait_for_command(struct xli2c_softc *, uint8_t);
static inline uint8_t
@@ -156,6 +159,19 @@ xli2c_pci_attach(device_t parent, device
/* MMM MAGIC */
xli2c_write_prescale(sc, rmixl_i2c_calc_prescale(1, 10));
+#if 0
+ pci_intr_handle_t pcih;
+
+ pci_intr_map(pa, pcih);
+
+ if (pci_intr_establish(pa-pa_pc, pcih, IPL_VM, xli2c_intr, sc) == NULL) {
+ aprint_error_dev(self, failed to establish interrupt\n);
+ } else {
+ const char * const intrstr = pci_intr_string(pa-pa_pc, pcih);
+ aprint_normal_dev(self, interrupting at %s\n, intrstr);
+ }
+#endif
+
memset(iba, 0, sizeof(iba));
iba.iba_tag = sc-sc_i2c;
config_found_ia(self, i2cbus, iba, iicbus_print);
@@ -186,7 +202,7 @@ xli2c_release_bus(void *v, int flags)
}
#if 0
-int
+static int
xli2c_intr(void *v)
{
struct xli2c_softc * const sc = v;
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Wed Dec 28 05:35:06 UTC 2011
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixlp_pcie.c
Log Message:
Cleanup aprint*
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.2 -r1.1.2.3 src/sys/arch/mips/rmi/rmixlp_pcie.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixlp_pcie.c
diff -u src/sys/arch/mips/rmi/rmixlp_pcie.c:1.1.2.2 src/sys/arch/mips/rmi/rmixlp_pcie.c:1.1.2.3
--- src/sys/arch/mips/rmi/rmixlp_pcie.c:1.1.2.2 Tue Dec 27 16:22:01 2011
+++ src/sys/arch/mips/rmi/rmixlp_pcie.c Wed Dec 28 05:35:06 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixlp_pcie.c,v 1.1.2.2 2011/12/27 16:22:01 matt Exp $ */
+/* $NetBSD: rmixlp_pcie.c,v 1.1.2.3 2011/12/28 05:35:06 matt Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -40,7 +40,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixlp_pcie.c,v 1.1.2.2 2011/12/27 16:22:01 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixlp_pcie.c,v 1.1.2.3 2011/12/28 05:35:06 matt Exp $);
#include opt_pci.h
#include pci.h
@@ -118,7 +118,8 @@ static struct rmixlp_pcie_softc {
static int rmixlp_pcie_match(device_t, cfdata_t, void *);
static void rmixlp_pcie_attach(device_t, device_t, void *);
-static void rmixlp_pcie_bar_alloc(struct rmixl_region *, u_long, u_long);
+static void rmixlp_pcie_bar_alloc(struct rmixlp_pcie_softc *,
+ struct rmixl_region *, u_long, u_long);
static void rmixlp_pcie_attach_hook(device_t, device_t,
struct pcibus_attach_args *);
@@ -219,7 +220,7 @@ rmixlp_pcie_attach(device_t parent, devi
*/
rmixlp_pcie_lnkcfg_get(sc);
- aprint_normal_dev(sc-sc_dev, using link variant %d (system is %d)\n,
+ aprint_debug_dev(sc-sc_dev, using link variant %d (system is %d)\n,
sc-sc_lnkcfg.lnk_variant, rmixl_xlp_variant);
for (size_t port = 0; port sc-sc_lnkcfg.lnk_ports; port++) {
if (sc-sc_lnkcfg.lnk_lanes[port] == 0)
@@ -252,7 +253,7 @@ rmixlp_pcie_attach(device_t parent, devi
}
}
if (0)
- rmixlp_pcie_bar_alloc(rcp-rc_pci_mem, 256, 1);
+ rmixlp_pcie_bar_alloc(sc, rcp-rc_pci_mem, 256, 1);
rcp-rc_pci_mem.r_pbase = rmixlp_read_4(RMIXLP_EHCI0_PCITAG,
PCI_BAR0) -8;
rcp-rc_pci_mem.r_size = 256 20;
@@ -280,7 +281,7 @@ rmixlp_pcie_attach(device_t parent, devi
rp-r_size = 0;
}
}
- // rmixlp_pcie_bar_alloc(rcp-rc_pci_io, 4, 1);
+ // rmixlp_pcie_bar_alloc(sc, rcp-rc_pci_io, 4, 1);
#endif
rmixl_pci_bus_io_init(rcp-rc_pci_iot, rcp);
}
@@ -333,7 +334,7 @@ rmixlp_pcie_attach(device_t parent, devi
#ifdef PCI_NETBSD_CONFIGURE
void
-rmixlp_pcie_bar_alloc(struct rmixl_region *rp,
+rmixlp_pcie_bar_alloc(struct rmixlp_pcie_softc *sc, struct rmixl_region *rp,
u_long size_mb, u_long align_mb)
{
struct rmixl_config * const rcp = rmixl_configuration;
@@ -350,7 +351,8 @@ rmixlp_pcie_bar_alloc(struct rmixl_regio
const uint64_t pbase = (uint64_t)region_start 20;
const uint64_t limit = pbase + ((uint64_t)(size_mb - 1) 20);
- printf(%s: pbase=%#PRIx64 limit=%#PRIx64 size=%luMB\n,
+ aprint_debug_dev(sc-sc_dev,
+ %s: pbase=%#PRIx64 limit=%#PRIx64 size=%luMB\n,
__func__, pbase, limit, size_mb);
rp-r_pbase = pbase;
@@ -424,94 +426,6 @@ rmixlp_pcie_intcfg(struct rmixlp_pcie_so
}
#endif
-#if 0
-static void
-rmixlp_pcie_errata(struct rmixlp_pcie_softc *sc)
-{
- const mips_prid_t cpu_id = mips_options.mips_cpu_id;
- u_int rev;
- u_int lanes;
- bool e391 = false;
-
- /*
- * 3.9.1 PCIe Link-0 Registers Reset to Incorrect Values
- * check if it allies to this CPU implementation and revision
- */
- rev = MIPS_PRID_REV(cpu_id);
- switch (MIPS_PRID_IMPL(cpu_id)) {
- case MIPS_XLS104:
- case MIPS_XLS108:
- break;
- case MIPS_XLS204:
- case MIPS_XLS208:
- /* stepping A0 is affected */
- if (rev == 0)
- e391 = true;
- break;
- case MIPS_XLS404LITE:
- case MIPS_XLS408LITE:
- break;
- case MIPS_XLS404:
- case MIPS_XLS408:
- case MIPS_XLS416:
- /* steppings A0 and A1 are affected */
- if ((rev == 0) || (rev == 1))
- e391 = true;
- break;
- case MIPS_XLS608:
- case MIPS_XLS616:
- break;
- default:
- panic(unknown RMI PRID IMPL);
-}
-
- /*
- * for XLS we only need to check entry #0
- * this may need to change for later XL family chips
- */
- lanes = sc-sc_pcie_lnktab.cfg[0].lanes;
-
- if ((e391 != false) ((lanes == 2) || (lanes == 4))) {
- /*
- * attempt work around for errata 3.9.1
- * PCIe Link-0 Registers Reset to Incorrect Values
- * the registers are write-once: if the firmware already wrote,
- * then our writes are ignored; hope they did it right.
- */
- uint32_t queuectrl;
- uint32_t bufdepth;
-#ifdef DIAGNOSTIC
- uint32_t r;
-#endif
-
- aprint_normal(%s: attempt work around for errata 3.9.1,
- device_xname(sc-sc_dev));
- if (lanes == 4) {
- queuectrl = 0x00018074;
- bufdepth = 0x001901D1;
- } else {
- queuectrl = 0x00018036;
-
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: matt Date: Tue Dec 6 17:44:46 UTC 2011 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_subr.S Log Message: Use MIPS_COP_0_OSSCRATCH instead $22 To generate a diff of this commit: cvs rdiff -u -r1.1.2.10 -r1.1.2.11 src/sys/arch/mips/rmi/rmixl_subr.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixl_subr.S diff -u src/sys/arch/mips/rmi/rmixl_subr.S:1.1.2.10 src/sys/arch/mips/rmi/rmixl_subr.S:1.1.2.11 --- src/sys/arch/mips/rmi/rmixl_subr.S:1.1.2.10 Sat Dec 3 01:56:56 2011 +++ src/sys/arch/mips/rmi/rmixl_subr.S Tue Dec 6 17:44:46 2011 @@ -169,11 +169,11 @@ NESTED(rmixl_cpu_trampoline, CALLFRAME_S * jump to common mips cpu_trampoline */ REG_L a1, 2*SZREG(s0) /* XXX ta_cpuinfo */ - dmtc0 a1, $22, 0 /* MIPS_COP_0_OSSCRATCH */ + dmtc0 a1, MIPS_COP_0_OSSCRATCH, 0 PTR_L v1, CPU_INFO_TLB_INFO(a1) PTR_L v1, TI_HWLOCK(v1) PTR_ADDU v1, MTX_LOCK - dmtc0 v1, $22, 2 + dmtc0 v1, MIPS_COP_0_OSSCRATCH, 2 j cpu_trampoline nop
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Wed May 11 00:37:20 UTC 2011
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_com.c
Log Message:
simplify rmixl_com_initmap() a bit
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.14 -r1.1.2.15 src/sys/arch/mips/rmi/rmixl_com.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_com.c
diff -u src/sys/arch/mips/rmi/rmixl_com.c:1.1.2.14 src/sys/arch/mips/rmi/rmixl_com.c:1.1.2.15
--- src/sys/arch/mips/rmi/rmixl_com.c:1.1.2.14 Fri May 21 23:33:52 2010
+++ src/sys/arch/mips/rmi/rmixl_com.c Wed May 11 00:37:20 2011
@@ -1,4 +1,4 @@
-/* $Id: rmixl_com.c,v 1.1.2.14 2010/05/21 23:33:52 cliff Exp $ */
+/* $Id: rmixl_com.c,v 1.1.2.15 2011/05/11 00:37:20 cliff Exp $ */
/*-
* Copyright (c) 2006 Urbana-Champaign Independent Media Center.
* Copyright (c) 2006 Garrett D'Amore.
@@ -101,7 +101,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_com.c,v 1.1.2.14 2010/05/21 23:33:52 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_com.c,v 1.1.2.15 2011/05/11 00:37:20 cliff Exp $);
#include sys/param.h
#include sys/systm.h
@@ -300,14 +300,10 @@
void
rmixl_com_initmap(struct com_regs *regsp)
{
- int i;
- int sz;
-
/*
* map the 4 byte register stride
*/
- sz = sizeof(regsp-cr_map) / sizeof(regsp-cr_map[0]);
- for (i = 0; i sz; i++)
+ for (int i = 0; i __arraycount(regsp-cr_map); i++)
regsp-cr_map[i] = com_std_map[i] * 4;
}
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: cliff Date: Wed Apr 13 21:10:11 UTC 2011 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_pcix.c Log Message: initialize mutex in attach To generate a diff of this commit: cvs rdiff -u -r1.1.2.7 -r1.1.2.8 src/sys/arch/mips/rmi/rmixl_pcix.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixl_pcix.c diff -u src/sys/arch/mips/rmi/rmixl_pcix.c:1.1.2.7 src/sys/arch/mips/rmi/rmixl_pcix.c:1.1.2.8 --- src/sys/arch/mips/rmi/rmixl_pcix.c:1.1.2.7 Mon Sep 20 19:42:31 2010 +++ src/sys/arch/mips/rmi/rmixl_pcix.c Wed Apr 13 21:10:11 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: rmixl_pcix.c,v 1.1.2.7 2010/09/20 19:42:31 cliff Exp $ */ +/* $NetBSD: rmixl_pcix.c,v 1.1.2.8 2011/04/13 21:10:11 cliff Exp $ */ /* * Copyright (c) 2001 Wasabi Systems, Inc. @@ -40,7 +40,7 @@ */ #include sys/cdefs.h -__KERNEL_RCSID(0, $NetBSD: rmixl_pcix.c,v 1.1.2.7 2010/09/20 19:42:31 cliff Exp $); +__KERNEL_RCSID(0, $NetBSD: rmixl_pcix.c,v 1.1.2.8 2011/04/13 21:10:11 cliff Exp $); #include opt_pci.h #include pci.h @@ -316,6 +316,8 @@ aprint_normal(: RMI XLR PCI-X Interface\n); + mutex_init(sc-sc_mutex, MUTEX_DEFAULT, IPL_HIGH); + rmixl_pcix_intcfg(sc); rmixl_pcix_errata(sc);
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Tue Feb 8 19:50:23 UTC 2011
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_cpu.c rmixl_cpuvar.h
rmixl_intr.c rmixl_intr.h
Log Message:
- remove sc_ih_clk, sc_ih_fmn, sc_ih_ipi from struct rmixl_cpu_softc;
they were unused just taking up space
- rmixl_intr_init_clk() and rmixl_intr_init_ipi() are now type void
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.18 -r1.1.2.19 src/sys/arch/mips/rmi/rmixl_cpu.c
cvs rdiff -u -r1.1.2.2 -r1.1.2.3 src/sys/arch/mips/rmi/rmixl_cpuvar.h
cvs rdiff -u -r1.1.2.26 -r1.1.2.27 src/sys/arch/mips/rmi/rmixl_intr.c
cvs rdiff -u -r1.1.2.6 -r1.1.2.7 src/sys/arch/mips/rmi/rmixl_intr.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_cpu.c
diff -u src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.18 src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.19
--- src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.18 Tue Feb 8 06:03:01 2011
+++ src/sys/arch/mips/rmi/rmixl_cpu.c Tue Feb 8 19:50:22 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_cpu.c,v 1.1.2.18 2011/02/08 06:03:01 cliff Exp $ */
+/* $NetBSD: rmixl_cpu.c,v 1.1.2.19 2011/02/08 19:50:22 cliff Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -38,7 +38,7 @@
#include locators.h
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_cpu.c,v 1.1.2.18 2011/02/08 06:03:01 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_cpu.c,v 1.1.2.19 2011/02/08 19:50:22 cliff Exp $);
#include opt_multiprocessor.h
#include opt_ddb.h
@@ -258,9 +258,9 @@
rmixl_fmn_init();
- sc-sc_ih_clk = rmixl_intr_init_clk();
+ rmixl_intr_init_clk();
#ifdef MULTIPROCESSOR
- sc-sc_ih_ipi = rmixl_intr_init_ipi();
+ rmixl_intr_init_ipi();
#endif
#ifdef NOTYET
@@ -269,7 +269,6 @@
if (ih == NULL)
panic(%s: rmixl_fmn_intr_establish failed,
__func__);
- sc-sc_ih_fmn = ih;
#endif
}
Index: src/sys/arch/mips/rmi/rmixl_cpuvar.h
diff -u src/sys/arch/mips/rmi/rmixl_cpuvar.h:1.1.2.2 src/sys/arch/mips/rmi/rmixl_cpuvar.h:1.1.2.3
--- src/sys/arch/mips/rmi/rmixl_cpuvar.h:1.1.2.2 Tue Apr 13 18:15:16 2010
+++ src/sys/arch/mips/rmi/rmixl_cpuvar.h Tue Feb 8 19:50:22 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_cpuvar.h,v 1.1.2.2 2010/04/13 18:15:16 cliff Exp $ */
+/* $NetBSD: rmixl_cpuvar.h,v 1.1.2.3 2011/02/08 19:50:22 cliff Exp $ */
/*-
* Copyright (c) 2010 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -40,9 +40,6 @@
struct rmixl_cpu_softc {
device_t sc_dev;
struct cpu_info *sc_ci;
- void *sc_ih_clk;
- void *sc_ih_fmn;
- void *sc_ih_ipi;
struct evcnt sc_vec_evcnts[64];
};
Index: src/sys/arch/mips/rmi/rmixl_intr.c
diff -u src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.26 src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.27
--- src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.26 Tue Feb 8 06:04:20 2011
+++ src/sys/arch/mips/rmi/rmixl_intr.c Tue Feb 8 19:50:22 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_intr.c,v 1.1.2.26 2011/02/08 06:04:20 cliff Exp $ */
+/* $NetBSD: rmixl_intr.c,v 1.1.2.27 2011/02/08 19:50:22 cliff Exp $ */
/*-
* Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
@@ -64,7 +64,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.26 2011/02/08 06:04:20 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.27 2011/02/08 19:50:22 cliff Exp $);
#include opt_multiprocessor.h
#include opt_ddb.h
@@ -446,7 +446,7 @@
* even though cpu_intr() handles the interrupt
* note the 'mpsafe' arg here is a placeholder only
*/
-void *
+void
rmixl_intr_init_clk(void)
{
int vec = ffs(MIPS_INT_MASK_5 8) - 1;
@@ -459,14 +459,13 @@
mutex_exit(rmixl_intr_lock);
- return ih;
}
#ifdef MULTIPROCESSOR
/*
* establish IPI interrupt and send function
*/
-void *
+void
rmixl_intr_init_ipi(void)
{
u_int ipi, vec;
@@ -487,7 +486,6 @@
mutex_exit(rmixl_intr_lock);
- return ih;
}
#endif /* MULTIPROCESSOR */
Index: src/sys/arch/mips/rmi/rmixl_intr.h
diff -u src/sys/arch/mips/rmi/rmixl_intr.h:1.1.2.6 src/sys/arch/mips/rmi/rmixl_intr.h:1.1.2.7
--- src/sys/arch/mips/rmi/rmixl_intr.h:1.1.2.6 Sat Feb 5 06:31:06 2011
+++ src/sys/arch/mips/rmi/rmixl_intr.h Tue Feb 8 19:50:22 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_intr.h,v 1.1.2.6 2011/02/05 06:31:06 cliff Exp $ */
+/* $NetBSD: rmixl_intr.h,v 1.1.2.7 2011/02/08 19:50:22 cliff Exp $ */
/*-
* Copyright (c) 2010 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -102,9 +102,9 @@
extern void rmixl_vec_disestablish(void *);
extern const char *rmixl_intr_string(int);
extern void rmixl_intr_init_cpu(struct cpu_info *);
-extern void *rmixl_intr_init_clk(void);
+extern void rmixl_intr_init_clk(void);
#ifdef MULTIPROCESSOR
-extern void *rmixl_intr_init_ipi(void);
+extern void rmixl_intr_init_ipi(void);
#endif
#endif /* _MIPS_RMI_RMIXL_INTR_H_ */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Tue Feb 8 21:27:15 UTC 2011
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_intr.c
Log Message:
- use mutex_obj_alloc() instead of declaring locks statically
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.27 -r1.1.2.28 src/sys/arch/mips/rmi/rmixl_intr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_intr.c
diff -u src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.27 src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.28
--- src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.27 Tue Feb 8 19:50:22 2011
+++ src/sys/arch/mips/rmi/rmixl_intr.c Tue Feb 8 21:27:15 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_intr.c,v 1.1.2.27 2011/02/08 19:50:22 cliff Exp $ */
+/* $NetBSD: rmixl_intr.c,v 1.1.2.28 2011/02/08 21:27:15 cliff Exp $ */
/*-
* Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
@@ -64,7 +64,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.27 2011/02/08 19:50:22 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.28 2011/02/08 21:27:15 cliff Exp $);
#include opt_multiprocessor.h
#include opt_ddb.h
@@ -95,7 +95,6 @@
#include dev/pci/pcireg.h
#include dev/pci/pcivar.h
-// #define IOINTR_DEBUG 1
#ifdef IOINTR_DEBUG
int iointr_debug = IOINTR_DEBUG;
# define DPRINTF(x) do { if (iointr_debug) printf x ; } while(0)
@@ -351,13 +350,14 @@
/*
* mask of CPUs attached
- * once they are attached, this var is read-only so mp safe
+ * while CPUs are attaching, we cast to volatile;
+ * once they are attached, it's read-only so mp safe
*/
static uint32_t cpu_present_mask;
-kmutex_t rmixl_ipi_lock; /* covers RMIXL_PIC_IPIBASE */
-kmutex_t rmixl_intr_lock; /* covers rest of PIC, and rmixl_intrhand[] */
-rmixl_intrhand_t rmixl_intrhand[NINTRVECS];
+static kmutex_t *rmixl_ipi_lock; /* covers RMIXL_PIC_IPIBASE */
+static kmutex_t *rmixl_intr_lock; /* covers rest of PIC, and rmixl_intrhand[] */
+static rmixl_intrhand_t rmixl_intrhand[NINTRVECS];
#ifdef DIAGNOSTIC
static int rmixl_pic_init_done;
@@ -411,10 +411,10 @@
__func__, rmixl_pic_init_done);
#endif
- mutex_init(rmixl_ipi_lock, MUTEX_DEFAULT, IPL_HIGH);
- mutex_init(rmixl_intr_lock, MUTEX_DEFAULT, IPL_HIGH);
+ rmixl_ipi_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_HIGH);
+ rmixl_intr_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_HIGH);
- mutex_enter(rmixl_intr_lock);
+ mutex_enter(rmixl_intr_lock);
/*
* initialize (zero) all IRT Entries in the PIC
@@ -436,7 +436,7 @@
#ifdef DIAGNOSTIC
rmixl_pic_init_done = 1;
#endif
- mutex_exit(rmixl_intr_lock);
+ mutex_exit(rmixl_intr_lock);
}
@@ -451,13 +451,13 @@
{
int vec = ffs(MIPS_INT_MASK_5 8) - 1;
- mutex_enter(rmixl_intr_lock);
+ mutex_enter(rmixl_intr_lock);
void *ih = rmixl_vec_establish(vec, 0, IPL_SCHED, NULL, NULL, false);
if (ih == NULL)
panic(%s: establish vec %d failed, __func__, vec);
- mutex_exit(rmixl_intr_lock);
+ mutex_exit(rmixl_intr_lock);
}
@@ -471,7 +471,7 @@
u_int ipi, vec;
void *ih;
- mutex_enter(rmixl_intr_lock);
+ mutex_enter(rmixl_intr_lock);
for (ipi=0; ipi NIPIS; ipi++) {
vec = RMIXL_INTRVEC_IPI + ipi;
@@ -484,7 +484,7 @@
mips_locoresw.lsw_send_ipi = rmixl_send_ipi;
- mutex_exit(rmixl_intr_lock);
+ mutex_exit(rmixl_intr_lock);
}
#endif /* MULTIPROCESSOR */
@@ -646,7 +646,7 @@
static void
rmixl_irt_disestablish(int irt)
{
- KASSERT(mutex_owned(rmixl_intr_lock));
+ KASSERT(mutex_owned(rmixl_intr_lock));
DPRINTF((%s: irt %d, irtc1 %#x\n, __func__, irt, 0));
rmixl_irt_init(irt);
}
@@ -662,7 +662,7 @@
uint32_t irtc1;
uint32_t irtc0;
- KASSERT(mutex_owned(rmixl_intr_lock));
+ KASSERT(mutex_owned(rmixl_intr_lock));
if (irt = NIRTS)
panic(%s: bad irt %d\n, __func__, irt);
@@ -724,7 +724,7 @@
uint64_t eimr_bit;
int s;
- KASSERT(mutex_owned(rmixl_intr_lock));
+ KASSERT(mutex_owned(rmixl_intr_lock));
DPRINTF((%s: vec %d, cpumask %#x, ipl %d, func %p, arg %p\n
__func__, vec, cpumask, ipl, func, arg));
@@ -804,7 +804,7 @@
DPRINTF((%s: irt %d, vec %d, ipl %d\n, __func__, irt, vec, ipl));
- mutex_enter(rmixl_intr_lock);
+ mutex_enter(rmixl_intr_lock);
/*
* establish vector
@@ -816,7 +816,7 @@
*/
rmixl_irt_establish(irt, vec, cpumask, trigger, polarity);
- mutex_exit(rmixl_intr_lock);
+ mutex_exit(rmixl_intr_lock);
return ih;
}
@@ -827,7 +827,7 @@
rmixl_intrhand_t *ih = cookie;
uint64_t eimr_bit;
- KASSERT(mutex_owned(rmixl_intr_lock));
+ KASSERT(mutex_owned(rmixl_intr_lock));
KASSERT(ih-ih_vec NINTRVECS);
KASSERT(ih == rmixl_intrhand[ih-ih_vec]);
@@ -851,7 +851,7 @@
KASSERT(vec NINTRVECS);
KASSERT(ih == rmixl_intrhand[vec]);
- mutex_enter(rmixl_intr_lock);
+ mutex_enter(rmixl_intr_lock);
/*
* disable/invalidate the IRT Entry if needed
@@ -864,7 +864,7 @@
*/
rmixl_vec_disestablish(cookie);
-
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Tue Feb 8 22:37:36 UTC 2011
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_intr.c
Log Message:
- in rmixl_intr_init_clk, use MIPS_INT_MASK_SHIFT instead of 8
when calculating vector number for clock.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.28 -r1.1.2.29 src/sys/arch/mips/rmi/rmixl_intr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_intr.c
diff -u src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.28 src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.29
--- src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.28 Tue Feb 8 21:27:15 2011
+++ src/sys/arch/mips/rmi/rmixl_intr.c Tue Feb 8 22:37:36 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_intr.c,v 1.1.2.28 2011/02/08 21:27:15 cliff Exp $ */
+/* $NetBSD: rmixl_intr.c,v 1.1.2.29 2011/02/08 22:37:36 cliff Exp $ */
/*-
* Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
@@ -64,7 +64,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.28 2011/02/08 21:27:15 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.29 2011/02/08 22:37:36 cliff Exp $);
#include opt_multiprocessor.h
#include opt_ddb.h
@@ -449,7 +449,7 @@
void
rmixl_intr_init_clk(void)
{
- int vec = ffs(MIPS_INT_MASK_5 8) - 1;
+ int vec = ffs(MIPS_INT_MASK_5 MIPS_INT_MASK_SHIFT) - 1;
mutex_enter(rmixl_intr_lock);
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Tue Feb 8 23:01:28 UTC 2011
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_cpu.c rmixl_cpucore.c
Log Message:
- make compile without MULTIPROCESSOR
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.19 -r1.1.2.20 src/sys/arch/mips/rmi/rmixl_cpu.c
cvs rdiff -u -r1.1.2.9 -r1.1.2.10 src/sys/arch/mips/rmi/rmixl_cpucore.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_cpu.c
diff -u src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.19 src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.20
--- src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.19 Tue Feb 8 19:50:22 2011
+++ src/sys/arch/mips/rmi/rmixl_cpu.c Tue Feb 8 23:01:28 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_cpu.c,v 1.1.2.19 2011/02/08 19:50:22 cliff Exp $ */
+/* $NetBSD: rmixl_cpu.c,v 1.1.2.20 2011/02/08 23:01:28 cliff Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -38,7 +38,7 @@
#include locators.h
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_cpu.c,v 1.1.2.19 2011/02/08 19:50:22 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_cpu.c,v 1.1.2.20 2011/02/08 23:01:28 cliff Exp $);
#include opt_multiprocessor.h
#include opt_ddb.h
@@ -168,7 +168,6 @@
cpu_rmixl_attach(device_t parent, device_t self, void *aux)
{
struct rmixl_cpu_softc * const sc = device_private(self);
- struct cpucore_attach_args *ca = aux;
struct cpu_info *ci = NULL;
static bool once = false;
extern void rmixl_spl_init_cpu(void);
@@ -190,6 +189,7 @@
struct cpucore_softc * const ccsc = device_private(parent);
rmixlfw_psb_type_t psb_type = rmixl_configuration.rc_psb_type;
cpuid_t cpuid;
+ struct cpucore_attach_args *ca = aux;
KASSERT(ca-ca_core 8);
KASSERT(ca-ca_thread 4);
Index: src/sys/arch/mips/rmi/rmixl_cpucore.c
diff -u src/sys/arch/mips/rmi/rmixl_cpucore.c:1.1.2.9 src/sys/arch/mips/rmi/rmixl_cpucore.c:1.1.2.10
--- src/sys/arch/mips/rmi/rmixl_cpucore.c:1.1.2.9 Tue Feb 8 06:03:36 2011
+++ src/sys/arch/mips/rmi/rmixl_cpucore.c Tue Feb 8 23:01:28 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_cpucore.c,v 1.1.2.9 2011/02/08 06:03:36 cliff Exp $ */
+/* $NetBSD: rmixl_cpucore.c,v 1.1.2.10 2011/02/08 23:01:28 cliff Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -38,7 +38,7 @@
#include locators.h
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_cpucore.c,v 1.1.2.9 2011/02/08 06:03:36 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_cpucore.c,v 1.1.2.10 2011/02/08 23:01:28 cliff Exp $);
#include opt_multiprocessor.h
@@ -91,9 +91,10 @@
sc-sc_dev = self;
sc-sc_core = na-na_core;
- sc-sc_hatched = false;
#ifdef MULTIPROCESSOR
+ sc-sc_hatched = false;
+
/*
* Create the TLB structure needed - one per core and core0 uses the
* default one for the system.
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Tue Feb 8 06:03:01 UTC 2011
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_cpu.c
Log Message:
- renamed cpu_rmixl_attach_once() to cpu_rmixl_attach_primary() (more clear)
- cpu_rmixl_attach_primary() obtains ci_cpuid from COP0 EBASE reg
instead of assuming always cpuid==0
- in cpu_rmixl_attach(), first call of the function determines we are attaching
primary cpu, instead of asuming core0 thread0 is always the primary cpu
- cpu_fmn_intr() uses CPU_IS_PRIMARY() instead of asuming cpu_number()==0
always indicates the primary cpu
- debug function rmixl_cpuinfo_print() argument is now a cpu index, not cpuid
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.17 -r1.1.2.18 src/sys/arch/mips/rmi/rmixl_cpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_cpu.c
diff -u src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.17 src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.18
--- src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.17 Sat Feb 5 06:10:29 2011
+++ src/sys/arch/mips/rmi/rmixl_cpu.c Tue Feb 8 06:03:01 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_cpu.c,v 1.1.2.17 2011/02/05 06:10:29 cliff Exp $ */
+/* $NetBSD: rmixl_cpu.c,v 1.1.2.18 2011/02/08 06:03:01 cliff Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -38,7 +38,7 @@
#include locators.h
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_cpu.c,v 1.1.2.17 2011/02/05 06:10:29 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_cpu.c,v 1.1.2.18 2011/02/08 06:03:01 cliff Exp $);
#include opt_multiprocessor.h
#include opt_ddb.h
@@ -70,7 +70,7 @@
static int cpu_rmixl_match(device_t, cfdata_t, void *);
static void cpu_rmixl_attach(device_t, device_t, void *);
-static void cpu_rmixl_attach_once(struct rmixl_cpu_softc * const);
+static void cpu_rmixl_attach_primary(struct rmixl_cpu_softc * const);
#ifdef NOTYET
static int cpu_fmn_intr(void *, rmixl_fmn_rxmsg_t *);
#endif
@@ -87,7 +87,7 @@
#ifdef DEBUG
void rmixl_cpu_data_print(struct cpu_data *);
struct cpu_info *
- rmixl_cpuinfo_print(cpuid_t);
+ rmixl_cpuinfo_print(u_int);
#endif /* DEBUG */
CFATTACH_DECL_NEW(cpu_rmixl, sizeof(struct rmixl_cpu_softc),
@@ -170,16 +170,19 @@
struct rmixl_cpu_softc * const sc = device_private(self);
struct cpucore_attach_args *ca = aux;
struct cpu_info *ci = NULL;
+ static bool once = false;
extern void rmixl_spl_init_cpu(void);
-
- if (ca-ca_thread == 0 ca-ca_core == 0) {
+
+ if (once == false) {
+ /* first attach is the primary cpu */
+ once = true;
ci = curcpu();
sc-sc_dev = self;
sc-sc_ci = ci;
ci-ci_softc = (void *)sc;
rmixl_spl_init_cpu(); /* spl initialization for CPU#0 */
- cpu_rmixl_attach_once(sc);
+ cpu_rmixl_attach_primary(sc);
#ifdef MULTIPROCESSOR
mips_locoresw.lsw_cpu_init = cpu_rmixl_hatch;
@@ -232,15 +235,22 @@
cpu_attach_common(self, ci);
}
+/*
+ * attach the primary processor
+ */
static void
-cpu_rmixl_attach_once(struct rmixl_cpu_softc * const sc)
+cpu_rmixl_attach_primary(struct rmixl_cpu_softc * const sc)
{
- static bool once = false;
+ struct cpu_info *ci = sc-sc_ci;
+ uint32_t ebase;
+
+ KASSERT(CPU_IS_PRIMARY(ci));
- KASSERT(once != true);
- if (once == true)
- return;
- once = true;
+ /*
+ * obtain and set cpuid of the primary processor
+ */
+ asm volatile(dmfc0 %0, $15, 1; : =r(ebase));
+ ci-ci_cpuid = ebase __BITS(9,0);
#if defined(DDB) defined(MIPS_DDB_WATCH)
cpu_rmixl_db_watch_init();
@@ -268,8 +278,8 @@
static int
cpu_fmn_intr(void *arg, rmixl_fmn_rxmsg_t *rxmsg)
{
- if (cpu_number() == 0) {
- printf(%s: cpu %ld: rxsid=%#x, code=%d, size=%d\n,
+ if (CPU_IS_PRIMARY(curcpu())) {
+ printf(%s: cpu%ld: rxsid=%#x, code=%d, size=%d\n,
__func__, cpu_number(),
rxmsg-rxsid, rxmsg-code, rxmsg-size);
for (int i=0; i rxmsg-size; i++)
@@ -426,9 +436,9 @@
}
struct cpu_info *
-rmixl_cpuinfo_print(cpuid_t cpuid)
+rmixl_cpuinfo_print(u_int cpuindex)
{
- struct cpu_info * const ci = cpu_lookup(cpuid);
+ struct cpu_info * const ci = cpu_lookup(cpuindex);
if (ci != NULL) {
rmixl_cpu_data_print(ci-ci_data);
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Tue Feb 8 06:03:56 UTC 2011
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_fmn.c
Log Message:
- eliminate assumptions that cpuid 0 is primary
- distinguish between cpuid and cpu index.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.5 -r1.1.2.6 src/sys/arch/mips/rmi/rmixl_fmn.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_fmn.c
diff -u src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.5 src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.6
--- src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.5 Sat Feb 5 06:11:16 2011
+++ src/sys/arch/mips/rmi/rmixl_fmn.c Tue Feb 8 06:03:56 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_fmn.c,v 1.1.2.5 2011/02/05 06:11:16 cliff Exp $ */
+/* $NetBSD: rmixl_fmn.c,v 1.1.2.6 2011/02/08 06:03:56 cliff Exp $ */
/*-
* Copyright (c) 2010 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -32,6 +32,7 @@
#include sys/cdefs.h
#include sys/param.h
+#include sys/systm.h
#include sys/cpu.h
#include mips/cpuregs.h
#include mips/rmi/rmixlreg.h
@@ -404,8 +405,9 @@
fmn_t *fmnp;
static bool once=false;
- KASSERT(cpu_number() == 0);
- fmnp = fmn_lookup(cpu_number());
+ KASSERTMSG((CPU_IS_PRIMARY(curcpu())), (ci=%p, index=%d\n,
+ curcpu(), cpu_index(curcpu(;
+ fmnp = fmn_lookup(curcpu()-ci_cpuid);
if (once == true)
panic(%s: call only once!, __func__);
@@ -480,10 +482,10 @@
fmn_t *fmnp;
kmutex_t *lk;
- fmnp = fmn_lookup(cpu_number());
+ fmnp = fmn_lookup(curcpu()-ci_cpuid);
KASSERT(fmnp != NULL);
- KASSERT(fmnp-fmn_core == RMIXL_CPU_CORE(cpu_number()));
- KASSERT(fmnp-fmn_thread == RMIXL_CPU_THREAD(cpu_number()));
+ KASSERT(fmnp-fmn_core == RMIXL_CPU_CORE(curcpu()-ci_cpuid));
+ KASSERT(fmnp-fmn_thread == RMIXL_CPU_THREAD(curcpu()-ci_cpuid));
lk = mutex_obj_alloc(MUTEX_DEFAULT, RMIXL_FMN_INTR_IPL);
if (lk == NULL)
@@ -633,7 +635,7 @@
{
fmn_t *fmnp;
- fmnp = fmn_lookup(cpu_number());
+ fmnp = fmn_lookup(curcpu()-ci_cpuid);
mutex_enter(fmnp-fmn_lock);
for (int i=0; i fmnp-fmn_nstid; i++)
@@ -665,7 +667,7 @@
fmn_t *fmnp;
fmn_intrhand_t *ih;
- fmnp = fmn_lookup(cpu_number());
+ fmnp = fmn_lookup(curcpu()-ci_cpuid);
mutex_enter(fmnp-fmn_lock);
@@ -692,7 +694,7 @@
fmn_t *fmnp;
fmn_intrhand_t *ih = cookie;
- fmnp = fmn_lookup(cpu_number());
+ fmnp = fmn_lookup(curcpu()-ci_cpuid);
mutex_enter(fmnp-fmn_lock);
if (ih-ih_func != NULL) {
@@ -786,7 +788,7 @@
KASSERT(code = 0xff);
KASSERT(dest_id = 0xff);
- fmnp = fmn_lookup(cpu_number());
+ fmnp = fmn_lookup(curcpu()-ci_cpuid);
mutex_enter(fmnp-fmn_lock);
cp0_status = rmixl_cp2_enable();
@@ -821,13 +823,13 @@
goto send;
DELAY(10); /* XXX ??? */
}
- DIAG_PRF((%s: cpu=%ld, msg %p, dst_id=%d, sts=%#x: can't send\n,
+ DIAG_PRF((%s: cpu%d, msg %p, dst_id=%d, sts=%#x: can't send\n,
__func__, cpu_number(), msg, dest_id, msg_status));
rv = -1;
goto out;
send:
desc = RMIXL_MSGSND_DESC(size, code, dest_id);
- DPRINTF((%s: cpu %ld, desc %#x\n, __func__, cpu_number(), desc));
+ DPRINTF((%s: cpu%d, desc %#x\n, __func__, cpu_number(), desc));
for (int try=16; try--; ) {
rmixl_msgsnd(desc);
RMIXL_MFC2(RMIXL_COP_2_MSG_STS, 0, msg_status);
@@ -853,7 +855,7 @@
RMIXL_MTC2(RMIXL_COP_2_MSG_STS, 1, msg_status1);
}
DIAG_PRF((%s: src=%ld, dst=%d, sts=%#x, %#x: send error, try %d\n,
- __func__, cpu_number(), dest_id, msg_status, msg_status1, try));
+ __func__, curcpu()-ci_cpuid, dest_id, msg_status, msg_status1, try));
DELAY(10);
}
rv = -1;
@@ -876,7 +878,7 @@
fmn_t *fmnp;
int rv;
- fmnp = fmn_lookup(cpu_number());
+ fmnp = fmn_lookup(curcpu()-ci_cpuid);
mutex_enter(fmnp-fmn_lock);
rv = rmixl_fmn_msg_recv_subr(bucket, rxmsg);
mutex_exit(fmnp-fmn_lock);
@@ -897,7 +899,7 @@
uint32_t msg_status;
int rv;
- fmnp = fmn_lookup(cpu_number());
+ fmnp = fmn_lookup(curcpu()-ci_cpuid);
KASSERT(mutex_owned(fmnp-fmn_lock) != 0);
for (int try=16; try--; ) {
@@ -905,14 +907,14 @@
if ((msg_status (RMIXL_MSG_STS0_LPF)) == 0)
goto recv;
}
- DIAG_PRF((%s: cpu=%ld, bucket=%d, sts=%#x: Load Pending Fail\n,
+ DIAG_PRF((%s: cpu%d, bucket=%d, sts=%#x: Load Pending Fail\n,
__func__, cpu_number(), bucket, msg_status));
rv = -1;
goto out;
recv:
rmixl_msgld(bucket);
RMIXL_MFC2(RMIXL_COP_2_MSG_STS, 0, msg_status);
- DPRINTF((%s: cpu=%ld, bucket=%d, sts=%#x\n,
+ DPRINTF((%s: cpu%d, bucket=%d, sts=%#x\n,
__func__, cpu_number(), bucket, msg_status));
rv = msg_status (RMIXL_MSG_STS0_LEF|RMIXL_MSG_STS0_LPF);
if (rv == 0) {
@@ -1146,7 +1148,7 @@
FMN_CP2_4SEL_READ(RMIXL_COP_2_CREDITS+3, 0, cc[3][0]);
FMN_CP2_4SEL_READ(RMIXL_COP_2_CREDITS+3, 4, cc[3][4]);
- printf(%s: cpu %ld\n, __func__, cpu_number());
+ printf(%s: cpu%d\n, __func__, cpu_number());
for (int i=0; i 4; i++) {
for (int j=0; j 8; j++)
printf( %#x,, cc[i][j]);
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Tue Feb 8 06:04:20 UTC 2011
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_intr.c
Log Message:
- distinguish between cpuid and cpu index.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.25 -r1.1.2.26 src/sys/arch/mips/rmi/rmixl_intr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_intr.c
diff -u src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.25 src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.26
--- src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.25 Sat Feb 5 06:11:47 2011
+++ src/sys/arch/mips/rmi/rmixl_intr.c Tue Feb 8 06:04:20 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_intr.c,v 1.1.2.25 2011/02/05 06:11:47 cliff Exp $ */
+/* $NetBSD: rmixl_intr.c,v 1.1.2.26 2011/02/08 06:04:20 cliff Exp $ */
/*-
* Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
@@ -64,7 +64,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.25 2011/02/05 06:11:47 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.26 2011/02/08 06:04:20 cliff Exp $);
#include opt_multiprocessor.h
#include opt_ddb.h
@@ -508,8 +508,8 @@
device_xname(sc-sc_dev),
rmixl_intr_string(vec));
- KASSERT(ci-ci_cpuid (sizeof(cpu_present_mask) * 8));
- atomic_or_32((volatile uint32_t *)cpu_present_mask, 1 ci-ci_cpuid);
+ KASSERT(cpu_index(ci) (sizeof(cpu_present_mask) * 8));
+ atomic_or_32((volatile uint32_t *)cpu_present_mask, 1 cpu_index(ci));
}
/*
@@ -955,9 +955,9 @@
static int
rmixl_send_ipi(struct cpu_info *ci, int tag)
{
- const cpuid_t cpu = ci-ci_cpuid;
- uint32_t core = (uint32_t)(cpu 2);
- uint32_t thread = (uint32_t)(cpu __BITS(1,0));
+ const cpuid_t cpuid = ci-ci_cpuid;
+ uint32_t core = (uint32_t)(cpuid 2);
+ uint32_t thread = (uint32_t)(cpuid __BITS(1,0));
uint64_t req = 1 tag;
uint32_t r;
extern volatile mips_cpuset_t cpus_running;
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Sat Feb 5 06:10:29 UTC 2011
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_cpu.c
Log Message:
- include opt_multiprocessor.h for MULTIPROCESSOR dependency
- add suport for MIPS COP0 watchpoint in ddb
- add ci_pmap_asid_cur print in rmixl_cpuinfo_print().
- note rmixl_cpuinfo_print() (or something like it) should eventually get moved
into a md support fn of a (hypothetical) ddb 'show cpu' command.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.16 -r1.1.2.17 src/sys/arch/mips/rmi/rmixl_cpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_cpu.c
diff -u src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.16 src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.17
--- src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.16 Fri Jan 7 00:17:22 2011
+++ src/sys/arch/mips/rmi/rmixl_cpu.c Sat Feb 5 06:10:29 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_cpu.c,v 1.1.2.16 2011/01/07 00:17:22 cliff Exp $ */
+/* $NetBSD: rmixl_cpu.c,v 1.1.2.17 2011/02/05 06:10:29 cliff Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -38,7 +38,10 @@
#include locators.h
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_cpu.c,v 1.1.2.16 2011/01/07 00:17:22 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_cpu.c,v 1.1.2.17 2011/02/05 06:10:29 cliff Exp $);
+
+#include opt_multiprocessor.h
+#include opt_ddb.h
#include sys/param.h
#include sys/device.h
@@ -60,6 +63,9 @@
#include mips/rmi/rmixl_cpuvar.h
#include mips/rmi/rmixl_intr.h
#include mips/rmi/rmixl_fmnvar.h
+#ifdef DDB
+#include mips/db_machdep.h
+#endif
static int cpu_rmixl_match(device_t, cfdata_t, void *);
@@ -91,6 +97,20 @@
static struct rmixl_cpu_trampoline_args rmixl_cpu_trampoline_args;
#endif
+#if defined(DDB) defined(MIPS_DDB_WATCH)
+/*
+ * cpu_rmixl_db_watch_init - initialize COP0 watchpoint stuff
+ *
+ * clear IEU_DEFEATURE[DBE] to ensure T_WATCH on watchpoint exception
+ * set COP0 watchhi and watchlo
+ */
+static void
+cpu_rmixl_db_watch_init(void)
+{
+ db_mach_watch_set_all();
+}
+#endif /* DDB MIPS_DDB_WATCH */
+
/*
* cpu_xls616_erratum
*
@@ -222,6 +242,10 @@
return;
once = true;
+#if defined(DDB) defined(MIPS_DDB_WATCH)
+ cpu_rmixl_db_watch_init();
+#endif
+
rmixl_fmn_init();
sc-sc_ih_clk = rmixl_intr_init_clk();
@@ -280,6 +304,10 @@
#endif
cpucore_rmixl_hatch(device_parent(sc-sc_dev));
+
+#if defined(DDB) defined(MIPS_DDB_WATCH)
+ cpu_rmixl_db_watch_init();
+#endif
}
static int
@@ -422,6 +450,7 @@
for (int i=0; i SOFTINT_COUNT; i++)
printf(ci_softlwps[%d] %p\n, i, ci-ci_softlwps[i]);
printf(ci_tlb_slot %d\n, ci-ci_tlb_slot);
+ printf(ci_pmap_asid_cur %d\n, ci-ci_pmap_asid_cur);
printf(ci_tlb_info %p\n, ci-ci_tlb_info);
printf(ci_pmap_seg0tab %p\n, ci-ci_pmap_seg0tab);
#ifdef _LP64
@@ -441,5 +470,4 @@
return ci;
}
-
#endif /* DEBUG */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: cliff Date: Sat Feb 5 06:11:16 UTC 2011 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_fmn.c Log Message: - obtain rmixl_intr_lock before rmixl_vec_establish(), he expects that lock is held To generate a diff of this commit: cvs rdiff -u -r1.1.2.4 -r1.1.2.5 src/sys/arch/mips/rmi/rmixl_fmn.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixl_fmn.c diff -u src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.4 src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.5 --- src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.4 Tue Apr 13 18:15:16 2010 +++ src/sys/arch/mips/rmi/rmixl_fmn.c Sat Feb 5 06:11:16 2011 @@ -1,4 +1,4 @@ -/* $NetBSD: rmixl_fmn.c,v 1.1.2.4 2010/04/13 18:15:16 cliff Exp $ */ +/* $NetBSD: rmixl_fmn.c,v 1.1.2.5 2011/02/05 06:11:16 cliff Exp $ */ /*- * Copyright (c) 2010 The NetBSD Foundation, Inc. * All rights reserved. @@ -644,10 +644,15 @@ /* * establish dispatcher for FMN interrupt */ - void *ih = rmixl_vec_establish(RMIXL_INTRVEC_FMN, -1, RMIXL_FMN_INTR_IPL, + extern kmutex_t rmixl_intr_lock; + void *ih; + + mutex_enter(rmixl_intr_lock); + ih = rmixl_vec_establish(RMIXL_INTRVEC_FMN, -1, RMIXL_FMN_INTR_IPL, rmixl_fmn_intr_dispatch, fmnp, fmn); if (ih == NULL) panic(%s: rmixl_vec_establish failed, __func__); + mutex_exit(rmixl_intr_lock); fmnp-fmn_ih = ih; #endif
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Sat Feb 5 06:11:48 UTC 2011
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_intr.c
Log Message:
- include opt_multiprocessor.h for MULTIPROCESSOR dependency
- use seperate vectors for various IPI tags, instead of all piling on one.
this theoretically allows different functions to interrupt at different
priorities. the fmn vector number got rippled up in the process.
- add rmixl_ipi_lock to serialize access to RMIXL_PIC_IPIBASE
- add rmixl_intr_lock to serialize access to rest of PIC and rmixl_intrhand[]
- include mips/cpuset.h and use CPUSET_* macros for cpus_running etc.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.24 -r1.1.2.25 src/sys/arch/mips/rmi/rmixl_intr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_intr.c
diff -u src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.24 src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.25
--- src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.24 Mon Sep 20 19:41:05 2010
+++ src/sys/arch/mips/rmi/rmixl_intr.c Sat Feb 5 06:11:47 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_intr.c,v 1.1.2.24 2010/09/20 19:41:05 cliff Exp $ */
+/* $NetBSD: rmixl_intr.c,v 1.1.2.25 2011/02/05 06:11:47 cliff Exp $ */
/*-
* Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
@@ -64,8 +64,9 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.24 2010/09/20 19:41:05 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.25 2011/02/05 06:11:47 cliff Exp $);
+#include opt_multiprocessor.h
#include opt_ddb.h
#define __INTR_PRIVATE
@@ -76,6 +77,7 @@
#include sys/device.h
#include sys/kernel.h
#include sys/atomic.h
+#include sys/mutex.h
#include sys/cpu.h
#include machine/bus.h
@@ -290,14 +292,14 @@
vec 6, /* 6 */
vec 7, /* 7 */
vec 8 (ipi), /* 8 */
- vec 9 (fmn), /* 9 */
- vec 10, /* 10 */
- vec 11, /* 11 */
- vec 12, /* 12 */
- vec 13, /* 13 */
- vec 14, /* 14 */
- vec 15, /* 15 */
- vec 16, /* 16 */
+ vec 9 (ipi), /* 9 */
+ vec 10 (ipi), /* 10 */
+ vec 11 (ipi), /* 11 */
+ vec 12 (ipi), /* 12 */
+ vec 13 (ipi), /* 13 */
+ vec 14 (ipi), /* 14 */
+ vec 15 (ipi), /* 15 */
+ vec 16 (fmn), /* 16 */
vec 17, /* 17 */
vec 18, /* 18 */
vec 19, /* 19 */
@@ -353,6 +355,8 @@
*/
static uint32_t cpu_present_mask;
+kmutex_t rmixl_ipi_lock; /* covers RMIXL_PIC_IPIBASE */
+kmutex_t rmixl_intr_lock; /* covers rest of PIC, and rmixl_intrhand[] */
rmixl_intrhand_t rmixl_intrhand[NINTRVECS];
#ifdef DIAGNOSTIC
@@ -407,6 +411,11 @@
__func__, rmixl_pic_init_done);
#endif
+ mutex_init(rmixl_ipi_lock, MUTEX_DEFAULT, IPL_HIGH);
+ mutex_init(rmixl_intr_lock, MUTEX_DEFAULT, IPL_HIGH);
+
+ mutex_enter(rmixl_intr_lock);
+
/*
* initialize (zero) all IRT Entries in the PIC
*/
@@ -427,6 +436,7 @@
#ifdef DIAGNOSTIC
rmixl_pic_init_done = 1;
#endif
+ mutex_exit(rmixl_intr_lock);
}
@@ -440,9 +450,14 @@
rmixl_intr_init_clk(void)
{
int vec = ffs(MIPS_INT_MASK_5 8) - 1;
+
+ mutex_enter(rmixl_intr_lock);
+
void *ih = rmixl_vec_establish(vec, 0, IPL_SCHED, NULL, NULL, false);
if (ih == NULL)
panic(%s: establish vec %d failed, __func__, vec);
+
+ mutex_exit(rmixl_intr_lock);
return ih;
}
@@ -454,14 +469,24 @@
void *
rmixl_intr_init_ipi(void)
{
- void *ih = rmixl_vec_establish(RMIXL_INTRVEC_IPI, -1, IPL_SCHED,
- rmixl_ipi_intr, NULL, false);
- if (ih == NULL)
- panic(%s: establish vec %d failed,
- __func__, RMIXL_INTRVEC_IPI);
+ u_int ipi, vec;
+ void *ih;
+
+ mutex_enter(rmixl_intr_lock);
+
+ for (ipi=0; ipi NIPIS; ipi++) {
+ vec = RMIXL_INTRVEC_IPI + ipi;
+ ih = rmixl_vec_establish(vec, -1, IPL_SCHED,
+ rmixl_ipi_intr, (void *)(uintptr_t)ipi, true);
+ if (ih == NULL)
+ panic(%s: establish ipi %d at vec %d failed,
+__func__, ipi, vec);
+ }
mips_locoresw.lsw_send_ipi = rmixl_send_ipi;
+ mutex_exit(rmixl_intr_lock);
+
return ih;
}
#endif /* MULTIPROCESSOR */
@@ -484,7 +509,7 @@
rmixl_intr_string(vec));
KASSERT(ci-ci_cpuid (sizeof(cpu_present_mask) * 8));
- cpu_present_mask |= 1 ci-ci_cpuid;
+ atomic_or_32((volatile uint32_t *)cpu_present_mask, 1 ci-ci_cpuid);
}
/*
@@ -623,6 +648,7 @@
static void
rmixl_irt_disestablish(int irt)
{
+ KASSERT(mutex_owned(rmixl_intr_lock));
DPRINTF((%s: irt %d, irtc1 %#x\n, __func__, irt, 0));
rmixl_irt_init(irt);
}
@@ -638,6 +664,8 @@
uint32_t irtc1;
uint32_t irtc0;
+ KASSERT(mutex_owned(rmixl_intr_lock));
+
if (irt = NIRTS)
panic(%s: bad irt %d\n, __func__, irt);
@@ -698,6 +726,8 @@
uint64_t eimr_bit;
int s;
+ KASSERT(mutex_owned(rmixl_intr_lock));
+
DPRINTF((%s: vec %d, cpumask %#x, ipl %d, func %p, arg %p\n
__func__, vec, cpumask, ipl, func, arg));
#ifdef DIAGNOSTIC
@@ -756,7 +786,6 @@
{
rmixl_intrhand_t *ih;
int vec;
- int s;
#ifdef DIAGNOSTIC
if (rmixl_pic_init_done == 0)
@@ -777,7 +806,7 @@
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Sat Feb 5 06:12:42 UTC 2011
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_intr.h
Log Message:
- include opt_multiprocessor.h for MULTIPROCESSOR dependency
- move RMIXL_INTRVEC_FMN to RMIXL_INTRVEC_IPI + NIPIS
since each IPI tag now has own vector
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.4 -r1.1.2.5 src/sys/arch/mips/rmi/rmixl_intr.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_intr.h
diff -u src/sys/arch/mips/rmi/rmixl_intr.h:1.1.2.4 src/sys/arch/mips/rmi/rmixl_intr.h:1.1.2.5
--- src/sys/arch/mips/rmi/rmixl_intr.h:1.1.2.4 Fri May 21 23:35:42 2010
+++ src/sys/arch/mips/rmi/rmixl_intr.h Sat Feb 5 06:12:42 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_intr.h,v 1.1.2.4 2010/05/21 23:35:42 cliff Exp $ */
+/* $NetBSD: rmixl_intr.h,v 1.1.2.5 2011/02/05 06:12:42 cliff Exp $ */
/*-
* Copyright (c) 2010 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -31,6 +31,8 @@
#ifndef _MIPS_RMI_RMIXL_INTR_H_
#define _MIPS_RMI_RMIXL_INTR_H_
+#include opt_multiprocessor.h
+
/*
* A 'vector' is bit number in EIRR/EIMR
* - non-IRT-based interrupts use vectors 0..31
@@ -54,7 +56,7 @@
* vectors (8 = vec 31) are for other non-IRT based interrupts
*/
#define RMIXL_INTRVEC_IPI 8
-#define RMIXL_INTRVEC_FMN 9
+#define RMIXL_INTRVEC_FMN (RMIXL_INTRVEC_IPI + NIPIS)
typedef enum {
RMIXL_TRIG_NONE=0,
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Sat Feb 5 06:13:17 UTC 2011
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_usbi.c
Log Message:
- if obio_intr is OBIOCF_INTR_DEFAULT, don't establish an interrupt
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.5 -r1.1.2.6 src/sys/arch/mips/rmi/rmixl_usbi.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_usbi.c
diff -u src/sys/arch/mips/rmi/rmixl_usbi.c:1.1.2.5 src/sys/arch/mips/rmi/rmixl_usbi.c:1.1.2.6
--- src/sys/arch/mips/rmi/rmixl_usbi.c:1.1.2.5 Mon Apr 12 22:42:07 2010
+++ src/sys/arch/mips/rmi/rmixl_usbi.c Sat Feb 5 06:13:16 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_usbi.c,v 1.1.2.5 2010/04/12 22:42:07 cliff Exp $ */
+/* $NetBSD: rmixl_usbi.c,v 1.1.2.6 2011/02/05 06:13:16 cliff Exp $ */
/*-
* Copyright (c) 1998, 1999, 2000, 2002, 2003 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_usbi.c,v 1.1.2.5 2010/04/12 22:42:07 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_usbi.c,v 1.1.2.6 2011/02/05 06:13:16 cliff Exp $);
#include locators.h
@@ -173,11 +173,14 @@
RMIXL_USBI_GEN_WRITE(RMIXL_USB_INTERRUPT_ENABLE, 0);
/* establish interrupt */
- ih = rmixl_intr_establish(obio-obio_intr, obio-obio_tmsk,
- IPL_USB, RMIXL_TRIG_LEVEL, RMIXL_POLR_HIGH,
- rmixl_usbi_intr, sc, false);
- if (ih == NULL)
- panic(%s: couldn't establish interrupt, device_xname(self));
+ if (obio-obio_intr != OBIOCF_INTR_DEFAULT) {
+ ih = rmixl_intr_establish(obio-obio_intr, obio-obio_tmsk,
+ IPL_USB, RMIXL_TRIG_LEVEL, RMIXL_POLR_HIGH,
+ rmixl_usbi_intr, sc, false);
+ if (ih == NULL)
+ panic(%s: couldn't establish interrupt,
+device_xname(self));
+ }
aprint_normal(\n);
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Fri Jan 7 00:16:20 UTC 2011
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixlvar.h
Log Message:
- add prottotype for rmixl_pcr_init_core()
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.18 -r1.1.2.19 src/sys/arch/mips/rmi/rmixlvar.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixlvar.h
diff -u src/sys/arch/mips/rmi/rmixlvar.h:1.1.2.18 src/sys/arch/mips/rmi/rmixlvar.h:1.1.2.19
--- src/sys/arch/mips/rmi/rmixlvar.h:1.1.2.18 Sat Apr 17 07:33:33 2010
+++ src/sys/arch/mips/rmi/rmixlvar.h Fri Jan 7 00:16:20 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixlvar.h,v 1.1.2.18 2010/04/17 07:33:33 cliff Exp $ */
+/* $NetBSD: rmixlvar.h,v 1.1.2.19 2011/01/07 00:16:20 cliff Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -46,6 +46,8 @@
#include dev/pci/pcivar.h
+extern void rmixl_pcr_init_core(void);
+
static inline bool
cpu_rmixl(const struct pridtab *ct)
{
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Fri Jan 7 00:16:59 UTC 2011
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_cpucore.c
Log Message:
- add cpucore_rmixl_hatch() for per-core initialization
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.6 -r1.1.2.7 src/sys/arch/mips/rmi/rmixl_cpucore.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_cpucore.c
diff -u src/sys/arch/mips/rmi/rmixl_cpucore.c:1.1.2.6 src/sys/arch/mips/rmi/rmixl_cpucore.c:1.1.2.7
--- src/sys/arch/mips/rmi/rmixl_cpucore.c:1.1.2.6 Sun Mar 21 21:24:19 2010
+++ src/sys/arch/mips/rmi/rmixl_cpucore.c Fri Jan 7 00:16:59 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_cpucore.c,v 1.1.2.6 2010/03/21 21:24:19 cliff Exp $ */
+/* $NetBSD: rmixl_cpucore.c,v 1.1.2.7 2011/01/07 00:16:59 cliff Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -38,7 +38,7 @@
#include locators.h
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_cpucore.c,v 1.1.2.6 2010/03/21 21:24:19 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_cpucore.c,v 1.1.2.7 2011/01/07 00:16:59 cliff Exp $);
#include sys/param.h
#include sys/device.h
@@ -50,6 +50,7 @@
#include mips/rmi/rmixlvar.h
#include mips/rmi/rmixl_cpunodevar.h
#include mips/rmi/rmixl_cpucorevar.h
+#include mips/rmi/rmixl_fmnvar.h
static int cpucore_rmixl_match(device_t, cfdata_t, void *);
static void cpucore_rmixl_attach(device_t, device_t, void *);
@@ -87,6 +88,7 @@
sc-sc_dev = self;
sc-sc_core = na-na_core;
+ sc-sc_hatched = false;
#ifdef MULTIPROCESSOR
/*
@@ -148,3 +150,24 @@
return (UNCONF);
}
+
+#ifdef MULTIPROCESSOR
+/*
+ * cpucore_rmixl_hatch
+ * called from cpu_rmixl_hatch for each cpu
+ * the first call for each cpucore causes init of per-core features
+ */
+void
+cpucore_rmixl_hatch(device_t self)
+{
+ struct cpucore_softc * const sc = device_private(self);
+
+ if (sc-sc_hatched == false) {
+ /* PCRs for core#0 are set up in mach_init() */
+ if (sc-sc_core != 0)
+ rmixl_pcr_init_core();
+ rmixl_fmn_init_core();
+ sc-sc_hatched = true;
+ }
+}
+#endif /* MULTIPROCESSOR */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Fri Jan 7 00:17:22 UTC 2011
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_cpu.c
Log Message:
- ifdef out guts of cpu_xls616_erratum(); the problem is still unknown.
- cpu_rmixl_hatch() calls cpucore_rmixl_hatch()
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.15 -r1.1.2.16 src/sys/arch/mips/rmi/rmixl_cpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_cpu.c
diff -u src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.15 src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.16
--- src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.15 Mon Sep 20 19:39:10 2010
+++ src/sys/arch/mips/rmi/rmixl_cpu.c Fri Jan 7 00:17:22 2011
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_cpu.c,v 1.1.2.15 2010/09/20 19:39:10 cliff Exp $ */
+/* $NetBSD: rmixl_cpu.c,v 1.1.2.16 2011/01/07 00:17:22 cliff Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -38,7 +38,7 @@
#include locators.h
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_cpu.c,v 1.1.2.15 2010/09/20 19:39:10 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_cpu.c,v 1.1.2.16 2011/01/07 00:17:22 cliff Exp $);
#include sys/param.h
#include sys/device.h
@@ -106,6 +106,7 @@
static inline bool
cpu_xls616_erratum(device_t parent, struct cpucore_attach_args *ca)
{
+#if 0
if (mips_options.mips_cpu-cpu_pid == MIPS_XLS616) {
if (ca-ca_thread 0) {
aprint_error_dev(parent, XLS616 CLOCK ERRATUM:
@@ -113,6 +114,7 @@
return true;
}
}
+#endif
return false;
}
@@ -263,6 +265,7 @@
void
cpu_rmixl_hatch(struct cpu_info *ci)
{
+ struct rmixl_cpu_softc * const sc = (void *)ci-ci_softc;
extern void rmixl_spl_init_cpu(void);
rmixl_spl_init_cpu(); /* spl initialization for this CPU */
@@ -276,8 +279,7 @@
KASSERT(curcpu() == ci);
#endif
- if (RMIXL_CPU_THREAD(ci-ci_cpuid) == 0)
- rmixl_fmn_init_core();
+ cpucore_rmixl_hatch(device_parent(sc-sc_dev));
}
static int
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: cliff Date: Mon Sep 20 19:39:10 UTC 2010 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_cpu.c Log Message: - remove MULTIPROCESSOR condition for rmixl_cpuinfo_print and rmixl_cpu_data_print functions, so we can call them e.g. from ddb in non-MP kernels To generate a diff of this commit: cvs rdiff -u -r1.1.2.14 -r1.1.2.15 src/sys/arch/mips/rmi/rmixl_cpu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixl_cpu.c diff -u src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.14 src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.15 --- src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.14 Wed Sep 1 00:59:43 2010 +++ src/sys/arch/mips/rmi/rmixl_cpu.c Mon Sep 20 19:39:10 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: rmixl_cpu.c,v 1.1.2.14 2010/09/01 00:59:43 matt Exp $ */ +/* $NetBSD: rmixl_cpu.c,v 1.1.2.15 2010/09/20 19:39:10 cliff Exp $ */ /* * Copyright 2002 Wasabi Systems, Inc. @@ -38,7 +38,7 @@ #include locators.h #include sys/cdefs.h -__KERNEL_RCSID(0, $NetBSD: rmixl_cpu.c,v 1.1.2.14 2010/09/01 00:59:43 matt Exp $); +__KERNEL_RCSID(0, $NetBSD: rmixl_cpu.c,v 1.1.2.15 2010/09/20 19:39:10 cliff Exp $); #include sys/param.h #include sys/device.h @@ -76,12 +76,13 @@ #endif static int cpu_setup_trampoline_common(struct cpu_info *, struct rmixl_cpu_trampoline_args *); static void cpu_setup_trampoline_callback(struct cpu_info *); +#endif /* MULTIPROCESSOR */ + #ifdef DEBUG void rmixl_cpu_data_print(struct cpu_data *); struct cpu_info * rmixl_cpuinfo_print(cpuid_t); #endif /* DEBUG */ -#endif /* MULTIPROCESSOR */ CFATTACH_DECL_NEW(cpu_rmixl, sizeof(struct rmixl_cpu_softc), cpu_rmixl_match, cpu_rmixl_attach, NULL, NULL); @@ -354,6 +355,7 @@ rmixlfw_wakeup_cpu(rmixl_cpu_trampoline, (void *)ta, (uint64_t)1 ci-ci_cpuid, wakeup_cpu); } +#endif /* MULTIPROCESSOR */ #ifdef DEBUG @@ -439,4 +441,3 @@ } #endif /* DEBUG */ -#endif /* MULTIPROCESSOR */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: cliff Date: Mon Sep 20 19:40:11 UTC 2010 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_spl.S Log Message: - .set noreorder up top to avoid instruction reordering - adopt bugfix suggested by Manuel Boyer for mips/spl.S: in _splraise and _splsw_splhigh, reload L_CPU in case we were preempted prior to interrupts being blocked (thanks). To generate a diff of this commit: cvs rdiff -u -r1.1.2.4 -r1.1.2.5 src/sys/arch/mips/rmi/rmixl_spl.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixl_spl.S diff -u src/sys/arch/mips/rmi/rmixl_spl.S:1.1.2.4 src/sys/arch/mips/rmi/rmixl_spl.S:1.1.2.5 --- src/sys/arch/mips/rmi/rmixl_spl.S:1.1.2.4 Fri May 28 22:14:53 2010 +++ src/sys/arch/mips/rmi/rmixl_spl.S Mon Sep 20 19:40:11 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: rmixl_spl.S,v 1.1.2.4 2010/05/28 22:14:53 cliff Exp $ */ +/* $NetBSD: rmixl_spl.S,v 1.1.2.5 2010/09/20 19:40:11 cliff Exp $ */ /*- * Copyright (c) 2009, 2010 The NetBSD Foundation, Inc. @@ -37,7 +37,7 @@ #include mips/asm.h #include mips/cpuregs.h -RCSID($NetBSD: rmixl_spl.S,v 1.1.2.4 2010/05/28 22:14:53 cliff Exp $); +RCSID($NetBSD: rmixl_spl.S,v 1.1.2.5 2010/09/20 19:40:11 cliff Exp $); #include assym.h @@ -50,6 +50,7 @@ #define RMIXL_COP_0_EIRR _(9), 6 #define RMIXL_COP_0_EIMR _(9), 7 + .set noreorder /* * Array of mask of bits to set in the EIMR when we go to a @@ -111,6 +112,8 @@ bnez v1, 2f# yes, don't change. nop dmtc0 zero, RMIXL_COP_0_EIMR ## disable all interrupts + PTR_L a3, L_CPU(MIPS_CURLWP) ## reload L_CPU in case we were + ## preempted and moved... INT_S a1, CPU_INFO_CPL(a3) ## save IPL in cpu_info dmtc0 a0, RMIXL_COP_0_EIMR ## set new EIMR #ifdef PARANOIA @@ -226,6 +229,8 @@ beq v0, a1, 1f # don't do anything if IPL_HIGH nop dmtc0 zero, RMIXL_COP_0_EIMR ## disable all interrupts + PTR_L a3, L_CPU(MIPS_CURLWP) ## reload L_CPU in case we were + ## preempted and moved... INT_S a1, CPU_INFO_CPL(a3) ## save IPL in cpu_info ## interrupts remain disabled! #ifdef PARANOIA
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Mon Sep 20 19:41:06 UTC 2010
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_intr.c
Log Message:
- rmixl_intrhand_t is valid only if ih_func is non-NULL;
set valid at end of rmixl_vec_establish and
set invalid at start of rmixl_vec_disestablish
to allow lockless check if valid in dispatch.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.23 -r1.1.2.24 src/sys/arch/mips/rmi/rmixl_intr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_intr.c
diff -u src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.23 src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.24
--- src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.23 Thu Aug 26 20:09:33 2010
+++ src/sys/arch/mips/rmi/rmixl_intr.c Mon Sep 20 19:41:05 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_intr.c,v 1.1.2.23 2010/08/26 20:09:33 rmind Exp $ */
+/* $NetBSD: rmixl_intr.c,v 1.1.2.24 2010/09/20 19:41:05 cliff Exp $ */
/*-
* Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
@@ -64,7 +64,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.23 2010/08/26 20:09:33 rmind Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.24 2010/09/20 19:41:05 cliff Exp $);
#include opt_ddb.h
#define __INTR_PRIVATE
@@ -726,7 +726,6 @@
return NULL;
}
- ih-ih_func = func;
ih-ih_arg = arg;
ih-ih_mpsafe = mpsafe;
ih-ih_vec = vec;
@@ -739,6 +738,8 @@
ipl_eimr_map[i] |= eimr_bit;
}
+ ih-ih_func = func; /* do this last */
+
splx(s);
return ih;
@@ -805,7 +806,7 @@
s = splhigh();
- ih-ih_func = NULL;
+ ih-ih_func = NULL; /* do this first */
eimr_bit = (uint64_t)1 ih-ih_vec;
for (int i=ih-ih_ipl; --i = 0; ) {
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Mon Sep 20 19:42:31 UTC 2010
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_pcie.c rmixl_pcievar.h
rmixl_pcix.c rmixl_pcixvar.h
Log Message:
- provide lockless interrupt dispatch by eliminating use of LIST(9)
for interrupt handles. Handles are now managed in variable size arrays.
Establishing a new interrupt causes allocation of a new array, pointer
to which is changed atomically. Old arrays are allowed to persist for
some time before free, allowing any CPU working with that data
to safely finish using it.
- interrupt events are now managed per-CPU, avoid need for atomic adds.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.15 -r1.1.2.16 src/sys/arch/mips/rmi/rmixl_pcie.c
cvs rdiff -u -r1.1.2.7 -r1.1.2.8 src/sys/arch/mips/rmi/rmixl_pcievar.h
cvs rdiff -u -r1.1.2.6 -r1.1.2.7 src/sys/arch/mips/rmi/rmixl_pcix.c
cvs rdiff -u -r1.1.2.2 -r1.1.2.3 src/sys/arch/mips/rmi/rmixl_pcixvar.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_pcie.c
diff -u src/sys/arch/mips/rmi/rmixl_pcie.c:1.1.2.15 src/sys/arch/mips/rmi/rmixl_pcie.c:1.1.2.16
--- src/sys/arch/mips/rmi/rmixl_pcie.c:1.1.2.15 Thu Aug 26 20:09:33 2010
+++ src/sys/arch/mips/rmi/rmixl_pcie.c Mon Sep 20 19:42:31 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_pcie.c,v 1.1.2.15 2010/08/26 20:09:33 rmind Exp $ */
+/* $NetBSD: rmixl_pcie.c,v 1.1.2.16 2010/09/20 19:42:31 cliff Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -40,7 +40,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_pcie.c,v 1.1.2.15 2010/08/26 20:09:33 rmind Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_pcie.c,v 1.1.2.16 2010/09/20 19:42:31 cliff Exp $);
#include opt_pci.h
#include pci.h
@@ -52,6 +52,8 @@
#include sys/device.h
#include sys/extent.h
#include sys/malloc.h
+#include sys/kernel.h /* for 'hz' */
+#include sys/cpu.h
#include uvm/uvm_extern.h
@@ -158,6 +160,9 @@
uint64_t)RMIXL_PCIE_LINK_STATUS1_ERRORS) 32) | \
(uint64_t)RMIXL_PCIE_LINK_STATUS0_ERRORS)
+#define RMIXL_PCIE_EVCNT(sc, link, bitno, cpu) \
+ (sc)-sc_evcnts[link][(bitno) * (ncpu) + (cpu)]
+
static int rmixl_pcie_match(device_t, cfdata_t, void *);
static void rmixl_pcie_attach(device_t, device_t, void *);
static void rmixl_pcie_init(struct rmixl_pcie_softc *);
@@ -195,6 +200,10 @@
static void rmixl_pcie_intr_disestablish(void *, void *);
static void *rmixl_pcie_intr_establish(void *, pci_intr_handle_t,
int, int (*)(void *), void *);
+static rmixl_pcie_link_intr_t *
+ rmixl_pcie_lip_add_1(rmixl_pcie_softc_t *, u_int, int, int);
+static void rmixl_pcie_lip_free_callout(rmixl_pcie_link_intr_t *);
+static void rmixl_pcie_lip_free(void *);
static int rmixl_pcie_intr(void *);
static void rmixl_pcie_link_error_intr(u_int, uint32_t, uint32_t);
#if defined(DEBUG) || defined(DDB)
@@ -203,12 +212,6 @@
static int _rmixl_pcie_error_check(void *);
static int rmixl_pcie_error_intr(void *);
-/*
- * XXX use locks
- */
-#define PCI_CONF_LOCK(s) (s) = splhigh()
-#define PCI_CONF_UNLOCK(s) splx((s))
-
#define RMIXL_PCIE_CONCAT3(a,b,c) a ## b ## c
#define RMIXL_PCIE_BAR_INIT(reg, bar, size, align) { \
@@ -288,6 +291,8 @@
aprint_normal( RMI XLS PCIe Interface\n);
+ mutex_init(sc-sc_mutex, MUTEX_DEFAULT, IPL_HIGH);
+
rmixl_pcie_lnkcfg(sc);
rmixl_pcie_intcfg(sc);
@@ -546,8 +551,9 @@
static void
rmixl_pcie_intcfg(struct rmixl_pcie_softc *sc)
{
- rmixl_pcie_link_intr_t *lip;
int link;
+ size_t size;
+ rmixl_pcie_evcnt_t *ev;
DPRINTF((%s: disable all link interrupts\n, __func__));
for (link=0; link sc-sc_pcie_lnktab.ncfgs; link++) {
@@ -556,11 +562,25 @@
RMIXL_IOREG_WRITE(RMIXL_IO_DEV_PCIE_LE + int_enb_offset[link].r1,
RMIXL_PCIE_LINK_STATUS1_ERRORS);
RMIXL_IOREG_WRITE(RMIXL_IO_DEV_PCIE_LE + msi_enb_offset[link], 0);
- lip = sc-sc_link_intr[link];
- LIST_INIT(lip-dispatch);
- lip-ih = NULL;
- lip-link = link;
- lip-enabled = false;
+ sc-sc_link_intr[link] = NULL;
+
+ /*
+ * allocate per-cpu, per-pin interrupt event counters
+ */
+ size = ncpu * PCI_INTERRUPT_PIN_MAX * sizeof(rmixl_pcie_evcnt_t);
+ ev = malloc(size, M_DEVBUF, M_NOWAIT);
+ if (ev == NULL)
+ panic(%s: cannot malloc evcnts\n, __func__);
+ sc-sc_evcnts[link] = ev;
+ for (int pin=PCI_INTERRUPT_PIN_A; pin = PCI_INTERRUPT_PIN_MAX; pin++) {
+ for (int cpu=0; cpu ncpu; cpu++) {
+ev = RMIXL_PCIE_EVCNT(sc, link, pin - 1, cpu);
+snprintf(ev-name, sizeof(ev-name),
+ cpu%d, link %d, pin %d, cpu, link, pin);
+evcnt_attach_dynamic(ev-evcnt, EVCNT_TYPE_INTR,
+ NULL, rmixl_pcie, ev-name);
+ }
+ }
}
}
@@ -956,9 +976,8 @@
bus_space_tag_t bst;
pcireg_t rv;
uint64_t cfg0;
- u_int s;
- PCI_CONF_LOCK(s);
+ mutex_enter(sc-sc_mutex);
if (rmixl_pcie_conf_setup(sc, tag, offset, bst, bsh) == 0) {
cfg0 = rmixl_cache_err_dis();
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: rmind Date: Thu Aug 26 20:09:33 UTC 2010 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_intr.c rmixl_pcie.c rmixl_pcix.c Log Message: Fix non-DEBUG/DIAGNOSTIC builds of RMI mips64. To generate a diff of this commit: cvs rdiff -u -r1.1.2.22 -r1.1.2.23 src/sys/arch/mips/rmi/rmixl_intr.c cvs rdiff -u -r1.1.2.14 -r1.1.2.15 src/sys/arch/mips/rmi/rmixl_pcie.c cvs rdiff -u -r1.1.2.5 -r1.1.2.6 src/sys/arch/mips/rmi/rmixl_pcix.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixl_intr.c diff -u src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.22 src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.23 --- src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.22 Thu Jun 10 00:41:43 2010 +++ src/sys/arch/mips/rmi/rmixl_intr.c Thu Aug 26 20:09:33 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: rmixl_intr.c,v 1.1.2.22 2010/06/10 00:41:43 cliff Exp $ */ +/* $NetBSD: rmixl_intr.c,v 1.1.2.23 2010/08/26 20:09:33 rmind Exp $ */ /*- * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko. @@ -64,7 +64,7 @@ */ #include sys/cdefs.h -__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.22 2010/06/10 00:41:43 cliff Exp $); +__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.23 2010/08/26 20:09:33 rmind Exp $); #include opt_ddb.h #define __INTR_PRIVATE @@ -373,7 +373,7 @@ static int rmixl_ipi_intr(void *); #endif -#if defined(IOINTR_DEBUG) || defined(DIAGNOSTIC) +#if defined(DIAGNOSTIC) || defined(IOINTR_DEBUG) || defined(DDB) int rmixl_intrhand_print_subr(int); int rmixl_intrhand_print(void); int rmixl_irt_print(void); Index: src/sys/arch/mips/rmi/rmixl_pcie.c diff -u src/sys/arch/mips/rmi/rmixl_pcie.c:1.1.2.14 src/sys/arch/mips/rmi/rmixl_pcie.c:1.1.2.15 --- src/sys/arch/mips/rmi/rmixl_pcie.c:1.1.2.14 Sat May 8 18:08:34 2010 +++ src/sys/arch/mips/rmi/rmixl_pcie.c Thu Aug 26 20:09:33 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: rmixl_pcie.c,v 1.1.2.14 2010/05/08 18:08:34 matt Exp $ */ +/* $NetBSD: rmixl_pcie.c,v 1.1.2.15 2010/08/26 20:09:33 rmind Exp $ */ /* * Copyright (c) 2001 Wasabi Systems, Inc. @@ -40,7 +40,7 @@ */ #include sys/cdefs.h -__KERNEL_RCSID(0, $NetBSD: rmixl_pcie.c,v 1.1.2.14 2010/05/08 18:08:34 matt Exp $); +__KERNEL_RCSID(0, $NetBSD: rmixl_pcie.c,v 1.1.2.15 2010/08/26 20:09:33 rmind Exp $); #include opt_pci.h #include pci.h @@ -1222,7 +1222,7 @@ u_int link, bitno, irq; uint32_t r; rmixl_pcie_link_intr_t *lip; - rmixl_pcie_link_dispatch_t *dip; + rmixl_pcie_link_dispatch_t *dip = NULL; uint32_t bit; u_int offset; int s; Index: src/sys/arch/mips/rmi/rmixl_pcix.c diff -u src/sys/arch/mips/rmi/rmixl_pcix.c:1.1.2.5 src/sys/arch/mips/rmi/rmixl_pcix.c:1.1.2.6 --- src/sys/arch/mips/rmi/rmixl_pcix.c:1.1.2.5 Sat Apr 17 07:34:08 2010 +++ src/sys/arch/mips/rmi/rmixl_pcix.c Thu Aug 26 20:09:33 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: rmixl_pcix.c,v 1.1.2.5 2010/04/17 07:34:08 cliff Exp $ */ +/* $NetBSD: rmixl_pcix.c,v 1.1.2.6 2010/08/26 20:09:33 rmind Exp $ */ /* * Copyright (c) 2001 Wasabi Systems, Inc. @@ -40,7 +40,7 @@ */ #include sys/cdefs.h -__KERNEL_RCSID(0, $NetBSD: rmixl_pcix.c,v 1.1.2.5 2010/04/17 07:34:08 cliff Exp $); +__KERNEL_RCSID(0, $NetBSD: rmixl_pcix.c,v 1.1.2.6 2010/08/26 20:09:33 rmind Exp $); #include opt_pci.h #include pci.h @@ -263,7 +263,7 @@ static int rmixl_pcix_found; -#if defined(DIAGNOSTIC) || defined(DEBUG) || defined(DDB) +#ifdef DIAGNOSTIC static rmixl_pcix_softc_t *rmixl_pcix_sc; #endif
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Thu Jun 10 00:41:43 UTC 2010
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_intr.c
Log Message:
- remove rmixl_spl_init_cpu calls from rmixl_intr_init_cpu
because rmixl_intr_init_cpu only runs on cpu#0.
rmixl_spl_init_cpu calls are now done in cpu_rmixl_atach (for cpu#0)
or cpu_rmixl_hatch (for other cpus).
- in evbmips_iointr, be sure to mask out count/compare interrupt
along with softints (these are handled elsewhere)
and improve coments
- fix bug in rmixl_send_ipi: 'cpus_running' is bit-indexed
by ci_index, not ci_cpuid
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.21 -r1.1.2.22 src/sys/arch/mips/rmi/rmixl_intr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_intr.c
diff -u src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.21 src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.22
--- src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.21 Fri May 28 22:14:53 2010
+++ src/sys/arch/mips/rmi/rmixl_intr.c Thu Jun 10 00:41:43 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_intr.c,v 1.1.2.21 2010/05/28 22:14:53 cliff Exp $ */
+/* $NetBSD: rmixl_intr.c,v 1.1.2.22 2010/06/10 00:41:43 cliff Exp $ */
/*-
* Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
@@ -64,7 +64,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.21 2010/05/28 22:14:53 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.22 2010/06/10 00:41:43 cliff Exp $);
#include opt_ddb.h
#define __INTR_PRIVATE
@@ -474,12 +474,9 @@
rmixl_intr_init_cpu(struct cpu_info *ci)
{
struct rmixl_cpu_softc *sc = (void *)ci-ci_softc;
- extern void rmixl_spl_init_cpu(void);
KASSERT(sc != NULL);
- rmixl_spl_init_cpu();
-
for (int vec=0; vec NINTRVECS; vec++)
evcnt_attach_dynamic(sc-sc_vec_evcnts[vec],
EVCNT_TYPE_INTR, NULL,
@@ -869,28 +866,39 @@
int vec;
asm volatile(dmfc0 %0, $9, 6; : =r(eirr));
+ asm volatile(dmfc0 %0, $9, 7; : =r(eimr));
#ifdef IOINTR_DEBUG
- asm volatile(dmfc0 %0, $9, 7; : =r(eimr));
printf(%s: eirr %#PRIx64, eimr %#PRIx64, mask %#PRIx64\n,
__func__, eirr, eimr, ipl_eimr_map[ipl-1]);
#endif /* IOINTR_DEBUG */
+ /*
+ * reduce eirr to
+ * - ints that are enabled at or below this ipl
+ * - exclude count/compare clock and soft ints
+ * they are handled elsewhere
+ */
eirr = ipl_eimr_map[ipl-1];
- eirr = ~ipl_eimr_map[ipl]; /* mask off higher ints */
- eirr = ~(MIPS_SOFT_INT_MASK 8); /* mask off soft ints */
+ eirr = ~ipl_eimr_map[ipl];
+ eirr = ~((MIPS_INT_MASK_5 | MIPS_SOFT_INT_MASK) 8);
if (eirr == 0)
break;
vec = 63 - dclz(eirr);
ih = rmixl_intrhand[vec];
- KASSERT (ih-ih_ipl == ipl);
-
- asm volatile(dmfc0 %0, $9, 7; : =r(eimr));
- asm volatile(dmtc0 $0, $9, 7;);
vecbit = 1ULL vec;
+ KASSERT (ih-ih_ipl == ipl);
KASSERT ((vecbit eimr) == 0);
KASSERT ((vecbit RMIXL_EIRR_PRESERVE_MASK) == 0);
+
+ /*
+ * ack in EIRR the irq we are about to handle
+ * disable all interrupt to prevent a race that would allow
+ * e.g. softints set from a higher interrupt getting
+ * clobbered by the EIRR read-modify-write
+ */
+ asm volatile(dmtc0 $0, $9, 7;);
asm volatile(dmfc0 %0, $9, 6; : =r(eirr));
eirr = RMIXL_EIRR_PRESERVE_MASK;
eirr |= vecbit;
@@ -929,7 +937,7 @@
uint32_t r;
extern volatile u_long cpus_running;
- if ((cpus_running 1 ci-ci_cpuid) == 0)
+ if ((cpus_running 1 ci-ci_index) == 0)
return -1;
KASSERT(tag NIPIS);
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Thu Jun 10 01:11:26 UTC 2010
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_cpu.c
Log Message:
- remove rmixl_spl_init_cpu calls from rmixl_intr_init_cpu
because rmixl_intr_init_cpu only runs on cpu#0.
rmixl_spl_init_cpu calls are now done in cpu_rmixl_atach (for cpu#0)
or cpu_rmixl_hatch (for other cpus).
- add cpu_xls616_erratum to avoid count/compare conflict on XLS616
XXX VERIFY WITH RMI
- rmixl_spl_init_cpu CPU#0 in attach, others in hatch
- remove splhi/splx for non-cpu#0 work in attach
interrupts arent enabled yet anyway
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.11 -r1.1.2.12 src/sys/arch/mips/rmi/rmixl_cpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_cpu.c
diff -u src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.11 src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.12
--- src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.11 Sat May 1 06:10:04 2010
+++ src/sys/arch/mips/rmi/rmixl_cpu.c Thu Jun 10 01:11:26 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_cpu.c,v 1.1.2.11 2010/05/01 06:10:04 cliff Exp $ */
+/* $NetBSD: rmixl_cpu.c,v 1.1.2.12 2010/06/10 01:11:26 cliff Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -38,7 +38,7 @@
#include locators.h
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_cpu.c,v 1.1.2.11 2010/05/01 06:10:04 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_cpu.c,v 1.1.2.12 2010/06/10 01:11:26 cliff Exp $);
#include sys/param.h
#include sys/device.h
@@ -90,6 +90,37 @@
static struct rmixl_cpu_trampoline_args rmixl_cpu_trampoline_args;
#endif
+/*
+ * cpu_xls616_erratum
+ *
+ * on the XLS616, COUNT/COMPARE clock regs seem to interact between
+ * threads on a core
+ *
+ * the symptom of the error is retarded clock interrupts
+ * and very slow apparent system performance
+ *
+ * other XLS chips may have the same problem.
+ * we may need to add other PID checks.
+ */
+static inline bool
+cpu_xls616_erratum(device_t parent, struct cpucore_attach_args *ca)
+{
+ if (mips_options.mips_cpu-cpu_pid == MIPS_XLS616) {
+ if (ca-ca_thread 0) {
+ aprint_error_dev(parent, XLS616 CLOCK ERRATUM:
+deconfigure cpu%d\n, ca-ca_thread);
+ return true;
+ }
+ }
+ return false;
+}
+
+static bool
+cpu_rmixl_erratum(device_t parent, struct cpucore_attach_args *ca)
+{
+ return cpu_xls616_erratum(parent, ca);
+}
+
static int
cpu_rmixl_match(device_t parent, cfdata_t cf, void *aux)
{
@@ -103,7 +134,8 @@
#ifndef MULTIPROCESSOR
ca-ca_thread == 0
#endif
- (thread == CPUCORECF_THREAD_DEFAULT || thread == ca-ca_thread))
+ (thread == CPUCORECF_THREAD_DEFAULT || thread == ca-ca_thread)
+ (!cpu_rmixl_erratum(parent, ca)))
return 1;
return 0;
@@ -115,6 +147,7 @@
struct rmixl_cpu_softc * const sc = device_private(self);
struct cpucore_attach_args *ca = aux;
struct cpu_info *ci = NULL;
+ extern void rmixl_spl_init_cpu(void);
if (ca-ca_thread == 0 ca-ca_core == 0) {
ci = curcpu();
@@ -122,6 +155,7 @@
sc-sc_ci = ci;
ci-ci_softc = (void *)sc;
+ rmixl_spl_init_cpu(); /* spl initialization for CPU#0 */
cpu_rmixl_attach_once(sc);
#ifdef MULTIPROCESSOR
@@ -130,9 +164,6 @@
struct cpucore_softc * const ccsc = device_private(parent);
rmixlfw_psb_type_t psb_type = rmixl_configuration.rc_psb_type;
cpuid_t cpuid;
- int s;
-
- s = splhigh();
KASSERT(ca-ca_core 8);
KASSERT(ca-ca_thread 4);
@@ -164,9 +195,6 @@
aprint_error(: failed to hatch\n);
return;
}
-
- splx(s);
-
#endif /* MULTIPROCESSOR */
}
@@ -233,6 +261,10 @@
void
cpu_rmixl_hatch(struct cpu_info *ci)
{
+ extern void rmixl_spl_init_cpu(void);
+
+ rmixl_spl_init_cpu(); /* spl initialization for this CPU */
+
(void)splhigh();
#ifdef DEBUG
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Fri May 28 22:14:53 UTC 2010
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_intr.c rmixl_spl.S
Log Message:
rmixl_spl.S:
- where possible, stop using CP0 STATUS to disable all interrupts,zero EIMR
instead. more efficient since less meddling with CP0.
assume STATUS[IE] is normally set.
- add rmixl_spl_init_cpu(), to initialize cp0 interrupt control for this cpu
rmixl_intr.c:
- rmixl_intr_init_cpu() calls rmixl_spl_init_cpu()
to set up CP0 interrupt controls for this cpu
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.20 -r1.1.2.21 src/sys/arch/mips/rmi/rmixl_intr.c
cvs rdiff -u -r1.1.2.3 -r1.1.2.4 src/sys/arch/mips/rmi/rmixl_spl.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_intr.c
diff -u src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.20 src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.21
--- src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.20 Fri May 21 23:35:42 2010
+++ src/sys/arch/mips/rmi/rmixl_intr.c Fri May 28 22:14:53 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_intr.c,v 1.1.2.20 2010/05/21 23:35:42 cliff Exp $ */
+/* $NetBSD: rmixl_intr.c,v 1.1.2.21 2010/05/28 22:14:53 cliff Exp $ */
/*-
* Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
@@ -64,7 +64,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.20 2010/05/21 23:35:42 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.21 2010/05/28 22:14:53 cliff Exp $);
#include opt_ddb.h
#define __INTR_PRIVATE
@@ -474,13 +474,11 @@
rmixl_intr_init_cpu(struct cpu_info *ci)
{
struct rmixl_cpu_softc *sc = (void *)ci-ci_softc;
+ extern void rmixl_spl_init_cpu(void);
+
KASSERT(sc != NULL);
- /* ack any pending in the EIRR, zeroing CAUSE[8..15] */
- uint64_t eirr;
- asm volatile(dmfc0 %0, $9, 6; : =r(eirr));
- eirr = ~0xff;
- asm volatile(dmtc0 %0, $9, 6; :: r(eirr));
+ rmixl_spl_init_cpu();
for (int vec=0; vec NINTRVECS; vec++)
evcnt_attach_dynamic(sc-sc_vec_evcnts[vec],
Index: src/sys/arch/mips/rmi/rmixl_spl.S
diff -u src/sys/arch/mips/rmi/rmixl_spl.S:1.1.2.3 src/sys/arch/mips/rmi/rmixl_spl.S:1.1.2.4
--- src/sys/arch/mips/rmi/rmixl_spl.S:1.1.2.3 Fri May 21 23:35:21 2010
+++ src/sys/arch/mips/rmi/rmixl_spl.S Fri May 28 22:14:53 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_spl.S,v 1.1.2.3 2010/05/21 23:35:21 cliff Exp $ */
+/* $NetBSD: rmixl_spl.S,v 1.1.2.4 2010/05/28 22:14:53 cliff Exp $ */
/*-
* Copyright (c) 2009, 2010 The NetBSD Foundation, Inc.
@@ -37,7 +37,7 @@
#include mips/asm.h
#include mips/cpuregs.h
-RCSID($NetBSD: rmixl_spl.S,v 1.1.2.3 2010/05/21 23:35:21 cliff Exp $);
+RCSID($NetBSD: rmixl_spl.S,v 1.1.2.4 2010/05/28 22:14:53 cliff Exp $);
#include assym.h
@@ -71,6 +71,29 @@
.dword 0 /* IPL_HIGH */
.text
+
+/*
+ * initialize cp0 interrupt control for this cpu
+ * - set STATUS[IE]
+ * - clear EIRR and EIMR
+ * on return, all interrupts are disabled by EIMR
+ *
+ * henceforth STATUS[IE] is expected to remain normally set
+ * but may be cleared and restored for temporary interrupt disablement
+ *
+ * call before the first call to spl0 on this cpu
+ */
+LEAF_NOPROFILE(rmixl_spl_init_cpu)
+ mfc0 t0, MIPS_COP_0_STATUS # get STATUS
+ ori t0, MIPS_SR_INT_IE # set IE
+ mtc0 zero, MIPS_COP_0_STATUS ## disable all ints in STATUS
+ dmtc0 zero, RMIXL_COP_0_EIMR ## EIMR
+ dmtc0 zero, RMIXL_COP_0_EIRR ## clear EIRR
+ mtc0 t0, MIPS_COP_0_STATUS ## set STATUS | IE
+ j ra
+ nop
+END(rmixl_spl_init_cpu)
+
/*
* RMIXL processor interrupt control
*
@@ -86,15 +109,10 @@
INT_L v0, CPU_INFO_CPL(a3) # get current IPL from cpu_info
sltu v1, a1, v0 # newipl curipl
bnez v1, 2f# yes, don't change.
- mfc0 a2, MIPS_COP_0_STATUS # load STATUS
- and a2, ~MIPS_INT_MASK # clear STATUS[IM]
- sll v1, a0, 8 # EIMR[7:0] to STATUS[15:8]
- and v1, MIPS_INT_MASK #
- or v1, a2# new STATUS value
- mtc0 zero, MIPS_COP_0_STATUS ## disable all ints in STATUS
+ nop
+ dmtc0 zero, RMIXL_COP_0_EIMR ## disable all interrupts
INT_S a1, CPU_INFO_CPL(a3) ## save IPL in cpu_info
dmtc0 a0, RMIXL_COP_0_EIMR ## set new EIMR
- mtc0 v1, MIPS_COP_0_STATUS ## set new STATUS
#ifdef PARANOIA
j ra
nop
@@ -118,22 +136,14 @@
99: beqz v0, 99b# loop forever if false
nop
#endif /* PARANOIA */
- #move a1, zero # avoid lookup on splx(IPL_NONE)
- #beq a0, zero, 1f # skip load
PTR_LA v1, _C_LABEL(ipl_eimr_map) # get address of table
sll a2, a0, MAP_SCALESHIFT # convert IPL to array offset
PTR_ADDU v1, a2# add to table addr
REG_L v1, (v1) # load EIMR bits for this IPL
1:
- dmfc0 a2, MIPS_COP_0_STATUS # load STATUS
- and a2, ~MIPS_INT_MASK # clear STATUS[IM]
- sll v0, v1, 8 # EIMR[7:0] to STATUS[15:8]
- and v0, MIPS_INT_MASK #
- or v0, a2# new STATUS value
dmtc0 zero, RMIXL_COP_0_EIMR ## disable all interrupts
- INT_S
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: cliff Date: Fri May 21 23:33:52 UTC 2010 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_com.c Log Message: - establish interrupt at IPL_VM (was IPL_SERIAL) To generate a diff of this commit: cvs rdiff -u -r1.1.2.13 -r1.1.2.14 src/sys/arch/mips/rmi/rmixl_com.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixl_com.c diff -u src/sys/arch/mips/rmi/rmixl_com.c:1.1.2.13 src/sys/arch/mips/rmi/rmixl_com.c:1.1.2.14 --- src/sys/arch/mips/rmi/rmixl_com.c:1.1.2.13 Tue May 18 19:51:43 2010 +++ src/sys/arch/mips/rmi/rmixl_com.c Fri May 21 23:33:52 2010 @@ -1,4 +1,4 @@ -/* $Id: rmixl_com.c,v 1.1.2.13 2010/05/18 19:51:43 cliff Exp $ */ +/* $Id: rmixl_com.c,v 1.1.2.14 2010/05/21 23:33:52 cliff Exp $ */ /*- * Copyright (c) 2006 Urbana-Champaign Independent Media Center. * Copyright (c) 2006 Garrett D'Amore. @@ -101,7 +101,7 @@ */ #include sys/cdefs.h -__KERNEL_RCSID(0, $NetBSD: rmixl_com.c,v 1.1.2.13 2010/05/18 19:51:43 cliff Exp $); +__KERNEL_RCSID(0, $NetBSD: rmixl_com.c,v 1.1.2.14 2010/05/21 23:33:52 cliff Exp $); #include sys/param.h #include sys/systm.h @@ -292,7 +292,7 @@ com_attach_subr(sc); rmixl_intr_establish(obio-obio_intr, obio-obio_tmsk, - IPL_SERIAL, RMIXL_TRIG_LEVEL, RMIXL_POLR_HIGH, + IPL_VM, RMIXL_TRIG_LEVEL, RMIXL_POLR_HIGH, comintr, sc, true); }
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Fri May 21 23:35:21 UTC 2010
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_spl.S
Log Message:
- turn off PARANOIA
- except for softintr irqs, ipl_eimr_map is no longer const;
all other irq bits are set/cleared at interrupt establish/disestablish
- add _splsw_splddb
- in _splsw_splintr, correct the return IPL_NONE case, and clarify some comments
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.2 -r1.1.2.3 src/sys/arch/mips/rmi/rmixl_spl.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_spl.S
diff -u src/sys/arch/mips/rmi/rmixl_spl.S:1.1.2.2 src/sys/arch/mips/rmi/rmixl_spl.S:1.1.2.3
--- src/sys/arch/mips/rmi/rmixl_spl.S:1.1.2.2 Wed Apr 14 01:23:15 2010
+++ src/sys/arch/mips/rmi/rmixl_spl.S Fri May 21 23:35:21 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_spl.S,v 1.1.2.2 2010/04/14 01:23:15 cliff Exp $ */
+/* $NetBSD: rmixl_spl.S,v 1.1.2.3 2010/05/21 23:35:21 cliff Exp $ */
/*-
* Copyright (c) 2009, 2010 The NetBSD Foundation, Inc.
@@ -37,14 +37,13 @@
#include mips/asm.h
#include mips/cpuregs.h
-RCSID($NetBSD: rmixl_spl.S,v 1.1.2.2 2010/04/14 01:23:15 cliff Exp $);
+RCSID($NetBSD: rmixl_spl.S,v 1.1.2.3 2010/05/21 23:35:21 cliff Exp $);
#include assym.h
-#define PARANOIA /* XXX TMP FIXME */
#define MAP_SCALESHIFT 3
-#define RMIXL_SOFT_INT_MASK_0 (MIPS_SOFT_INT_MASK_1 8)
+#define RMIXL_SOFT_INT_MASK_1 (MIPS_SOFT_INT_MASK_1 8)
#define RMIXL_SOFT_INT_MASK (MIPS_SOFT_INT_MASK 8)
#define RMIXL_INT_MASK_1 (MIPS_INT_MASK_1 8)
#define RMIXL_INT_MASK_5 (MIPS_INT_MASK_5 8)
@@ -55,20 +54,21 @@
/*
* Array of mask of bits to set in the EIMR when we go to a
* given hardware interrupt priority level.
+ * The softint bits in [IPL_NONE] and [IPL_SOFTCLOCK] should stay constant
+ * Hard intr bits are managed by rmixl_vec_establish and rmixl_vec_disestablish.
*/
- .rdata
+ .data
.globl _C_LABEL(ipl_eimr_map)
.type _C_LABEL(ipl_eimr_map),@object
.p2align MAP_SCALESHIFT
_C_LABEL(ipl_eimr_map):
- .dword ~0 /* IPL_NONE */
- .dword ~RMIXL_SOFT_INT_MASK_0 /* IPL_SOFT{CLOCK,BIO} */
- .dword ~RMIXL_SOFT_INT_MASK /* IPL_SOFT{NET,SERIAL} */
- .dword RMIXL_INT_MASK_5 /* IPL_VM */
+ .dword RMIXL_SOFT_INT_MASK /* IPL_NONE */
+ .dword RMIXL_SOFT_INT_MASK_1 /* IPL_SOFT{CLOCK,BIO} */
+ .dword 0 /* IPL_SOFT{NET,SERIAL} */
+ .dword 0 /* IPL_VM */
.dword 0 /* IPL_SCHED */
-#if IPL_SCHED != IPL_HIGH
+ .dword 0 /* IPL_DDB */
.dword 0 /* IPL_HIGH */
-#endif
.text
/*
@@ -252,6 +252,13 @@
nop
END(_splsw_splhigh)
+STATIC_LEAF(_splsw_splddb)
+ REG_L a0, _C_LABEL(ipl_eimr_map) + 8*IPL_DDB
+ li a1, IPL_DDB
+ b _splraise
+ nop
+END(_splsw_splddb)
+
STATIC_LEAF(_splsw_splsched)
REG_L a0, _C_LABEL(ipl_eimr_map) + 8*IPL_SCHED
li a1, IPL_SCHED
@@ -297,29 +304,25 @@
STATIC_LEAF(_splsw_splintr)
dmfc0 ta1, RMIXL_COP_0_EIRR # get active interrupts
# restrict to hard int bits:
- and v1, ta1, RMIXL_SOFT_INT_MASK # v1 = ~RMIXL_SOFT_INT_MASK
- xor v1, ta1#
+ and v1, ta1, RMIXL_SOFT_INT_MASK # v1 = ta1 ~RMIXL_SOFT_INT_MASK
+ xor v1, ta1#
- li v0, IPL_NONE # return IPL_NONE ...
- beq v1, zero, 2f # ... if nothing pending
- nop
-
- li v0, IPL_VM # start at IPL_VM
+ li v0, IPL_NONE
PTR_LA ta3, _C_LABEL(ipl_eimr_map) + 8*IPL_VM
REG_L ta2, -8(ta3) # load 'enabled' bits for IPL_SOFTSERIAL
- # ta2 has 'enabled' ints
and v1, ta2# apply to pending bits
+ beq v1, zero, 4f # if nothing pending...
+ nop # ... return IPL_NONE
+ li v0, IPL_VM # ipl=IPL_VM
1:
- REG_L ta2, (ta3) # load 'enabled' bits for ipl in v0
+ REG_L ta2, (ta3) # load 'enabled' bits for ipl
and ta2, v1# any match to pending intrs?
beq ta2, zero, 2f # no, return ipl
-
- PTR_ADDU ta3, 1 MAP_SCALESHIFT # point to next entry
- addiu v0, 1# increase ipl by 1
- move v1, ta2# reduce down pending intrs
- b 1b# and check them
- nop
+ PTR_ADDI ta3, 1 MAP_SCALESHIFT # point to next entry
+ addiu v0, 1# ipl++
+ move v1, ta2# update highest pending
+ b 1b# loop
2:
/*
@@ -329,8 +332,7 @@
* the RMI evbmips_iointr function will sort through
* individial EIRR requests
*/
- beq v1, zero, 4f # skip ahead if nothing pending
- li t2, RMIXL_INT_MASK_5 # load RMIXL_INT_MASK_5
+ li t2, RMIXL_INT_MASK_5 # load RMIXL_INT_MASK_5
and t1, v1, t2 # save count/compare intr request value
nor t0, zero, t2 # invert the mask
and v1, t0# v1 = ~RMIXL_INT_MASK_5
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Fri May 21 23:35:42 UTC 2010
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_intr.c rmixl_intr.h
Log Message:
- rename IRT based interrupts to pic int ...
- rename rmixl_vecnames_common to vec ...
- move ipl_eimr_map table print into rmixl_ipl_eimr_map_print()
- consolidate debug print funcs at the end of the file
- 'irq' -- being somewhat ambiguous -- renamed to 'irt' throughout
to reflect use as IRT index
- IRT-based interrupts are moved to EIRR/EIMR vectors (bits) 32..63
to avoid all opverlap with EIRR/EIMR bits 0..7 which are CAUSE[8..15].
To date this has been a non-issue since we aren't using the
watchdog or timers there. non-IRT interrupts (FMN and IPI) are moved
to unused portion vectors 8, 9
- in rmixl_intr_init_cpu, instead of writing 0 to EIRR, ack with bits read
(excluding CAUSE[8..15] bits) as defense against possible stale
interrupts inherited from firmware (paranoid -- we aren't seeing any).
- rmixl_irt_establish gets a 'vec' arg for use in IRTENTRYC1 reg
(no longer assume vec = irt)
- set/clear irq bits in ipl_eimr_map[] during interrupt establish/disestablish
- in evbmips_iointr(), mask off ints enabled at higher ipl; we only
dispatch interrupts at highest enabling ipl.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.19 -r1.1.2.20 src/sys/arch/mips/rmi/rmixl_intr.c
cvs rdiff -u -r1.1.2.3 -r1.1.2.4 src/sys/arch/mips/rmi/rmixl_intr.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_intr.c
diff -u src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.19 src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.20
--- src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.19 Thu May 6 20:48:39 2010
+++ src/sys/arch/mips/rmi/rmixl_intr.c Fri May 21 23:35:42 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_intr.c,v 1.1.2.19 2010/05/06 20:48:39 cliff Exp $ */
+/* $NetBSD: rmixl_intr.c,v 1.1.2.20 2010/05/21 23:35:42 cliff Exp $ */
/*-
* Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
@@ -64,7 +64,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.19 2010/05/06 20:48:39 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.20 2010/05/21 23:35:42 cliff Exp $);
#include opt_ddb.h
#define __INTR_PRIVATE
@@ -116,7 +116,7 @@
/*
* IRT assignments depends on the RMI chip family
* (XLS1xx vs. XLS2xx vs. XLS3xx vs. XLS6xx)
- * use the right irq (and display string table) for the CPU that's running.
+ * use the right display string table for the CPU that's running.
*/
/*
@@ -124,38 +124,38 @@
* - use for XLRxxx
*/
static const char * const rmixl_irtnames_xlrxxx[NIRTS] = {
- int 0 (watchdog), /* 0 */
- int 1 (timer0), /* 1 */
- int 2 (timer1), /* 2 */
- int 3 (timer2), /* 3 */
- int 4 (timer3), /* 4 */
- int 5 (timer4), /* 5 */
- int 6 (timer5), /* 6 */
- int 7 (timer6), /* 7 */
- int 8 (timer7), /* 8 */
- int 9 (uart0), /* 9 */
- int 10 (uart1), /* 10 */
- int 11 (i2c0), /* 11 */
- int 12 (i2c1), /* 12 */
- int 13 (pcmcia), /* 13 */
- int 14 (gpio), /* 14 */
- int 15 (hyper), /* 15 */
- int 16 (pcix), /* 16 */
- int 17 (gmac0), /* 17 */
- int 18 (gmac1), /* 18 */
- int 19 (gmac2), /* 19 */
- int 20 (gmac3), /* 20 */
- int 21 (xgs0), /* 21 */
- int 22 (xgs1), /* 22 */
- int 23 (irq23), /* 23 */
- int 24 (hyper_fatal), /* 24 */
- int 25 (bridge_aerr), /* 25 */
- int 26 (bridge_berr), /* 26 */
- int 27 (bridge_tb), /* 27 */
- int 28 (bridge_nmi), /* 28 */
- int 29 (bridge_sram_derr), /* 29 */
- int 30 (gpio_fatal), /* 30 */
- int 31 (reserved), /* 31 */
+ pic int 0 (watchdog), /* 0 */
+ pic int 1 (timer0), /* 1 */
+ pic int 2 (timer1), /* 2 */
+ pic int 3 (timer2), /* 3 */
+ pic int 4 (timer3), /* 4 */
+ pic int 5 (timer4), /* 5 */
+ pic int 6 (timer5), /* 6 */
+ pic int 7 (timer6), /* 7 */
+ pic int 8 (timer7), /* 8 */
+ pic int 9 (uart0), /* 9 */
+ pic int 10 (uart1), /* 10 */
+ pic int 11 (i2c0), /* 11 */
+ pic int 12 (i2c1), /* 12 */
+ pic int 13 (pcmcia), /* 13 */
+ pic int 14 (gpio), /* 14 */
+ pic int 15 (hyper), /* 15 */
+ pic int 16 (pcix), /* 16 */
+ pic int 17 (gmac0), /* 17 */
+ pic int 18 (gmac1), /* 18 */
+ pic int 19 (gmac2), /* 19 */
+ pic int 20 (gmac3), /* 20 */
+ pic int 21 (xgs0), /* 21 */
+ pic int 22 (xgs1), /* 22 */
+ pic int 23 (irq23), /* 23 */
+ pic int 24 (hyper_fatal), /* 24 */
+ pic int 25 (bridge_aerr), /* 25 */
+ pic int 26 (bridge_berr), /* 26 */
+ pic int 27 (bridge_tb), /* 27 */
+ pic int 28 (bridge_nmi), /* 28 */
+ pic int 29 (bridge_sram_derr),/* 29 */
+ pic int 30 (gpio_fatal), /* 30 */
+ pic int 31 (reserved), /* 31 */
};
/*
@@ -163,38 +163,38 @@
* - use for XLS2xx
*/
static const char * const rmixl_irtnames_xls2xx[NIRTS] = {
- int 0 (watchdog), /* 0 */
- int 1 (timer0), /* 1 */
- int 2 (timer1), /* 2 */
- int 3 (timer2), /* 3 */
- int 4 (timer3), /* 4 */
- int 5 (timer4),
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: matt
Date: Sat May 8 18:08:35 UTC 2010
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_pcie.c
Log Message:
Rework the way interrupts are decided on. Don't use pa_bus since that's
arbitrary. Instead grab the device from pa_intrtag since that corresponds
to the PCIe bus we are actually attached to.
While I'm here, compact some switch statements into a few simple assignments.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.13 -r1.1.2.14 src/sys/arch/mips/rmi/rmixl_pcie.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_pcie.c
diff -u src/sys/arch/mips/rmi/rmixl_pcie.c:1.1.2.13 src/sys/arch/mips/rmi/rmixl_pcie.c:1.1.2.14
--- src/sys/arch/mips/rmi/rmixl_pcie.c:1.1.2.13 Thu May 6 20:48:39 2010
+++ src/sys/arch/mips/rmi/rmixl_pcie.c Sat May 8 18:08:34 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_pcie.c,v 1.1.2.13 2010/05/06 20:48:39 cliff Exp $ */
+/* $NetBSD: rmixl_pcie.c,v 1.1.2.14 2010/05/08 18:08:34 matt Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -40,7 +40,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_pcie.c,v 1.1.2.13 2010/05/06 20:48:39 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_pcie.c,v 1.1.2.14 2010/05/08 18:08:34 matt Exp $);
#include opt_pci.h
#include pci.h
@@ -1014,9 +1014,18 @@
int
rmixl_pcie_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *pih)
{
+ int device;
u_int link;
u_int irq;
+ /*
+ * The bus is unimportant since it can change depending on the
+ * configuration. We are tied to device # of PCIe bridge we are
+ * ultimately attached to.
+ */
+ pci_decompose_tag(pa-pa_pc, pa-pa_intrtag,
+ NULL, device, NULL);
+
#ifdef DEBUG
DPRINTF((%s: ps_bus %d, pa_intrswiz %#x, pa_intrtag %#lx,
pa_intrpin %d, pa_intrline %d, pa_rawintrpin %d\n,
@@ -1032,71 +1041,32 @@
case MIPS_XLS108:
case MIPS_XLS404LITE:
case MIPS_XLS408LITE:
- switch (pa-pa_bus) {
- case 1:
- link = 0;
- irq = 26;
- break;
- case 2:
- link = 1;
- irq = 27;
- break;
- default:
- panic(%s: bad bus %d\n, __func__, pa-pa_bus);
- }
+ if (device 1)
+ panic(%s: bad bus %d, __func__, device);
+ link = device;
+ irq = device + 26;
break;
case MIPS_XLS204:
- case MIPS_XLS208:
- switch (pa-pa_bus) {
- case 1:
- link = 0;
- irq = 26;
- break;
- case 2:
- link = 1;
- irq = 27;
- break;
- case 3:
- link = 2;
- irq = 23;
- break;
- case 4:
- link = 3;
- irq = 24;
- break;
- default:
- panic(%s: bad bus %d\n, __func__, pa-pa_bus);
- }
+ case MIPS_XLS208: {
+ if (device 3)
+ panic(%s: bad bus %d, __func__, device);
+ link = device;
+ irq = device + (device 2 ? 21 : 26);
break;
+ }
case MIPS_XLS404:
case MIPS_XLS408:
case MIPS_XLS416:
case MIPS_XLS608:
case MIPS_XLS616:
- switch (pa-pa_bus) {
- case 1:
- link = 0;
- irq = 26;
- break;
- case 2:
- link = 1;
- irq = 27;
- break;
- case 3:
- link = 2;
- irq = 28;
- break;
- case 4:
- link = 3;
- irq = 29;
- break;
- default:
- panic(%s: bad bus %d\n, __func__, pa-pa_bus);
- }
+ if (device 3)
+ panic(%s: bad bus %d, __func__, device);
+ link = device;
+ irq = device + 26;
break;
default:
panic(%s: cpu IMPL %#x not supported\n,
- __func__, MIPS_PRID_IMPL(mips_options.mips_cpu_id));
+ __func__, MIPS_PRID_IMPL(mips_options.mips_cpu_id));
}
if (pa-pa_intrpin != PCI_INTERRUPT_PIN_NONE)
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Thu May 6 20:48:39 UTC 2010
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_intr.c rmixl_pcie.c
Log Message:
fix pcie IRQ assignments for XLS2xx
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.18 -r1.1.2.19 src/sys/arch/mips/rmi/rmixl_intr.c
cvs rdiff -u -r1.1.2.12 -r1.1.2.13 src/sys/arch/mips/rmi/rmixl_pcie.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_intr.c
diff -u src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.18 src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.19
--- src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.18 Sat May 1 06:13:34 2010
+++ src/sys/arch/mips/rmi/rmixl_intr.c Thu May 6 20:48:39 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_intr.c,v 1.1.2.18 2010/05/01 06:13:34 cliff Exp $ */
+/* $NetBSD: rmixl_intr.c,v 1.1.2.19 2010/05/06 20:48:39 cliff Exp $ */
/*-
* Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
@@ -64,7 +64,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.18 2010/05/01 06:13:34 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.19 2010/05/06 20:48:39 cliff Exp $);
#include opt_ddb.h
#define __INTR_PRIVATE
@@ -159,8 +159,47 @@
};
/*
+ * rmixl_irtnames_xls2xx
+ * - use for XLS2xx
+ */
+static const char * const rmixl_irtnames_xls2xx[NIRTS] = {
+ int 0 (watchdog), /* 0 */
+ int 1 (timer0), /* 1 */
+ int 2 (timer1), /* 2 */
+ int 3 (timer2), /* 3 */
+ int 4 (timer3), /* 4 */
+ int 5 (timer4), /* 5 */
+ int 6 (timer5), /* 6 */
+ int 7 (timer6), /* 7 */
+ int 8 (timer7), /* 8 */
+ int 9 (uart0), /* 9 */
+ int 10 (uart1), /* 10 */
+ int 11 (i2c0), /* 11 */
+ int 12 (i2c1), /* 12 */
+ int 13 (pcmcia), /* 13 */
+ int 14 (gpio_a), /* 14 */
+ int 15 (irq15), /* 15 */
+ int 16 (bridge_tb), /* 16 */
+ int 17 (gmac0), /* 17 */
+ int 18 (gmac1), /* 18 */
+ int 19 (gmac2), /* 19 */
+ int 20 (gmac3), /* 20 */
+ int 21 (irq21), /* 21 */
+ int 22 (irq22), /* 22 */
+ int 23 (pcie_link2), /* 23 */
+ int 24 (pcie_link3), /* 24 */
+ int 25 (bridge_err), /* 25 */
+ int 26 (pcie_link0), /* 26 */
+ int 27 (pcie_link1), /* 27 */
+ int 28 (irq28), /* 28 */
+ int 29 (pcie_err), /* 29 */
+ int 30 (gpio_b), /* 30 */
+ int 31 (usb), /* 31 */
+};
+
+/*
* rmixl_irtnames_xls1xx
- * - use for XLS1xx, XLS2xx, XLS4xx-Lite
+ * - use for XLS1xx, XLS4xx-Lite
*/
static const char * const rmixl_irtnames_xls1xx[NIRTS] = {
int 0 (watchdog), /* 0 */
@@ -517,12 +556,14 @@
switch (MIPS_PRID_IMPL(mips_options.mips_cpu_id)) {
case MIPS_XLS104:
case MIPS_XLS108:
- case MIPS_XLS204:
- case MIPS_XLS208:
case MIPS_XLS404LITE:
case MIPS_XLS408LITE:
name = rmixl_irtnames_xls1xx[irq];
break;
+ case MIPS_XLS204:
+ case MIPS_XLS208:
+ name = rmixl_irtnames_xls2xx[irq];
+ break;
case MIPS_XLS404:
case MIPS_XLS408:
case MIPS_XLS416:
Index: src/sys/arch/mips/rmi/rmixl_pcie.c
diff -u src/sys/arch/mips/rmi/rmixl_pcie.c:1.1.2.12 src/sys/arch/mips/rmi/rmixl_pcie.c:1.1.2.13
--- src/sys/arch/mips/rmi/rmixl_pcie.c:1.1.2.12 Mon Apr 12 22:42:06 2010
+++ src/sys/arch/mips/rmi/rmixl_pcie.c Thu May 6 20:48:39 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_pcie.c,v 1.1.2.12 2010/04/12 22:42:06 cliff Exp $ */
+/* $NetBSD: rmixl_pcie.c,v 1.1.2.13 2010/05/06 20:48:39 cliff Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -40,7 +40,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_pcie.c,v 1.1.2.12 2010/04/12 22:42:06 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_pcie.c,v 1.1.2.13 2010/05/06 20:48:39 cliff Exp $);
#include opt_pci.h
#include pci.h
@@ -1030,8 +1030,6 @@
switch (MIPS_PRID_IMPL(mips_options.mips_cpu_id)) {
case MIPS_XLS104:
case MIPS_XLS108:
- case MIPS_XLS204:
- case MIPS_XLS208:
case MIPS_XLS404LITE:
case MIPS_XLS408LITE:
switch (pa-pa_bus) {
@@ -1047,6 +1045,29 @@
panic(%s: bad bus %d\n, __func__, pa-pa_bus);
}
break;
+ case MIPS_XLS204:
+ case MIPS_XLS208:
+ switch (pa-pa_bus) {
+ case 1:
+ link = 0;
+ irq = 26;
+ break;
+ case 2:
+ link = 1;
+ irq = 27;
+ break;
+ case 3:
+ link = 2;
+ irq = 23;
+ break;
+ case 4:
+ link = 3;
+ irq = 24;
+ break;
+ default:
+ panic(%s: bad bus %d\n, __func__, pa-pa_bus);
+ }
+ break;
case MIPS_XLS404:
case MIPS_XLS408:
case MIPS_XLS416:
@@ -1097,8 +1118,6 @@
switch (MIPS_PRID_IMPL(mips_options.mips_cpu_id)) {
case MIPS_XLS104:
case MIPS_XLS108:
- case MIPS_XLS204:
- case MIPS_XLS208:
case MIPS_XLS404LITE:
case MIPS_XLS408LITE:
switch (irq) {
@@ -1108,6 +1127,17 @@
break;
}
break;
+ case MIPS_XLS204:
+ case MIPS_XLS208:
+ switch (irq) {
+ case 23:
+ case 24:
+ case 26:
+ case 27:
+ name = rmixl_intr_string(irq);
+ break;
+ }
+ break;
case MIPS_XLS404:
case MIPS_XLS408:
case MIPS_XLS416:
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: cliff Date: Sat May 1 06:10:04 UTC 2010 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_cpu.c Log Message: remove some development debug prints, in cpu_setup_trampoline_common() and cpu_setup_trampoline_callback() To generate a diff of this commit: cvs rdiff -u -r1.1.2.10 -r1.1.2.11 src/sys/arch/mips/rmi/rmixl_cpu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixl_cpu.c diff -u src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.10 src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.11 --- src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.10 Fri Apr 16 23:50:30 2010 +++ src/sys/arch/mips/rmi/rmixl_cpu.c Sat May 1 06:10:04 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: rmixl_cpu.c,v 1.1.2.10 2010/04/16 23:50:30 cliff Exp $ */ +/* $NetBSD: rmixl_cpu.c,v 1.1.2.11 2010/05/01 06:10:04 cliff Exp $ */ /* * Copyright 2002 Wasabi Systems, Inc. @@ -38,7 +38,7 @@ #include locators.h #include sys/cdefs.h -__KERNEL_RCSID(0, $NetBSD: rmixl_cpu.c,v 1.1.2.10 2010/04/16 23:50:30 cliff Exp $); +__KERNEL_RCSID(0, $NetBSD: rmixl_cpu.c,v 1.1.2.11 2010/05/01 06:10:04 cliff Exp $); #include sys/param.h #include sys/device.h @@ -298,11 +298,6 @@ ta-ta_lwp = (uint64_t)(intptr_t)l; ta-ta_cpuinfo = (uint64_t)(intptr_t)ci; -#ifdef DEBUG - printf(%s: sp %#PRIx64, lwp %#PRIx64, ci %#PRIx64\n, - __func__, ta-ta_sp, ta-ta_lwp, ta-ta_cpuinfo); -#endif - return 0; } @@ -323,11 +318,6 @@ (rmixl_configuration.rc_psb_info.wakeup 0x); #endif -#ifdef DEBUG - printf(%s:%d: %p, %#PRIx64\n, __func__, __LINE__, - ta, (uint64_t)1 ci-ci_cpuid); -#endif - rmixlfw_wakeup_cpu(rmixl_cpu_trampoline, (void *)ta, (uint64_t)1 ci-ci_cpuid, wakeup_cpu); }
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Sat May 1 06:13:34 UTC 2010
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_intr.c
Log Message:
in evbmips_iointr() for RMI, where we ack the EIRR,
replace (relatively expensive) splhigh()/splx()
protection with (more efficient) EIMR-based disable/restore.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.17 -r1.1.2.18 src/sys/arch/mips/rmi/rmixl_intr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_intr.c
diff -u src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.17 src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.18
--- src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.17 Mon Apr 12 22:40:55 2010
+++ src/sys/arch/mips/rmi/rmixl_intr.c Sat May 1 06:13:34 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_intr.c,v 1.1.2.17 2010/04/12 22:40:55 cliff Exp $ */
+/* $NetBSD: rmixl_intr.c,v 1.1.2.18 2010/05/01 06:13:34 cliff Exp $ */
/*-
* Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
@@ -64,7 +64,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.17 2010/04/12 22:40:55 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.18 2010/05/01 06:13:34 cliff Exp $);
#include opt_ddb.h
#define __INTR_PRIVATE
@@ -813,13 +813,13 @@
for (;;) {
rmixl_intrhand_t *ih;
uint64_t eirr;
+ uint64_t eimr;
uint64_t vecbit;
int vec;
asm volatile(dmfc0 %0, $9, 6; : =r(eirr));
#ifdef IOINTR_DEBUG
- uint64_t eimr;
asm volatile(dmfc0 %0, $9, 7; : =r(eimr));
printf(%s: eirr %#PRIx64, eimr %#PRIx64, mask %#PRIx64\n,
__func__, eirr, eimr, ipl_eimr_map[ipl-1]);
@@ -833,14 +833,16 @@
vec = 63 - dclz(eirr);
ih = rmixl_intrhand[vec];
- int s = splhigh();
+ asm volatile(dmfc0 %0, $9, 7; : =r(eimr));
+ asm volatile(dmtc0 $0, $9, 7;);
vecbit = 1ULL vec;
+ KASSERT ((vecbit eimr) == 0);
KASSERT ((vecbit RMIXL_EIRR_PRESERVE_MASK) == 0);
asm volatile(dmfc0 %0, $9, 6; : =r(eirr));
eirr = RMIXL_EIRR_PRESERVE_MASK;
eirr |= vecbit;
asm volatile(dmtc0 %0, $9, 6; :: r(eirr));
- splx(s);
+ asm volatile(dmtc0 %0, $9, 7; :: r(eimr));
if (vec 32)
RMIXL_PICREG_WRITE(RMIXL_PIC_INTRACK,
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: cliff Date: Sat May 1 17:41:49 UTC 2010 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixlreg.h Log Message: correct offset for RMIXL_FMN_BS_SGMII_FCB1 To generate a diff of this commit: cvs rdiff -u -r1.1.2.11 -r1.1.2.12 src/sys/arch/mips/rmi/rmixlreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixlreg.h diff -u src/sys/arch/mips/rmi/rmixlreg.h:1.1.2.11 src/sys/arch/mips/rmi/rmixlreg.h:1.1.2.12 --- src/sys/arch/mips/rmi/rmixlreg.h:1.1.2.11 Wed Apr 7 19:23:50 2010 +++ src/sys/arch/mips/rmi/rmixlreg.h Sat May 1 17:41:49 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: rmixlreg.h,v 1.1.2.11 2010/04/07 19:23:50 cliff Exp $ */ +/* $NetBSD: rmixlreg.h,v 1.1.2.12 2010/05/01 17:41:49 cliff Exp $ */ /*- * Copyright (c) 2009 The NetBSD Foundation, Inc. @@ -932,7 +932,7 @@ #define RMIXL_FMN_BS_SGMII_TX2 _RMIXL_OFFSET(0x324) #define RMIXL_FMN_BS_SGMII_TX3 _RMIXL_OFFSET(0x325) #define RMIXL_FMN_BS_SGMII_UNUSED1 _RMIXL_OFFSET(0x326) /* initialize as 0 */ -#define RMIXL_FMN_BS_SGMII_FCB1 _RMIXL_OFFSET(0x321) /* Free Credit Bucket1 size */ +#define RMIXL_FMN_BS_SGMII_FCB1 _RMIXL_OFFSET(0x327) /* Free Credit Bucket1 size */ /* * SAE bucket size regs
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Sat Apr 17 07:33:33 UTC 2010
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_obio.c rmixlvar.h
Log Message:
- struct rmixl_config field 'rc_64bit_dmat' is now a bus_dma_tag_t
and initially points at 'rc_dma_tag' which provides the store area.
this allows rc_64bit_dmat to be subregioned for imposing
bounce-buffering if needed.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.15 -r1.1.2.16 src/sys/arch/mips/rmi/rmixl_obio.c
cvs rdiff -u -r1.1.2.17 -r1.1.2.18 src/sys/arch/mips/rmi/rmixlvar.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_obio.c
diff -u src/sys/arch/mips/rmi/rmixl_obio.c:1.1.2.15 src/sys/arch/mips/rmi/rmixl_obio.c:1.1.2.16
--- src/sys/arch/mips/rmi/rmixl_obio.c:1.1.2.15 Mon Apr 12 22:42:06 2010
+++ src/sys/arch/mips/rmi/rmixl_obio.c Sat Apr 17 07:33:33 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_obio.c,v 1.1.2.15 2010/04/12 22:42:06 cliff Exp $ */
+/* $NetBSD: rmixl_obio.c,v 1.1.2.16 2010/04/17 07:33:33 cliff Exp $ */
/*
* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
@@ -40,7 +40,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_obio.c,v 1.1.2.15 2010/04/12 22:42:06 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_obio.c,v 1.1.2.16 2010/04/17 07:33:33 cliff Exp $);
#include locators.h
#include pci.h
@@ -186,12 +186,13 @@
rmixl_obio_el_bus_mem_init(rcp-rc_obio_el_memt, rcp);
/* dma space for all memory, including = 4GB */
- if (rcp-rc_64bit_dmat._cookie == 0)
- obio_dma_init_64(rcp-rc_64bit_dmat);
+ if (rcp-rc_dma_tag._cookie == 0)
+ obio_dma_init_64(rcp-rc_dma_tag);
+ rcp-rc_64bit_dmat = rcp-rc_dma_tag;
/* dma space for addr 4GB */
if (rcp-rc_32bit_dmat == NULL) {
- error = bus_dmatag_subregion(rcp-rc_64bit_dmat,
+ error = bus_dmatag_subregion(rcp-rc_64bit_dmat,
0, (bus_addr_t)1 32, rcp-rc_32bit_dmat, 0);
if (error)
panic(%s: failed to create 32bit dma tag: %d,
@@ -213,7 +214,7 @@
sc-sc_el_bst = (bus_space_tag_t)rcp-rc_obio_el_memt;
sc-sc_29bit_dmat = rcp-rc_29bit_dmat;
sc-sc_32bit_dmat = rcp-rc_32bit_dmat;
- sc-sc_64bit_dmat = rcp-rc_64bit_dmat;
+ sc-sc_64bit_dmat = rcp-rc_64bit_dmat;
}
static void
Index: src/sys/arch/mips/rmi/rmixlvar.h
diff -u src/sys/arch/mips/rmi/rmixlvar.h:1.1.2.17 src/sys/arch/mips/rmi/rmixlvar.h:1.1.2.18
--- src/sys/arch/mips/rmi/rmixlvar.h:1.1.2.17 Wed Apr 7 19:24:13 2010
+++ src/sys/arch/mips/rmi/rmixlvar.h Sat Apr 17 07:33:33 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixlvar.h,v 1.1.2.17 2010/04/07 19:24:13 cliff Exp $ */
+/* $NetBSD: rmixlvar.h,v 1.1.2.18 2010/04/17 07:33:33 cliff Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -124,7 +124,8 @@
struct mips_bus_space rc_pci_ecfg_memt; /* PCI ECFG */
struct mips_bus_space rc_pci_memt; /* PCI MEM */
struct mips_bus_space rc_pci_iot; /* PCI IO */
- struct mips_bus_dma_tag rc_64bit_dmat;
+ struct mips_bus_dma_tag rc_dma_tag;
+ bus_dma_tag_t rc_64bit_dmat;
bus_dma_tag_t rc_32bit_dmat;
bus_dma_tag_t rc_29bit_dmat;
struct extent *rc_phys_ex; /* Note: MB units */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Sat Apr 17 07:34:08 UTC 2010
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_pcix.c
Log Message:
- in rmixl_pcix_attach() use bus_dmatag_subregion() to set up
bounce buffering for non-DMA-accessible RAM addrs
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.4 -r1.1.2.5 src/sys/arch/mips/rmi/rmixl_pcix.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_pcix.c
diff -u src/sys/arch/mips/rmi/rmixl_pcix.c:1.1.2.4 src/sys/arch/mips/rmi/rmixl_pcix.c:1.1.2.5
--- src/sys/arch/mips/rmi/rmixl_pcix.c:1.1.2.4 Fri Apr 16 23:44:17 2010
+++ src/sys/arch/mips/rmi/rmixl_pcix.c Sat Apr 17 07:34:08 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_pcix.c,v 1.1.2.4 2010/04/16 23:44:17 cliff Exp $ */
+/* $NetBSD: rmixl_pcix.c,v 1.1.2.5 2010/04/17 07:34:08 cliff Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -40,7 +40,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_pcix.c,v 1.1.2.4 2010/04/16 23:44:17 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_pcix.c,v 1.1.2.5 2010/04/17 07:34:08 cliff Exp $);
#include opt_pci.h
#include pci.h
@@ -351,6 +351,8 @@
hbar_size |= (uint64_t)hbar_size_hi 32;
}
if ((hbar_addr != 0) || (hbar_size mem_cluster_maxaddr)) {
+ int error;
+
aprint_error_dev(self, HostBAR0 addr %#x, size %#x\n,
hbar_addr_lo, hbar_size_lo);
if ((hbar_size_lo PCI_MAPREG_MEM_TYPE_64BIT) != 0)
@@ -361,12 +363,24 @@
enabling DMA bounce buffers\n,
hbar_size, mem_cluster_maxaddr-1);
- /* force use of bouce buffers for uncovered RAM */
+ /*
+ * force use of bouce buffers for inaccessible RAM addrs
+ */
if (hbar_size ((uint64_t)1 32)) {
+ error = bus_dmatag_subregion(sc-sc_32bit_dmat,
+0, (bus_addr_t)hbar_size, sc-sc_32bit_dmat,
+BUS_DMA_NOWAIT);
+ if (error)
+panic(%s: failed to subregion 32-bit dma tag:
+ error %d, __func__, error);
sc-sc_64bit_dmat = NULL;
- sc-sc_32bit_dmat-_bounce_alloc_hi = hbar_size;
} else {
- sc-sc_64bit_dmat-_bounce_alloc_hi = hbar_size;
+ error = bus_dmatag_subregion(sc-sc_64bit_dmat,
+0, (bus_addr_t)hbar_size, sc-sc_64bit_dmat,
+BUS_DMA_NOWAIT);
+ if (error)
+panic(%s: failed to subregion 64-bit dma tag:
+ error %d, __func__, error);
}
}
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Fri Apr 16 23:44:18 UTC 2010
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_pcix.c
Log Message:
- in attach, if Host BAR does not cover all RAM, instead of panic,
complain a lot, and force use of DMA bounce buffers
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.3 -r1.1.2.4 src/sys/arch/mips/rmi/rmixl_pcix.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_pcix.c
diff -u src/sys/arch/mips/rmi/rmixl_pcix.c:1.1.2.3 src/sys/arch/mips/rmi/rmixl_pcix.c:1.1.2.4
--- src/sys/arch/mips/rmi/rmixl_pcix.c:1.1.2.3 Mon Apr 12 22:42:07 2010
+++ src/sys/arch/mips/rmi/rmixl_pcix.c Fri Apr 16 23:44:17 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_pcix.c,v 1.1.2.3 2010/04/12 22:42:07 cliff Exp $ */
+/* $NetBSD: rmixl_pcix.c,v 1.1.2.4 2010/04/16 23:44:17 cliff Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -40,7 +40,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_pcix.c,v 1.1.2.3 2010/04/12 22:42:07 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_pcix.c,v 1.1.2.4 2010/04/16 23:44:17 cliff Exp $);
#include opt_pci.h
#include pci.h
@@ -316,7 +316,7 @@
sc-sc_64bit_dmat = obio-obio_64bit_dmat;
sc-sc_tmsk = obio-obio_tmsk;
- aprint_normal( RMI XLR PCI-X Interface\n);
+ aprint_normal(: RMI XLR PCI-X Interface\n);
rmixl_pcix_intcfg(sc);
@@ -351,13 +351,23 @@
hbar_size |= (uint64_t)hbar_size_hi 32;
}
if ((hbar_addr != 0) || (hbar_size mem_cluster_maxaddr)) {
- printf(%s: HostBAR0 addr %#x, size %#x\n,
- device_xname(self), hbar_addr_lo, hbar_size_lo);
+ aprint_error_dev(self, HostBAR0 addr %#x, size %#x\n,
+ hbar_addr_lo, hbar_size_lo);
if ((hbar_size_lo PCI_MAPREG_MEM_TYPE_64BIT) != 0)
- printf(%s: HostBAR1 addr %#x, size %#x\n,
-device_xname(self), hbar_addr_hi, hbar_size_hi);
- panic(PCI-X Host BAR does not cover RAM range 0..%#PRIx64,
- mem_cluster_maxaddr);
+ aprint_error_dev(self, HostBAR1 addr %#x, size %#x\n,
+hbar_addr_hi, hbar_size_hi);
+ aprint_error_dev(self, WARNING: firmware PCI-X setup error:
+ RAM %#PRIx64..%#PRIx64 not accessible by Host BAR,
+ enabling DMA bounce buffers\n,
+ hbar_size, mem_cluster_maxaddr-1);
+
+ /* force use of bouce buffers for uncovered RAM */
+ if (hbar_size ((uint64_t)1 32)) {
+ sc-sc_64bit_dmat = NULL;
+ sc-sc_32bit_dmat-_bounce_alloc_hi = hbar_size;
+ } else {
+ sc-sc_64bit_dmat-_bounce_alloc_hi = hbar_size;
+ }
}
/*
@@ -531,8 +541,7 @@
*/
struct rmixl_config *rcp = rmixl_configuration;
- aprint_normal(%s: configuring PCI bus\n,
- device_xname(sc-sc_dev));
+ aprint_normal_dev(sc-sc_dev, %s: configuring PCI bus\n);
ioext = extent_create(pciio,
rcp-rc_pci_io_pbase,
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Fri Apr 16 23:50:30 UTC 2010
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_cpu.c
Log Message:
- remove cpu_setup_trampoline_fmn()
- remove cpu_setup_trampoline_ipi()
- cpu_setup_trampoline_common() provides wakeup-method independent function,
used only by cpu_setup_trampoline_callback() for now
- PSB_TYPE_DELL firmware works with cpu_setup_trampoline_callback()
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.9 -r1.1.2.10 src/sys/arch/mips/rmi/rmixl_cpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_cpu.c
diff -u src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.9 src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.10
--- src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.9 Mon Mar 29 23:34:57 2010
+++ src/sys/arch/mips/rmi/rmixl_cpu.c Fri Apr 16 23:50:30 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_cpu.c,v 1.1.2.9 2010/03/29 23:34:57 cliff Exp $ */
+/* $NetBSD: rmixl_cpu.c,v 1.1.2.10 2010/04/16 23:50:30 cliff Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -38,7 +38,7 @@
#include locators.h
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_cpu.c,v 1.1.2.9 2010/03/29 23:34:57 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_cpu.c,v 1.1.2.10 2010/04/16 23:50:30 cliff Exp $);
#include sys/param.h
#include sys/device.h
@@ -74,8 +74,8 @@
#if 0
static void cpu_setup_trampoline_ipi(struct device *, struct cpu_info *);
#endif
-static void cpu_setup_trampoline_callback(struct device *, struct cpu_info *);
-static void cpu_setup_trampoline_fmn(struct device *, struct cpu_info *);
+static int cpu_setup_trampoline_common(struct cpu_info *, struct rmixl_cpu_trampoline_args *);
+static void cpu_setup_trampoline_callback(struct cpu_info *);
#ifdef DEBUG
void rmixl_cpu_data_print(struct cpu_data *);
struct cpu_info *
@@ -145,10 +145,8 @@
switch (psb_type) {
case PSB_TYPE_RMI:
- cpu_setup_trampoline_callback(self, ci);
- break;
case PSB_TYPE_DELL:
- cpu_setup_trampoline_fmn(self, ci);
+ cpu_setup_trampoline_callback(ci);
break;
default:
aprint_error(: psb type=%s cpu_wakeup unsupported\n,
@@ -248,93 +246,10 @@
rmixl_fmn_init_core();
}
-#ifdef NOTYET
-static void
-cpu_setup_trampoline_ipi(struct device *self, struct cpu_info *ci)
-{
- volatile struct rmixlfw_cpu_wakeup_info *wip;
- u_int cpu, core, thread;
- uint32_t ipi;
- int32_t addr;
- uint64_t gp;
- uint64_t sp;
- uint32_t mask;
- volatile uint32_t *maskp;
- __cpu_simple_lock_t *llk;
- volatile uint32_t *xflag; /* ??? */
- extern void rmixl_cpu_trampoline(void *);
-
- cpu = ci-ci_cpuid;
- core = cpu 2;
- thread = cpu __BITS(1,0);
-printf(\n%s: cpu %d, core %d, thread %d\n, __func__, cpu, core, thread);
-
- wip = rmixl_configuration.rc_cpu_wakeup_info[cpu];
-printf(%s: wip %p\n, __func__, wip);
-
- llk = (__cpu_simple_lock_t *)(intptr_t)wip-loader_lock;
-printf(%s: llk %p: %#x\n, __func__, llk, *llk);
-
- /* XXX WTF */
- xflag = (volatile uint32_t *)(intptr_t)(wip-loader_lock + 0x2c);
-printf(%s: xflag %p, %#x\n, __func__, xflag, *xflag);
-
- ipi = (thread RMIXL_PIC_IPIBASE_ID_THREAD_SHIFT)
- | (core RMIXL_PIC_IPIBASE_ID_CORE_SHIFT)
- | RMIXLFW_IPI_WAKEUP;
-printf(%s: ipi %#x\n, __func__, ipi);
-
- /* entry addr must be uncached, use KSEG1 */
- addr = (int32_t)MIPS_PHYS_TO_KSEG1(
- MIPS_KSEG0_TO_PHYS(rmixl_cpu_trampoline));
-printf(%s: addr %#x\n, __func__, addr);
-
- __asm__ volatile(move %0, $gp\n : =r(gp));
-printf(%s: gp %#PRIx64\n, __func__, gp);
-
- sp = (256 * 1024) - 32; /* XXX TMP FIXME */
- sp = MIPS_PHYS_TO_KSEG1(sp);
-printf(%s: sp %#PRIx64\n, __func__, sp);
-
- maskp = (uint32_t *)(intptr_t)wip-global_wakeup_mask;
-printf(%s: maskp %p\n, __func__, maskp);
-
- __cpu_simple_lock(llk);
-printf(%s: llk %p: %#x\n, __func__, llk, *llk);
-
- wip-entry.addr = addr;
- wip-entry.args = 0;
-if (0) {
- wip-entry.sp = sp;
- wip-entry.gp = gp;
-}
-
- mask = *maskp;
- mask |= 1 cpu;
- *maskp = mask;
-
-#if 0
- *xflag = mask; /* XXX */
-#endif
-
- RMIXL_IOREG_WRITE(RMIXL_PIC_IPIBASE, ipi);
-
- __cpu_simple_unlock(llk);
-printf(%s: llk %p: %#x\n, __func__, llk, *llk);
-
- Debugger();
-}
-#endif /* NOTYET */
-
-
-static void
-cpu_setup_trampoline_callback(struct device *self, struct cpu_info *ci)
+static int
+cpu_setup_trampoline_common(struct cpu_info *ci, struct rmixl_cpu_trampoline_args *ta)
{
- void (*wakeup_cpu)(void *, void *, unsigned int);
- extern void rmixl_cpu_trampoline(void *);
- extern void rmixlfw_wakeup_cpu(void *, void *, u_int64_t, void *);
struct lwp *l = ci-ci_data.cpu_idlelwp;
- struct rmixl_cpu_trampoline_args *ta = rmixl_cpu_trampoline_args;
uintptr_t stacktop;
#ifdef DIAGNOSTIC
@@ -364,7 +279,7 @@
* to avoid TLB fault in trampoline when loading args.
*
* Note:
- * RMI firmware only passes the lower half of 'ta'
+ * RMI firmware only passes the lower 32-bit half of 'ta'
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Tue Apr 13 18:04:03 UTC 2010
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_fmn.c
Log Message:
improve names to avoid confusion between storage and pointers
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.2 -r1.1.2.3 src/sys/arch/mips/rmi/rmixl_fmn.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_fmn.c
diff -u src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.2 src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.3
--- src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.2 Mon Mar 29 23:34:32 2010
+++ src/sys/arch/mips/rmi/rmixl_fmn.c Tue Apr 13 18:04:03 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_fmn.c,v 1.1.2.2 2010/03/29 23:34:32 cliff Exp $ */
+/* $NetBSD: rmixl_fmn.c,v 1.1.2.3 2010/04/13 18:04:03 cliff Exp $ */
#include opt_ddb.h
@@ -223,14 +223,14 @@
fmn_intrhand_t fmn_intrhand[RMIXL_FMN_NSTID];
} fmn_t;
-static fmn_t fmn[1 10]; /* index by cpuid) *//* XXX assumes 1 node */
-#define NFMN (sizeof(fmn) / sizeof(fmn[0]))
+static fmn_t fmn_store[1 10]; /* index by cpuid) *//* XXX assumes 1 node */
+#define NFMN (sizeof(fmn_store) / sizeof(fmn_store[0]))
static fmn_t *
fmn_lookup(cpuid_t cpuid)
{
KASSERT(cpuid (cpuid_t)NFMN);
- return fmn[cpuid];
+ return fmn_store[cpuid];
}
static void rmixl_fmn_init_core_xlr(fmn_t *);
@@ -453,6 +453,7 @@
kmutex_t *lk;
fmnp = fmn_lookup(cpu_number());
+ KASSERT(fmnp != NULL);
KASSERT(fmnp-fmn_core == RMIXL_CPU_CORE(cpu_number()));
KASSERT(fmnp-fmn_thread == RMIXL_CPU_THREAD(cpu_number()));
@@ -468,13 +469,16 @@
*/
switch(cpu_rmixl_chip_type(mips_options.mips_cpu)) {
case CIDFL_RMI_TYPE_XLR:
- rmixl_fmn_init_core_xlr(fmn);
+ rmixl_fmn_init_core_xlr(fmnp);
break;
case CIDFL_RMI_TYPE_XLS:
- rmixl_fmn_init_core_xls(fmn);
+ rmixl_fmn_init_core_xls(fmnp);
break;
case CIDFL_RMI_TYPE_XLP:
panic(%s: RMI XLP not yet supported, __func__);
+ default:
+ panic(%s: RMI chip type %#x unknown, __func__,
+ cpu_rmixl_chip_type(mips_options.mips_cpu));
}
/*
@@ -495,7 +499,7 @@
static void
rmixl_fmn_config_noncore(fmn_t *fmnp)
{
- for (u_int sid=0; sid fmn-fmn_nstid; sid++) {
+ for (u_int sid=0; sid fmnp-fmn_nstid; sid++) {
u_int regoff = fmnp-fmn_stinfo[sid].si_regbase;
if (regoff != 0) {
u_int buckets_max = fmnp-fmn_stinfo[sid].si_buckets_max;
@@ -604,9 +608,9 @@
fmnp = fmn_lookup(cpu_number());
mutex_enter(fmnp-fmn_lock);
- for (int i=0; i fmn-fmn_nstid; i++)
+ for (int i=0; i fmnp-fmn_nstid; i++)
evcnt_attach_dynamic(fmnp-fmn_intrhand[i].ih_count,
- EVCNT_TYPE_INTR, NULL, rmixl_fmn, fmn-fmn_stinfo[i].si_name);
+ EVCNT_TYPE_INTR, NULL, rmixl_fmn, fmnp-fmn_stinfo[i].si_name);
#ifdef NOTYET
/*
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: cliff Date: Tue Apr 13 18:15:16 UTC 2010 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_cpucorevar.h rmixl_cpunodevar.h rmixl_cpuvar.h rmixl_fmn.c rmixl_fmnvar.h rmixl_intr.h rmixl_obiovar.h rmixl_pcievar.h rmixl_pcixvar.h rmixl_subr.S Log Message: add TNF License and copyright. To generate a diff of this commit: cvs rdiff -u -r1.1.2.2 -r1.1.2.3 src/sys/arch/mips/rmi/rmixl_cpucorevar.h \ src/sys/arch/mips/rmi/rmixl_fmnvar.h src/sys/arch/mips/rmi/rmixl_intr.h cvs rdiff -u -r1.1.2.1 -r1.1.2.2 src/sys/arch/mips/rmi/rmixl_cpunodevar.h \ src/sys/arch/mips/rmi/rmixl_cpuvar.h \ src/sys/arch/mips/rmi/rmixl_pcixvar.h cvs rdiff -u -r1.1.2.3 -r1.1.2.4 src/sys/arch/mips/rmi/rmixl_fmn.c cvs rdiff -u -r1.1.2.8 -r1.1.2.9 src/sys/arch/mips/rmi/rmixl_obiovar.h cvs rdiff -u -r1.1.2.6 -r1.1.2.7 src/sys/arch/mips/rmi/rmixl_pcievar.h \ src/sys/arch/mips/rmi/rmixl_subr.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixl_cpucorevar.h diff -u src/sys/arch/mips/rmi/rmixl_cpucorevar.h:1.1.2.2 src/sys/arch/mips/rmi/rmixl_cpucorevar.h:1.1.2.3 --- src/sys/arch/mips/rmi/rmixl_cpucorevar.h:1.1.2.2 Tue Feb 23 20:33:48 2010 +++ src/sys/arch/mips/rmi/rmixl_cpucorevar.h Tue Apr 13 18:15:16 2010 @@ -1,4 +1,32 @@ -/* $NetBSD: rmixl_cpucorevar.h,v 1.1.2.2 2010/02/23 20:33:48 matt Exp $ q*/ +/* $NetBSD: rmixl_cpucorevar.h,v 1.1.2.3 2010/04/13 18:15:16 cliff Exp $ */ +/*- + * Copyright (c) 2010 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Cliff Neighbors. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + *notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + *notice, this list of conditions and the following disclaimer in the + *documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ #ifndef _ARCH_MIPS_RMI_RMIXL_CPUCOREVAR_H_ #define _ARCH_MIPS_RMI_RMIXL_CPUCOREVAR_H_ Index: src/sys/arch/mips/rmi/rmixl_fmnvar.h diff -u src/sys/arch/mips/rmi/rmixl_fmnvar.h:1.1.2.2 src/sys/arch/mips/rmi/rmixl_fmnvar.h:1.1.2.3 --- src/sys/arch/mips/rmi/rmixl_fmnvar.h:1.1.2.2 Mon Mar 29 23:34:09 2010 +++ src/sys/arch/mips/rmi/rmixl_fmnvar.h Tue Apr 13 18:15:16 2010 @@ -1,4 +1,32 @@ -/* $Id: rmixl_fmnvar.h,v 1.1.2.2 2010/03/29 23:34:09 cliff Exp $ */ +/* $Id: rmixl_fmnvar.h,v 1.1.2.3 2010/04/13 18:15:16 cliff Exp $ */ +/*- + * Copyright (c) 2010 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Cliff Neighbors. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + *notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + *notice, this list of conditions and the following disclaimer in the + *documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: cliff Date: Wed Apr 14 01:23:15 UTC 2010 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_spl.S Log Message: insert nop in delay slots - at end of _splsw_splvm and - inside _splsw_splint To generate a diff of this commit: cvs rdiff -u -r1.1.2.1 -r1.1.2.2 src/sys/arch/mips/rmi/rmixl_spl.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixl_spl.S diff -u src/sys/arch/mips/rmi/rmixl_spl.S:1.1.2.1 src/sys/arch/mips/rmi/rmixl_spl.S:1.1.2.2 --- src/sys/arch/mips/rmi/rmixl_spl.S:1.1.2.1 Sun Mar 21 21:17:01 2010 +++ src/sys/arch/mips/rmi/rmixl_spl.S Wed Apr 14 01:23:15 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: rmixl_spl.S,v 1.1.2.1 2010/03/21 21:17:01 cliff Exp $ */ +/* $NetBSD: rmixl_spl.S,v 1.1.2.2 2010/04/14 01:23:15 cliff Exp $ */ /*- * Copyright (c) 2009, 2010 The NetBSD Foundation, Inc. @@ -37,7 +37,7 @@ #include mips/asm.h #include mips/cpuregs.h -RCSID($NetBSD: rmixl_spl.S,v 1.1.2.1 2010/03/21 21:17:01 cliff Exp $); +RCSID($NetBSD: rmixl_spl.S,v 1.1.2.2 2010/04/14 01:23:15 cliff Exp $); #include assym.h @@ -263,6 +263,7 @@ REG_L a0, _C_LABEL(ipl_eimr_map) + 8*IPL_VM li a1, IPL_VM b _splraise + nop END(_splsw_splvm) STATIC_LEAF(_splsw_splsoftserial) @@ -318,6 +319,7 @@ addiu v0, 1# increase ipl by 1 move v1, ta2# reduce down pending intrs b 1b# and check them + nop 2: /*
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Mon Apr 12 22:03:33 UTC 2010
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_pcix.c
Log Message:
- add bit defines for HOST_MODE_CTL reg
- panic if Host BAR regs do not cover RAM addrs 0..mem_cluster_maxaddr
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.1 -r1.1.2.2 src/sys/arch/mips/rmi/rmixl_pcix.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_pcix.c
diff -u src/sys/arch/mips/rmi/rmixl_pcix.c:1.1.2.1 src/sys/arch/mips/rmi/rmixl_pcix.c:1.1.2.2
--- src/sys/arch/mips/rmi/rmixl_pcix.c:1.1.2.1 Wed Apr 7 19:25:48 2010
+++ src/sys/arch/mips/rmi/rmixl_pcix.c Mon Apr 12 22:03:33 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_pcix.c,v 1.1.2.1 2010/04/07 19:25:48 cliff Exp $ */
+/* $NetBSD: rmixl_pcix.c,v 1.1.2.2 2010/04/12 22:03:33 cliff Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -40,7 +40,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_pcix.c,v 1.1.2.1 2010/04/07 19:25:48 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_pcix.c,v 1.1.2.2 2010/04/12 22:03:33 cliff Exp $);
#include opt_pci.h
#include pci.h
@@ -161,6 +161,18 @@
#define PCIX_INTR_ERR_STATUS_RESV \
(PCIX_INTR_ERR_STATUS_RESa|PCIX_INTR_ERR_STATUS_RESb)
+/*
+ * RMIXL_PCIX_ECFG_HOST_MODE_CTL bit defines
+ */
+#define PCIX_HOST_MODE_CTL_HDMSTAT __BIT(1) /* Host/Dev Mode status
+ * read-only
+ * 1 = host
+ * 0 = device
+ */
+#define PCIX_HOST_MODE_CTL_HOSTSWRST __BIT(0) /* Host soft reset
+ * set to 1 to reset
+ * set to 0 to un-reset
+ */
#if BYTE_ORDER == BIG_ENDIAN
@@ -278,7 +290,7 @@
/* read Host Mode Control register */
r = RMIXL_PCIXREG_READ(RMIXL_PCIX_ECFG_HOST_MODE_CTL);
- r = __BIT(1); /* XXX HDMStat */
+ r = PCIX_HOST_MODE_CTL_HDMSTAT;
if (r == 0)
return 0; /* strapped for Device Mode */
@@ -313,22 +325,39 @@
/*
* check XLR Control Register
*/
- uint32_t xlr_control;
- xlr_control = RMIXL_PCIXREG_READ(RMIXL_PCIX_ECFG_XLR_CONTROL);
- printf(%s: XLR_CONTROL=%#x\n, __func__, xlr_control);
-
- /*
- * check HBAR[0..7]
- */
- uint32_t hbar_addr, hbar_size;
- u_int addr_off = RMIXL_PCIX_ECFG_HOST_BAR0_ADDR;
- u_int size_off = RMIXL_PCIX_ECFG_HOST_BAR0_SIZE;
- for (int i=0; i 7; i++) {
- hbar_addr = RMIXL_PCIXREG_READ(addr_off);
- hbar_size = RMIXL_PCIXREG_READ(size_off);
- addr_off += 4;
- size_off += 4;
- printf(%s: HBAR[%d]=%#x @ %#x\n, __func__, i, hbar_size, hbar_addr);
+ DPRINTF((%s: XLR_CONTROL=%#x\n, __func__,
+ RMIXL_PCIXREG_READ(RMIXL_PCIX_ECFG_XLR_CONTROL)));
+
+ /*
+ * HBAR[0] if a 32 bit BAR, or
+ * HBAR[0,1] if a 64 bit BAR pair
+ * must cover all RAM
+ */
+ extern u_quad_t mem_cluster_maxaddr;
+ uint64_t hbar_addr;
+ uint64_t hbar_size;
+ uint32_t hbar_size_lo, hbar_size_hi;
+ uint32_t hbar_addr_lo, hbar_addr_hi;
+
+ hbar_addr_lo = RMIXL_PCIXREG_READ(RMIXL_PCIX_ECFG_HOST_BAR0_ADDR);
+ hbar_addr_hi = RMIXL_PCIXREG_READ(RMIXL_PCIX_ECFG_HOST_BAR1_ADDR);
+ hbar_size_lo = RMIXL_PCIXREG_READ(RMIXL_PCIX_ECFG_HOST_BAR0_SIZE);
+ hbar_size_hi = RMIXL_PCIXREG_READ(RMIXL_PCIX_ECFG_HOST_BAR1_SIZE);
+
+ hbar_addr = (u_quad_t)(hbar_addr_lo PCI_MAPREG_MEM_ADDR_MASK);
+ hbar_size = hbar_size_lo;
+ if ((hbar_size_lo PCI_MAPREG_MEM_TYPE_64BIT) != 0) {
+ hbar_addr |= (uint64_t)hbar_addr_hi 32;
+ hbar_size |= (uint64_t)hbar_size_hi 32;
+ }
+ if ((hbar_addr != 0) || (hbar_size mem_cluster_maxaddr)) {
+ printf(%s: HostBAR0 addr %#x, size %#x\n,
+ device_xname(self), hbar_addr_lo, hbar_size_lo);
+ if ((hbar_size_lo PCI_MAPREG_MEM_TYPE_64BIT) != 0)
+ printf(%s: HostBAR1 addr %#x, size %#x\n,
+device_xname(self), hbar_addr_hi, hbar_size_hi);
+ panic(PCI-X Host BAR does not cover RAM range 0..%#PRIx64,
+ mem_cluster_maxaddr);
}
/*
@@ -339,7 +368,7 @@
mble = RMIXL_PCIXREG_READ(RMIXL_PCIX_ECFG_XLR_MBLE);
mba = RMIXL_PCIXREG_READ(RMIXL_PCIX_ECFG_MATCH_BIT_ADDR);
mbs = RMIXL_PCIXREG_READ(RMIXL_PCIX_ECFG_MATCH_BIT_SIZE);
- printf(%s: MBLE=%#x, MBA=%#x, MBS=%#x\n, __func__, mble, mba, mbs);
+ DPRINTF((%s: MBLE=%#x, MBA=%#x, MBS=%#x\n, __func__, mble, mba, mbs));
if ((mble __BIT(40)) != 0)
RMIXL_PCIXREG_WRITE(RMIXL_PCIX_ECFG_XLR_MBLE, 0);
@@ -368,8 +397,6 @@
}
rcp-rc_pci_mem_pbase = (bus_addr_t)RMIXL_PCIX_MEM_BAR_TO_BA(bar);
rcp-rc_pci_mem_size = (bus_size_t)RMIXL_PCIX_MEM_BAR_TO_SIZE(bar);
-printf(%s: rc_pci_mem_pbase %#PRIxBUSADDR, rc_pci_mem_size %#PRIxBUSSIZE\n,
-__func__, rcp-rc_pci_mem_pbase, rcp-rc_pci_mem_size);
/*
* get PCI IO space base [addr, size] from SBC PCIe IO BAR
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Mon Apr 12 22:40:55 UTC 2010
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_intr.c rmixl_intr.h
Log Message:
- establishing an ISR now takes 'mpsafe' arg
- obtain/release kernel lock around calls to non-mpsafe ISRs
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.16 -r1.1.2.17 src/sys/arch/mips/rmi/rmixl_intr.c
cvs rdiff -u -r1.1.2.1 -r1.1.2.2 src/sys/arch/mips/rmi/rmixl_intr.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_intr.c
diff -u src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.16 src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.17
--- src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.16 Mon Mar 29 23:35:24 2010
+++ src/sys/arch/mips/rmi/rmixl_intr.c Mon Apr 12 22:40:55 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_intr.c,v 1.1.2.16 2010/03/29 23:35:24 cliff Exp $ */
+/* $NetBSD: rmixl_intr.c,v 1.1.2.17 2010/04/12 22:40:55 cliff Exp $ */
/*-
* Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
@@ -64,7 +64,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.16 2010/03/29 23:35:24 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.17 2010/04/12 22:40:55 cliff Exp $);
#include opt_ddb.h
#define __INTR_PRIVATE
@@ -422,12 +422,13 @@
* establish vector for mips3 count/compare clock interrupt
* this ensures we enable in EIRR,
* even though cpu_intr() handles the interrupt
+ * note the 'mpsafe' arg here is a placeholder only
*/
void *
rmixl_intr_init_clk(void)
{
int vec = ffs(MIPS_INT_MASK_5 8) - 1;
- void *ih = rmixl_vec_establish(vec, 0, IPL_SCHED, NULL, NULL);
+ void *ih = rmixl_vec_establish(vec, 0, IPL_SCHED, NULL, NULL, false);
if (ih == NULL)
panic(%s: establish vec %d failed, __func__, vec);
@@ -442,7 +443,7 @@
rmixl_intr_init_ipi(void)
{
void *ih = rmixl_vec_establish(RMIXL_INTRVEC_IPI, -1, IPL_SCHED,
- rmixl_ipi_intr, NULL);
+ rmixl_ipi_intr, NULL, false);
if (ih == NULL)
panic(%s: establish vec %d failed,
__func__, RMIXL_INTRVEC_IPI);
@@ -671,7 +672,7 @@
void *
rmixl_vec_establish(int vec, int cpumask, int ipl,
- int (*func)(void *), void *arg)
+ int (*func)(void *), void *arg, bool mpsafe)
{
rmixl_intrhand_t *ih;
int s;
@@ -700,6 +701,7 @@
ih-ih_func = func;
ih-ih_arg = arg;
+ ih-ih_mpsafe = mpsafe;
ih-ih_irq = vec;
ih-ih_ipl = ipl;
ih-ih_cpumask = cpumask;
@@ -710,8 +712,9 @@
}
void *
-rmixl_intr_establish(int irq, int cpumask, int ipl, rmixl_intr_trigger_t trigger,
- rmixl_intr_polarity_t polarity, int (*func)(void *), void *arg)
+rmixl_intr_establish(int irq, int cpumask, int ipl,
+ rmixl_intr_trigger_t trigger, rmixl_intr_polarity_t polarity,
+ int (*func)(void *), void *arg, bool mpsafe)
{
rmixl_intrhand_t *ih;
int s;
@@ -738,7 +741,7 @@
/*
* establish vector
*/
- ih = rmixl_vec_establish(irq, cpumask, ipl, func, arg);
+ ih = rmixl_vec_establish(irq, cpumask, ipl, func, arg, mpsafe);
/*
* establish IRT Entry
@@ -843,8 +846,19 @@
RMIXL_PICREG_WRITE(RMIXL_PIC_INTRACK,
(uint32_t)vecbit);
- if (ih-ih_func != NULL)
+ if (ih-ih_func != NULL) {
+#ifdef MULTIPROCESSOR
+ if (ih-ih_mpsafe) {
+(void)(*ih-ih_func)(ih-ih_arg);
+ } else {
+KERNEL_LOCK(1, NULL);
+(void)(*ih-ih_func)(ih-ih_arg);
+KERNEL_UNLOCK_ONE(NULL);
+ }
+#else
(void)(*ih-ih_func)(ih-ih_arg);
+#endif /* MULTIPROCESSOR */
+ }
sc-sc_vec_evcnts[vec].ev_count++;
}
Index: src/sys/arch/mips/rmi/rmixl_intr.h
diff -u src/sys/arch/mips/rmi/rmixl_intr.h:1.1.2.1 src/sys/arch/mips/rmi/rmixl_intr.h:1.1.2.2
--- src/sys/arch/mips/rmi/rmixl_intr.h:1.1.2.1 Sun Mar 21 19:28:01 2010
+++ src/sys/arch/mips/rmi/rmixl_intr.h Mon Apr 12 22:40:55 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_intr.h,v 1.1.2.1 2010/03/21 19:28:01 cliff Exp $ */
+/* $NetBSD: rmixl_intr.h,v 1.1.2.2 2010/04/12 22:40:55 cliff Exp $ */
#ifndef _MIPS_RMI_RMIXL_INTR_H_
#define _MIPS_RMI_RMIXL_INTR_H_
@@ -40,6 +40,7 @@
typedef struct rmixl_intrhand {
int (*ih_func)(void *);
void *ih_arg;
+int ih_mpsafe; /* true if does not need kernel lock */
int ih_irq; /* =32 if not-PIC-based */
int ih_ipl; /* interrupt priority */
int ih_cpumask; /* CPUs which may handle this irpt */
@@ -53,10 +54,10 @@
extern void *rmixl_intr_establish(int, int, int,
rmixl_intr_trigger_t, rmixl_intr_polarity_t,
- int (*)(void *), void *);
+ int (*)(void *), void *, bool);
extern void rmixl_intr_disestablish(void *);
extern void *rmixl_vec_establish(int, int, int,
- int (*)(void *), void *);
+ int (*)(void *), void *, bool);
extern void rmixl_vec_disestablish(void *);
extern const char *rmixl_intr_string(int);
extern void rmixl_intr_init_cpu(struct cpu_info *);
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Mon Apr 12 22:42:07 UTC 2010
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_com.c rmixl_obio.c
rmixl_pcie.c rmixl_pcix.c rmixl_usbi.c
Log Message:
- specifiy if mpsafe when establishing interrupts
(all are 'false' except comintr for now)
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.11 -r1.1.2.12 src/sys/arch/mips/rmi/rmixl_com.c \
src/sys/arch/mips/rmi/rmixl_pcie.c
cvs rdiff -u -r1.1.2.14 -r1.1.2.15 src/sys/arch/mips/rmi/rmixl_obio.c
cvs rdiff -u -r1.1.2.2 -r1.1.2.3 src/sys/arch/mips/rmi/rmixl_pcix.c
cvs rdiff -u -r1.1.2.4 -r1.1.2.5 src/sys/arch/mips/rmi/rmixl_usbi.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_com.c
diff -u src/sys/arch/mips/rmi/rmixl_com.c:1.1.2.11 src/sys/arch/mips/rmi/rmixl_com.c:1.1.2.12
--- src/sys/arch/mips/rmi/rmixl_com.c:1.1.2.11 Sun Mar 21 21:23:32 2010
+++ src/sys/arch/mips/rmi/rmixl_com.c Mon Apr 12 22:42:07 2010
@@ -1,4 +1,4 @@
-/* $Id: rmixl_com.c,v 1.1.2.11 2010/03/21 21:23:32 cliff Exp $ */
+/* $Id: rmixl_com.c,v 1.1.2.12 2010/04/12 22:42:07 cliff Exp $ */
/*-
* Copyright (c) 2006 Urbana-Champaign Independent Media Center.
* Copyright (c) 2006 Garrett D'Amore.
@@ -101,7 +101,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_com.c,v 1.1.2.11 2010/03/21 21:23:32 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_com.c,v 1.1.2.12 2010/04/12 22:42:07 cliff Exp $);
#include sys/param.h
#include sys/systm.h
@@ -286,7 +286,8 @@
com_attach_subr(sc);
rmixl_intr_establish(obio-obio_intr, obio-obio_tmsk,
- IPL_SERIAL, RMIXL_TRIG_LEVEL, RMIXL_POLR_HIGH, comintr, sc);
+ IPL_SERIAL, RMIXL_TRIG_LEVEL, RMIXL_POLR_HIGH,
+ comintr, sc, true);
}
Index: src/sys/arch/mips/rmi/rmixl_pcie.c
diff -u src/sys/arch/mips/rmi/rmixl_pcie.c:1.1.2.11 src/sys/arch/mips/rmi/rmixl_pcie.c:1.1.2.12
--- src/sys/arch/mips/rmi/rmixl_pcie.c:1.1.2.11 Wed Apr 7 19:26:14 2010
+++ src/sys/arch/mips/rmi/rmixl_pcie.c Mon Apr 12 22:42:06 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_pcie.c,v 1.1.2.11 2010/04/07 19:26:14 cliff Exp $ */
+/* $NetBSD: rmixl_pcie.c,v 1.1.2.12 2010/04/12 22:42:06 cliff Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -40,7 +40,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_pcie.c,v 1.1.2.11 2010/04/07 19:26:14 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_pcie.c,v 1.1.2.12 2010/04/12 22:42:06 cliff Exp $);
#include opt_pci.h
#include pci.h
@@ -782,7 +782,7 @@
case MIPS_XLS408LITE:
sc-sc_fatal_ih = rmixl_intr_establish(29, sc-sc_tmsk,
IPL_HIGH, RMIXL_TRIG_LEVEL, RMIXL_POLR_HIGH,
- rmixl_pcie_error_intr, v);
+ rmixl_pcie_error_intr, v, false);
break;
default:
break;
@@ -1300,7 +1300,7 @@
if (lip-enabled == false) {
lip-ih = rmixl_intr_establish(irq, sc-sc_tmsk,
ipl, RMIXL_TRIG_LEVEL, RMIXL_POLR_HIGH,
- rmixl_pcie_intr, lip);
+ rmixl_pcie_intr, lip, false);
if (lip-ih == NULL)
panic(%s: cannot establish irq %d, __func__, irq);
Index: src/sys/arch/mips/rmi/rmixl_obio.c
diff -u src/sys/arch/mips/rmi/rmixl_obio.c:1.1.2.14 src/sys/arch/mips/rmi/rmixl_obio.c:1.1.2.15
--- src/sys/arch/mips/rmi/rmixl_obio.c:1.1.2.14 Sun Mar 21 21:26:13 2010
+++ src/sys/arch/mips/rmi/rmixl_obio.c Mon Apr 12 22:42:06 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_obio.c,v 1.1.2.14 2010/03/21 21:26:13 cliff Exp $ */
+/* $NetBSD: rmixl_obio.c,v 1.1.2.15 2010/04/12 22:42:06 cliff Exp $ */
/*
* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
@@ -40,7 +40,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_obio.c,v 1.1.2.14 2010/03/21 21:26:13 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_obio.c,v 1.1.2.15 2010/04/12 22:42:06 cliff Exp $);
#include locators.h
#include pci.h
@@ -283,8 +283,9 @@
* XXX is true for XLS family only
*/
if (cpu_rmixls(mips_options.mips_cpu))
- rmixl_intr_establish(16, 1, IPL_HIGH, RMIXL_TRIG_LEVEL, RMIXL_POLR_HIGH,
- rmixl_addr_error_intr, NULL);
+ rmixl_intr_establish(16, 1, IPL_HIGH,
+ RMIXL_TRIG_LEVEL, RMIXL_POLR_HIGH,
+ rmixl_addr_error_intr, NULL, false);
}
int
Index: src/sys/arch/mips/rmi/rmixl_pcix.c
diff -u src/sys/arch/mips/rmi/rmixl_pcix.c:1.1.2.2 src/sys/arch/mips/rmi/rmixl_pcix.c:1.1.2.3
--- src/sys/arch/mips/rmi/rmixl_pcix.c:1.1.2.2 Mon Apr 12 22:03:33 2010
+++ src/sys/arch/mips/rmi/rmixl_pcix.c Mon Apr 12 22:42:07 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_pcix.c,v 1.1.2.2 2010/04/12 22:03:33 cliff Exp $ */
+/* $NetBSD: rmixl_pcix.c,v 1.1.2.3 2010/04/12 22:42:07 cliff Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -40,7 +40,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_pcix.c,v 1.1.2.2 2010/04/12 22:03:33 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_pcix.c,v 1.1.2.3 2010/04/12 22:42:07 cliff Exp $);
#include opt_pci.h
#include pci.h
@@ -482,13 +482,13 @@
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: cliff Date: Wed Apr 7 19:23:51 UTC 2010 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixlreg.h Log Message: - add PCI-X regs - improve names for XLR and XLS specific and common PCI-X, PCIe regs and macros To generate a diff of this commit: cvs rdiff -u -r1.1.2.10 -r1.1.2.11 src/sys/arch/mips/rmi/rmixlreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixlreg.h diff -u src/sys/arch/mips/rmi/rmixlreg.h:1.1.2.10 src/sys/arch/mips/rmi/rmixlreg.h:1.1.2.11 --- src/sys/arch/mips/rmi/rmixlreg.h:1.1.2.10 Wed Mar 24 19:14:09 2010 +++ src/sys/arch/mips/rmi/rmixlreg.h Wed Apr 7 19:23:50 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: rmixlreg.h,v 1.1.2.10 2010/03/24 19:14:09 cliff Exp $ */ +/* $NetBSD: rmixlreg.h,v 1.1.2.11 2010/04/07 19:23:50 cliff Exp $ */ /*- * Copyright (c) 2009 The NetBSD Foundation, Inc. @@ -232,6 +232,10 @@ #define RMIXL_IO_DEV_PIC 0x08000 /* Programmable Interrupt Controller */ #if defined(MIPS64_XLR) #define RMIXL_IO_DEV_PCIX 0x09000 /* PCI-X */ +#define RMIXL_IO_DEV_PCIX_EL \ + RMIXL_IO_DEV_PCIX /* PXI-X little endian */ +#define RMIXL_IO_DEV_PCIX_EB \ + (RMIXL_IO_DEV_PCIX | __BIT(11)) /* PXI-X big endian */ #define RMIXL_IO_DEV_HT 0x0a000 /* HyperTransport */ #endif /* MIPS64_XLR */ #define RMIXL_IO_DEV_SAE 0x0b000 /* Security Acceleration Engine */ @@ -299,12 +303,29 @@ #define RMIXL_SBC_DRAM_CHNBD_DTR(n) _RMIXL_OFFSET(0x010 + (n)) /* DRAM Region Channels B,D Address Translation Regs[0-7] */ #define RMIXL_SBC_DRAM_BRIDGE_CFG _RMIXL_OFFSET(0x18) /* SBC DRAM config reg */ -#define RMIXL_SBC_XLS_IO_BAR _RMIXL_OFFSET(0x19) /* I/O Config Base Addr reg */ -#define RMIXL_SBC_XLS_FLASH_BAR _RMIXL_OFFSET(0x20) /* Flash Memory Base Addr reg */ -#define RMIXL_SBC_PCIE_CFG_BAR _RMIXL_OFFSET(0x40) /* PCI Configuration BAR */ -#define RMIXL_SBC_PCIE_ECFG_BAR _RMIXL_OFFSET(0x41) /* PCI Extended Configuration BAR */ -#define RMIXL_SBC_PCIE_MEM_BAR _RMIXL_OFFSET(0x42) /* PCI Memory region BAR */ -#define RMIXL_SBC_PCIE_IO_BAR _RMIXL_OFFSET(0x43) /* PCI IO region BAR */ +#if defined(MIPS64_XLR) +#define RMIXLR_SBC_IO_BAR _RMIXL_OFFSET(0x19) /* I/O Config Base Addr reg */ +#define RMIXLR_SBC_FLASH_BAR _RMIXL_OFFSET(0x1a) /* Flash Memory Base Addr reg */ +#define RMIXLR_SBC_SRAM_BAR _RMIXL_OFFSET(0x1b) /* SRAM Base Addr reg */ +#define RMIXLR_SBC_HTMEM_BAR _RMIXL_OFFSET(0x1c) /* HyperTransport Mem Base Addr reg */ +#define RMIXLR_SBC_HTINT_BAR _RMIXL_OFFSET(0x1d) /* HyperTransport Interrupt Base Addr reg */ +#define RMIXLR_SBC_HTPIC_BAR _RMIXL_OFFSET(0x1e) /* HyperTransport Legacy PIC Base Addr reg */ +#define RMIXLR_SBC_HTSM_BAR _RMIXL_OFFSET(0x1f) /* HyperTransport System Management Base Addr reg */ +#define RMIXLR_SBC_HTIO_BAR _RMIXL_OFFSET(0x20) /* HyperTransport IO Base Addr reg */ +#define RMIXLR_SBC_HTCFG_BAR _RMIXL_OFFSET(0x21) /* HyperTransport Configuration Base Addr reg */ +#define RMIXLR_SBC_PCIX_CFG_BAR _RMIXL_OFFSET(0x22) /* PCI-X Configuration Base Addr reg */ +#define RMIXLR_SBC_PCIX_MEM_BAR _RMIXL_OFFSET(0x23) /* PCI-X Mem Base Addr reg */ +#define RMIXLR_SBC_PCIX_IO_BAR _RMIXL_OFFSET(0x24) /* PCI-X IO Base Addr reg */ +#define RMIXLR_SBC_SYS2IO_CREDITS _RMIXL_OFFSET(0x35) /* System Bridge I/O Transaction Credits register */ +#endif /* MIPS64_XLR */ +#if defined(MIPS64_XLS) +#define RMIXLS_SBC_IO_BAR _RMIXL_OFFSET(0x19) /* I/O Config Base Addr reg */ +#define RMIXLS_SBC_FLASH_BAR _RMIXL_OFFSET(0x20) /* Flash Memory Base Addr reg */ +#define RMIXLS_SBC_PCIE_CFG_BAR _RMIXL_OFFSET(0x40) /* PCI Configuration BAR */ +#define RMIXLS_SBC_PCIE_ECFG_BAR _RMIXL_OFFSET(0x41) /* PCI Extended Configuration BAR */ +#define RMIXLS_SBC_PCIE_MEM_BAR _RMIXL_OFFSET(0x42) /* PCI Memory region BAR */ +#define RMIXLS_SBC_PCIE_IO_BAR _RMIXL_OFFSET(0x43) /* PCI IO region BAR */ +#endif /* MIPS64_XLS */ /* * Address Error registers @@ -369,9 +390,50 @@ #define RMIXL_DRAM_CFG_DRAM_MODE __BITS(1,0) /* 1=DDR2 */ /* - * RMIXL_SBC_PCIE_CFG_BAR bit defines + * RMIXL_SBC_XLR_PCIX_CFG_BAR bit defines + */ +#define RMIXL_PCIX_CFG_BAR_BASE __BITS(31,17) /* phys address bits 39:25 */ +#define RMIXL_PCIX_CFG_BAR_BA_SHIFT (25 - 17) +#define RMIXL_PCIX_CFG_BAR_TO_BA(r) \ + (((r) RMIXL_PCIX_CFG_BAR_BASE) RMIXL_PCIX_CFG_BAR_BA_SHIFT) +#define RMIXL_PCIX_CFG_BAR_RESV __BITS(16,1) /* (reserved) */ +#define RMIXL_PCIX_CFG_BAR_ENB __BIT(0) /* 1=Enable */ +#define RMIXL_PCIX_CFG_SIZE __BIT(25) +#define RMIXL_PCIX_CFG_BAR(ba, en) \ + ((uint32_t)(((ba) (25 - 17)) | ((en) ? RMIXL_PCIX_CFG_BAR_ENB : 0))) + +/* + * RMIXLR_SBC_PCIX_MEM_BAR bit defines + */ +#define RMIXL_PCIX_MEM_BAR_BASE __BITS(31,16) /* phys address bits 39:24 */ +#define RMIXL_PCIX_MEM_BAR_TO_BA(r) \ + (((r) RMIXL_PCIX_MEM_BAR_BASE) (24 - 16)) +#define RMIXL_PCIX_MEM_BAR_MASK __BITS(15,1) /* phys address mask bits 38:24 */ +#define
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Wed Apr 7 19:24:13 UTC 2010
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixlvar.h
Log Message:
- bus space related fields renamed to reflect use by both pcie and pcix
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.16 -r1.1.2.17 src/sys/arch/mips/rmi/rmixlvar.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixlvar.h
diff -u src/sys/arch/mips/rmi/rmixlvar.h:1.1.2.16 src/sys/arch/mips/rmi/rmixlvar.h:1.1.2.17
--- src/sys/arch/mips/rmi/rmixlvar.h:1.1.2.16 Mon Mar 29 23:31:38 2010
+++ src/sys/arch/mips/rmi/rmixlvar.h Wed Apr 7 19:24:13 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixlvar.h,v 1.1.2.16 2010/03/29 23:31:38 cliff Exp $ */
+/* $NetBSD: rmixlvar.h,v 1.1.2.17 2010/04/07 19:24:13 cliff Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -110,18 +110,18 @@
struct rmixl_config {
uint64_t rc_io_pbase;
- bus_addr_t rc_pcie_cfg_pbase;
- bus_size_t rc_pcie_cfg_size;
- bus_addr_t rc_pcie_ecfg_pbase;
- bus_size_t rc_pcie_ecfg_size;
+ bus_addr_t rc_pci_cfg_pbase;
+ bus_size_t rc_pci_cfg_size;
+ bus_addr_t rc_pci_ecfg_pbase;
+ bus_size_t rc_pci_ecfg_size;
bus_addr_t rc_pci_mem_pbase;
bus_size_t rc_pci_mem_size;
bus_addr_t rc_pci_io_pbase;
bus_size_t rc_pci_io_size;
struct mips_bus_space rc_obio_eb_memt; /* DEVIO -eb */
struct mips_bus_space rc_obio_el_memt; /* DEVIO -el */
- struct mips_bus_space rc_pcie_cfg_memt; /* PCI CFG */
- struct mips_bus_space rc_pcie_ecfg_memt; /* PCI ECFG */
+ struct mips_bus_space rc_pci_cfg_memt; /* PCI CFG */
+ struct mips_bus_space rc_pci_ecfg_memt; /* PCI ECFG */
struct mips_bus_space rc_pci_memt; /* PCI MEM */
struct mips_bus_space rc_pci_iot; /* PCI IO */
struct mips_bus_dma_tag rc_64bit_dmat;
@@ -130,10 +130,10 @@
struct extent *rc_phys_ex; /* Note: MB units */
struct extent *rc_obio_eb_ex;
struct extent *rc_obio_el_ex;
- struct extent *rc_pcie_cfg_ex;
- struct extent *rc_pcie_ecfg_ex;
- struct extent *rc_pcie_mem_ex;
- struct extent *rc_pcie_io_ex;
+ struct extent *rc_pci_cfg_ex;
+ struct extent *rc_pci_ecfg_ex;
+ struct extent *rc_pci_mem_ex;
+ struct extent *rc_pci_io_ex;
int rc_mallocsafe;
rmixlfw_info_t rc_psb_info;
rmixlfw_psb_type_t rc_psb_type;
@@ -146,10 +146,10 @@
extern void rmixl_obio_eb_bus_mem_init(bus_space_tag_t, void *);
extern void rmixl_obio_el_bus_mem_init(bus_space_tag_t, void *);
-extern void rmixl_pcie_cfg_bus_mem_init(bus_space_tag_t, void *);
-extern void rmixl_pcie_ecfg_bus_mem_init(bus_space_tag_t, void *);
-extern void rmixl_pcie_bus_mem_init(bus_space_tag_t, void *);
-extern void rmixl_pcie_bus_io_init(bus_space_tag_t, void *);
+extern void rmixl_pci_cfg_bus_mem_init(bus_space_tag_t, void *);
+extern void rmixl_pci_ecfg_bus_mem_init(bus_space_tag_t, void *);
+extern void rmixl_pci_bus_mem_init(bus_space_tag_t, void *);
+extern void rmixl_pci_bus_io_init(bus_space_tag_t, void *);
extern void rmixl_addr_error_init(void);
extern int rmixl_addr_error_check(void);
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Wed Apr 7 19:25:48 UTC 2010
Added Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_pcix.c rmixl_pcixvar.h
Log Message:
- add driver for RMI XLR PCI-X interface
To generate a diff of this commit:
cvs rdiff -u -r0 -r1.1.2.1 src/sys/arch/mips/rmi/rmixl_pcix.c \
src/sys/arch/mips/rmi/rmixl_pcixvar.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Added files:
Index: src/sys/arch/mips/rmi/rmixl_pcix.c
diff -u /dev/null src/sys/arch/mips/rmi/rmixl_pcix.c:1.1.2.1
--- /dev/null Wed Apr 7 19:25:48 2010
+++ src/sys/arch/mips/rmi/rmixl_pcix.c Wed Apr 7 19:25:48 2010
@@ -0,0 +1,993 @@
+/* $NetBSD: rmixl_pcix.c,v 1.1.2.1 2010/04/07 19:25:48 cliff Exp $ */
+
+/*
+ * Copyright (c) 2001 Wasabi Systems, Inc.
+ * All rights reserved.
+ *
+ * Written by Jason R. Thorpe for Wasabi Systems, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *must display the following acknowledgement:
+ * This product includes software developed for the NetBSD Project by
+ * Wasabi Systems, Inc.
+ * 4. The name of Wasabi Systems, Inc. may not be used to endorse
+ *or promote products derived from this software without specific prior
+ *written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * PCI configuration support for RMI XLR SoC
+ */
+
+#include sys/cdefs.h
+__KERNEL_RCSID(0, $NetBSD: rmixl_pcix.c,v 1.1.2.1 2010/04/07 19:25:48 cliff Exp $);
+
+#include opt_pci.h
+#include pci.h
+
+#include sys/cdefs.h
+
+#include sys/param.h
+#include sys/systm.h
+#include sys/device.h
+#include sys/extent.h
+#include sys/malloc.h
+
+#include uvm/uvm_extern.h
+
+#include machine/bus.h
+#include machine/intr.h
+
+#include mips/rmi/rmixlreg.h
+#include mips/rmi/rmixlvar.h
+#include mips/rmi/rmixl_intr.h
+#include mips/rmi/rmixl_pcixvar.h
+
+#include mips/rmi/rmixl_obiovar.h
+
+#include dev/pci/pcivar.h
+#include dev/pci/pcidevs.h
+#include dev/pci/pciconf.h
+
+#ifdef PCI_NETBSD_CONFIGURE
+#include mips/cache.h
+#endif
+
+#include machine/pci_machdep.h
+
+#ifdef PCI_DEBUG
+int rmixl_pcix_debug = PCI_DEBUG;
+# define DPRINTF(x) do { if (rmixl_pcix_debug) printf x ; } while (0)
+#else
+# define DPRINTF(x)
+#endif
+
+#ifndef DDB
+# define STATIC static
+#else
+# define STATIC
+#endif
+
+
+/*
+ * XLR PCI-X Extended Configuration Registers
+ * Note:
+ * - MSI-related regs are omitted
+ * - Device mode regs are omitted
+ */
+#define RMIXL_PCIX_ECFG_HOST_BAR0_ADDR 0x100 /* Host BAR0 Address */
+#define RMIXL_PCIX_ECFG_HOST_BAR1_ADDR 0x104 /* Host BAR1 Address */
+#define RMIXL_PCIX_ECFG_HOST_BAR2_ADDR 0x108 /* Host BAR2 Address */
+#define RMIXL_PCIX_ECFG_HOST_BAR3_ADDR 0x10c /* Host BAR3 Address */
+#define RMIXL_PCIX_ECFG_HOST_BAR4_ADDR 0x110 /* Host BAR4 Address */
+#define RMIXL_PCIX_ECFG_HOST_BAR5_ADDR 0x114 /* Host BAR5 Address */
+#define RMIXL_PCIX_ECFG_HOST_BAR0_SIZE 0x118 /* Host BAR0 Size */
+#define RMIXL_PCIX_ECFG_HOST_BAR1_SIZE 0x11c /* Host BAR1 Size */
+#define RMIXL_PCIX_ECFG_HOST_BAR2_SIZE 0x120 /* Host BAR2 Size */
+#define RMIXL_PCIX_ECFG_HOST_BAR3_SIZE 0x124 /* Host BAR3 Size */
+#define RMIXL_PCIX_ECFG_HOST_BAR4_SIZE 0x128 /* Host BAR4 Size */
+#define RMIXL_PCIX_ECFG_HOST_BAR5_SIZE 0x12c /* Host BAR5 Size */
+#define RMIXL_PCIX_ECFG_MATCH_BIT_ADDR 0x130 /* Match Bit Address BAR */
+#define RMIXL_PCIX_ECFG_MATCH_BIT_SIZE 0x134 /* Match Bit Size BAR */
+#define RMIXL_PCIX_ECFG_XLR_CONTROL 0x138 /* XLR Control reg */
+#define RMIXL_PCIX_ECFG_INTR_CONTROL 0x13c /* Interrupt Control reg */
+#define RMIXL_PCIX_ECFG_INTR_STATUS 0x140 /* Interrupt Status reg */
+#define RMIXL_PCIX_ECFG_INTR_ERR_STATUS 0x144 /*
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Wed Apr 7 19:26:14 UTC 2010
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_pcie.c
Log Message:
- use new PCIE register macro names
- use new bus space related field names in struct rmixl_config
- don't match if not running on an XLS chip
- rmixl_pcie_intr_string() properly decomposes pci_intr_handle_t to obtain irq
- in rmixl_pcie_make_pih() and rmixl_pcie_decompose_pih() KASSERTS,
no check for 0 needed on unsigned
- fix assignment of 'other' in rmixl_pcie_intr_disestablish()
when bit number is = 32
- in rmixl_pcie_intr_establish(), change = to == in a couple asserts
- in rmixl_pcie_intr_establish(), if rmixl_intr_establish() fails,
report irq properly in panic message
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.10 -r1.1.2.11 src/sys/arch/mips/rmi/rmixl_pcie.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_pcie.c
diff -u src/sys/arch/mips/rmi/rmixl_pcie.c:1.1.2.10 src/sys/arch/mips/rmi/rmixl_pcie.c:1.1.2.11
--- src/sys/arch/mips/rmi/rmixl_pcie.c:1.1.2.10 Mon Mar 29 23:32:21 2010
+++ src/sys/arch/mips/rmi/rmixl_pcie.c Wed Apr 7 19:26:14 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_pcie.c,v 1.1.2.10 2010/03/29 23:32:21 cliff Exp $ */
+/* $NetBSD: rmixl_pcie.c,v 1.1.2.11 2010/04/07 19:26:14 cliff Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -40,7 +40,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_pcie.c,v 1.1.2.10 2010/03/29 23:32:21 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_pcie.c,v 1.1.2.11 2010/04/07 19:26:14 cliff Exp $);
#include opt_pci.h
#include pci.h
@@ -230,9 +230,9 @@
enabling %s at phys %# PRIxBUSADDR , size %lu MB\n, \
__STRING(reg), __STRING(reg), ba, size)); \
RMIXL_IOREG_WRITE(RMIXL_IO_DEV_BRIDGE + \
- RMIXL_PCIE_CONCAT3(RMIXL_SBC_PCIE_,reg,_BAR), bar); \
+ RMIXL_PCIE_CONCAT3(RMIXLS_SBC_PCIE_,reg,_BAR), bar); \
bar = RMIXL_IOREG_READ(RMIXL_IO_DEV_BRIDGE + \
- RMIXL_PCIE_CONCAT3(RMIXL_SBC_PCIE_,reg,_BAR)); \
+ RMIXL_PCIE_CONCAT3(RMIXLS_SBC_PCIE_,reg,_BAR)); \
DPRINTF((%s: %s BAR %#x\n, __func__, __STRING(reg), bar)); \
}
@@ -251,6 +251,12 @@
{
uint32_t r;
+ /*
+ * PCIe interface exists on XLS chips only
+ */
+ if (! cpu_rmixls(mips_options.mips_cpu))
+ return 0;
+
/* XXX
* for now there is only one PCIe Interface on chip
* this could change with furture RMI XL family designs
@@ -298,33 +304,33 @@
* get PCI config space base addr from SBC PCIe CFG BAR
* initialize it if necessary
*/
- bar = RMIXL_IOREG_READ(RMIXL_IO_DEV_BRIDGE + RMIXL_SBC_PCIE_CFG_BAR);
+ bar = RMIXL_IOREG_READ(RMIXL_IO_DEV_BRIDGE + RMIXLS_SBC_PCIE_CFG_BAR);
DPRINTF((%s: PCIE_CFG_BAR %#x\n, __func__, bar));
if ((bar RMIXL_PCIE_CFG_BAR_ENB) == 0) {
u_long n = RMIXL_PCIE_CFG_SIZE / (1024 * 1024);
RMIXL_PCIE_BAR_INIT(CFG, bar, n, n);
}
- rcp-rc_pcie_cfg_pbase = (bus_addr_t)RMIXL_PCIE_CFG_BAR_TO_BA(bar);
- rcp-rc_pcie_cfg_size = (bus_size_t)RMIXL_PCIE_CFG_SIZE;
+ rcp-rc_pci_cfg_pbase = (bus_addr_t)RMIXL_PCIE_CFG_BAR_TO_BA(bar);
+ rcp-rc_pci_cfg_size = (bus_size_t)RMIXL_PCIE_CFG_SIZE;
/*
* get PCIE Extended config space base addr from SBC PCIe ECFG BAR
* initialize it if necessary
*/
- bar = RMIXL_IOREG_READ(RMIXL_IO_DEV_BRIDGE + RMIXL_SBC_PCIE_ECFG_BAR);
+ bar = RMIXL_IOREG_READ(RMIXL_IO_DEV_BRIDGE + RMIXLS_SBC_PCIE_ECFG_BAR);
DPRINTF((%s: PCIE_ECFG_BAR %#x\n, __func__, bar));
if ((bar RMIXL_PCIE_ECFG_BAR_ENB) == 0) {
u_long n = RMIXL_PCIE_ECFG_SIZE / (1024 * 1024);
RMIXL_PCIE_BAR_INIT(ECFG, bar, n, n);
}
- rcp-rc_pcie_ecfg_pbase = (bus_addr_t)RMIXL_PCIE_ECFG_BAR_TO_BA(bar);
- rcp-rc_pcie_ecfg_size = (bus_size_t)RMIXL_PCIE_ECFG_SIZE;
+ rcp-rc_pci_ecfg_pbase = (bus_addr_t)RMIXL_PCIE_ECFG_BAR_TO_BA(bar);
+ rcp-rc_pci_ecfg_size = (bus_size_t)RMIXL_PCIE_ECFG_SIZE;
/*
* get PCI MEM space base [addr, size] from SBC PCIe MEM BAR
* initialize it if necessary
*/
- bar = RMIXL_IOREG_READ(RMIXL_IO_DEV_BRIDGE + RMIXL_SBC_PCIE_MEM_BAR);
+ bar = RMIXL_IOREG_READ(RMIXL_IO_DEV_BRIDGE + RMIXLS_SBC_PCIE_MEM_BAR);
DPRINTF((%s: PCIE_MEM_BAR %#x\n, __func__, bar));
if ((bar RMIXL_PCIE_MEM_BAR_ENB) == 0) {
u_long n = 256;/* 256 MB */
@@ -337,7 +343,7 @@
* get PCI IO space base [addr, size] from SBC PCIe IO BAR
* initialize it if necessary
*/
- bar = RMIXL_IOREG_READ(RMIXL_IO_DEV_BRIDGE + RMIXL_SBC_PCIE_IO_BAR);
+ bar = RMIXL_IOREG_READ(RMIXL_IO_DEV_BRIDGE + RMIXLS_SBC_PCIE_IO_BAR);
DPRINTF((%s: PCIE_IO_BAR %#x\n, __func__, bar));
if ((bar RMIXL_PCIE_IO_BAR_ENB) == 0) {
u_long n = 32;/* 32 MB */
@@ -349,17 +355,17 @@
/*
* initialize the PCI CFG, ECFG bus space tags
*/
- rmixl_pcie_cfg_bus_mem_init(rcp-rc_pcie_cfg_memt, rcp);
- sc-sc_pcie_cfg_memt = rcp-rc_pcie_cfg_memt;
+ rmixl_pci_cfg_bus_mem_init(rcp-rc_pci_cfg_memt, rcp);
+
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Wed Apr 7 19:26:32 UTC 2010
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_pcievar.h
Log Message:
- rename bus space related fields in rmixl_pcie_softc
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.5 -r1.1.2.6 src/sys/arch/mips/rmi/rmixl_pcievar.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_pcievar.h
diff -u src/sys/arch/mips/rmi/rmixl_pcievar.h:1.1.2.5 src/sys/arch/mips/rmi/rmixl_pcievar.h:1.1.2.6
--- src/sys/arch/mips/rmi/rmixl_pcievar.h:1.1.2.5 Mon Mar 29 23:32:42 2010
+++ src/sys/arch/mips/rmi/rmixl_pcievar.h Wed Apr 7 19:26:32 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_pcievar.h,v 1.1.2.5 2010/03/29 23:32:42 cliff Exp $ */
+/* $NetBSD: rmixl_pcievar.h,v 1.1.2.6 2010/04/07 19:26:32 cliff Exp $ */
#ifndef _MIPS_RMI_PCIE_VAR_H_
#define _MIPS_RMI_PCIE_VAR_H_
@@ -49,8 +49,8 @@
typedef struct rmixl_pcie_softc {
device_t sc_dev;
struct mips_pci_chipset sc_pci_chipset;
- bus_space_tag_t sc_pcie_cfg_memt;
- bus_space_tag_t sc_pcie_ecfg_memt;
+ bus_space_tag_t sc_pci_cfg_memt;
+ bus_space_tag_t sc_pci_ecfg_memt;
bus_dma_tag_t sc_29bit_dmat;
bus_dma_tag_t sc_32bit_dmat;
bus_dma_tag_t sc_64bit_dmat;
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: cliff Date: Wed Apr 7 19:30:11 UTC 2010 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_pcie_cfg_space.c rmixl_pcie_ecfg_space.c rmixl_pcie_io_space.c rmixl_pcie_mem_space.c Log Message: - these bus spaces can be used by pcix or pcie interfaces, use names changed to reflet that - also these files will soon be renamed accordingly To generate a diff of this commit: cvs rdiff -u -r1.1.2.2 -r1.1.2.3 src/sys/arch/mips/rmi/rmixl_pcie_cfg_space.c \ src/sys/arch/mips/rmi/rmixl_pcie_ecfg_space.c \ src/sys/arch/mips/rmi/rmixl_pcie_io_space.c \ src/sys/arch/mips/rmi/rmixl_pcie_mem_space.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixl_pcie_cfg_space.c diff -u src/sys/arch/mips/rmi/rmixl_pcie_cfg_space.c:1.1.2.2 src/sys/arch/mips/rmi/rmixl_pcie_cfg_space.c:1.1.2.3 --- src/sys/arch/mips/rmi/rmixl_pcie_cfg_space.c:1.1.2.2 Wed Nov 18 01:16:07 2009 +++ src/sys/arch/mips/rmi/rmixl_pcie_cfg_space.c Wed Apr 7 19:30:11 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: rmixl_pcie_cfg_space.c,v 1.1.2.2 2009/11/18 01:16:07 cliff Exp $ */ +/* $NetBSD: rmixl_pcie_cfg_space.c,v 1.1.2.3 2010/04/07 19:30:11 cliff Exp $ */ /*- * Copyright (c) 2001 The NetBSD Foundation, Inc. @@ -35,7 +35,7 @@ */ #include sys/cdefs.h -__KERNEL_RCSID(0, $NetBSD: rmixl_pcie_cfg_space.c,v 1.1.2.2 2009/11/18 01:16:07 cliff Exp $); +__KERNEL_RCSID(0, $NetBSD: rmixl_pcie_cfg_space.c,v 1.1.2.3 2010/04/07 19:30:11 cliff Exp $); #include sys/types.h #include sys/param.h @@ -45,20 +45,20 @@ #include mips/rmi/rmixlreg.h #include mips/rmi/rmixlvar.h -#define CHIP rmixl_pcie_cfg +#define CHIP rmixl_pci_cfg #define CHIP_MEM /* defined */ #define CHIP_ACCESS_SIZE 1 #define CHIP_LITTLE_ENDIAN #define CHIP_EX_MALLOC_SAFE(v) (((struct rmixl_config *)(v))-rc_mallocsafe) -#define CHIP_EXTENT(v) (((struct rmixl_config *)(v))-rc_pcie_cfg_ex) +#define CHIP_EXTENT(v) (((struct rmixl_config *)(v))-rc_pci_cfg_ex) /* MEM region 1 */ #define CHIP_W1_BUS_START(v) \ - (((struct rmixl_config *)(v))-rc_pcie_cfg_pbase) + (((struct rmixl_config *)(v))-rc_pci_cfg_pbase) #define CHIP_W1_BUS_END(v) \ (CHIP_W1_SYS_START(v) + \ - (((struct rmixl_config *)(v))-rc_pcie_cfg_size) - 1) + (((struct rmixl_config *)(v))-rc_pci_cfg_size) - 1) #define CHIP_W1_SYS_START(v) CHIP_W1_BUS_START(v) #define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v) Index: src/sys/arch/mips/rmi/rmixl_pcie_ecfg_space.c diff -u src/sys/arch/mips/rmi/rmixl_pcie_ecfg_space.c:1.1.2.2 src/sys/arch/mips/rmi/rmixl_pcie_ecfg_space.c:1.1.2.3 --- src/sys/arch/mips/rmi/rmixl_pcie_ecfg_space.c:1.1.2.2 Wed Nov 18 01:16:07 2009 +++ src/sys/arch/mips/rmi/rmixl_pcie_ecfg_space.c Wed Apr 7 19:30:11 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: rmixl_pcie_ecfg_space.c,v 1.1.2.2 2009/11/18 01:16:07 cliff Exp $ */ +/* $NetBSD: rmixl_pcie_ecfg_space.c,v 1.1.2.3 2010/04/07 19:30:11 cliff Exp $ */ /*- * Copyright (c) 2001 The NetBSD Foundation, Inc. @@ -35,7 +35,7 @@ */ #include sys/cdefs.h -__KERNEL_RCSID(0, $NetBSD: rmixl_pcie_ecfg_space.c,v 1.1.2.2 2009/11/18 01:16:07 cliff Exp $); +__KERNEL_RCSID(0, $NetBSD: rmixl_pcie_ecfg_space.c,v 1.1.2.3 2010/04/07 19:30:11 cliff Exp $); #include sys/types.h #include sys/param.h @@ -45,20 +45,20 @@ #include mips/rmi/rmixlreg.h #include mips/rmi/rmixlvar.h -#define CHIP rmixl_pcie_ecfg +#define CHIP rmixl_pci_ecfg #define CHIP_MEM /* defined */ #define CHIP_ACCESS_SIZE 1 #define CHIP_LITTLE_ENDIAN #define CHIP_EX_MALLOC_SAFE(v) (((struct rmixl_config *)(v))-rc_mallocsafe) -#define CHIP_EXTENT(v) (((struct rmixl_config *)(v))-rc_pcie_ecfg_ex) +#define CHIP_EXTENT(v) (((struct rmixl_config *)(v))-rc_pci_ecfg_ex) /* MEM region 1 */ #define CHIP_W1_BUS_START(v) \ - (((struct rmixl_config *)(v))-rc_pcie_ecfg_pbase) + (((struct rmixl_config *)(v))-rc_pci_ecfg_pbase) #define CHIP_W1_BUS_END(v) \ (CHIP_W1_SYS_START(v) + \ - (((struct rmixl_config *)(v))-rc_pcie_ecfg_size) - 1) + (((struct rmixl_config *)(v))-rc_pci_ecfg_size) - 1) #define CHIP_W1_SYS_START(v) CHIP_W1_BUS_START(v) #define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v) Index: src/sys/arch/mips/rmi/rmixl_pcie_io_space.c diff -u src/sys/arch/mips/rmi/rmixl_pcie_io_space.c:1.1.2.2 src/sys/arch/mips/rmi/rmixl_pcie_io_space.c:1.1.2.3 --- src/sys/arch/mips/rmi/rmixl_pcie_io_space.c:1.1.2.2 Wed Nov 18 01:16:07 2009 +++ src/sys/arch/mips/rmi/rmixl_pcie_io_space.c Wed Apr 7 19:30:11 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: rmixl_pcie_io_space.c,v 1.1.2.2 2009/11/18 01:16:07 cliff Exp $ */ +/* $NetBSD: rmixl_pcie_io_space.c,v 1.1.2.3 2010/04/07 19:30:11 cliff Exp $ */ /*- * Copyright (c) 2001 The NetBSD Foundation, Inc. @@ -35,7 +35,7 @@ */ #include sys/cdefs.h -__KERNEL_RCSID(0, $NetBSD: rmixl_pcie_io_space.c,v 1.1.2.2 2009/11/18 01:16:07 cliff Exp $); +__KERNEL_RCSID(0, $NetBSD:
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Mon Mar 29 23:31:38 UTC 2010
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixlvar.h
Log Message:
- add inline cpu_rmixl_chip_type()
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.15 -r1.1.2.16 src/sys/arch/mips/rmi/rmixlvar.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixlvar.h
diff -u src/sys/arch/mips/rmi/rmixlvar.h:1.1.2.15 src/sys/arch/mips/rmi/rmixlvar.h:1.1.2.16
--- src/sys/arch/mips/rmi/rmixlvar.h:1.1.2.15 Sun Mar 21 21:56:50 2010
+++ src/sys/arch/mips/rmi/rmixlvar.h Mon Mar 29 23:31:38 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixlvar.h,v 1.1.2.15 2010/03/21 21:56:50 cliff Exp $ */
+/* $NetBSD: rmixlvar.h,v 1.1.2.16 2010/03/29 23:31:38 cliff Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -81,6 +81,12 @@
return false;
}
+static inline int
+cpu_rmixl_chip_type(const struct pridtab *ct)
+{
+ return ct-cpu_cidflags MIPS_CIDFL_RMI_TYPE;
+}
+
typedef enum {
PSB_TYPE_UNKNOWN=0,
PSB_TYPE_RMI,
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Mon Mar 29 23:32:21 UTC 2010
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_pcie.c
Log Message:
- rmixl_physaddr_init_pcie discovers PCIE physical address regions from BARs
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.9 -r1.1.2.10 src/sys/arch/mips/rmi/rmixl_pcie.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_pcie.c
diff -u src/sys/arch/mips/rmi/rmixl_pcie.c:1.1.2.9 src/sys/arch/mips/rmi/rmixl_pcie.c:1.1.2.10
--- src/sys/arch/mips/rmi/rmixl_pcie.c:1.1.2.9 Sun Mar 21 21:27:48 2010
+++ src/sys/arch/mips/rmi/rmixl_pcie.c Mon Mar 29 23:32:21 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_pcie.c,v 1.1.2.9 2010/03/21 21:27:48 cliff Exp $ */
+/* $NetBSD: rmixl_pcie.c,v 1.1.2.10 2010/03/29 23:32:21 cliff Exp $ */
/*
* Copyright (c) 2001 Wasabi Systems, Inc.
@@ -40,7 +40,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_pcie.c,v 1.1.2.9 2010/03/21 21:27:48 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_pcie.c,v 1.1.2.10 2010/03/29 23:32:21 cliff Exp $);
#include opt_pci.h
#include pci.h
@@ -1420,3 +1420,66 @@
panic(%s\n, __func__);
}
+
+/*
+ * rmixl_physaddr_init_pcie:
+ * called from rmixl_physaddr_init to get region addrs sizes
+ * from PCIE CFG, ECFG, IO, MEM BARs
+ */
+void
+rmixl_physaddr_init_pcie(struct extent *ext)
+{
+ u_long base;
+ u_long size;
+ uint32_t r;
+
+ r = RMIXL_IOREG_READ(RMIXL_SBC_PCIE_CFG_BAR);
+ if ((r RMIXL_PCIE_CFG_BAR_ENB) != 0) {
+ base = (u_long)(RMIXL_PCIE_CFG_BAR_TO_BA((uint64_t)r)
+ / (1024 * 1024));
+ size = (u_long)RMIXL_PCIE_CFG_SIZE / (1024 * 1024);
+ DPRINTF((%s: %d: %s: 0x%08x -- 0x%010lx:%ld MB\n, __func__,
+ __LINE__, CFG, r, base * 1024 * 1024, size));
+ if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
+ panic(%s: extent_alloc_region(%p, %#lx, %#lx, %#x)
+failed, __func__, ext, base, size, EX_NOWAIT);
+ }
+
+ r = RMIXL_IOREG_READ(RMIXL_SBC_PCIE_ECFG_BAR);
+ if ((r RMIXL_PCIE_ECFG_BAR_ENB) != 0) {
+ base = (u_long)(RMIXL_PCIE_ECFG_BAR_TO_BA((uint64_t)r)
+ / (1024 * 1024));
+ size = (u_long)RMIXL_PCIE_ECFG_SIZE / (1024 * 1024);
+ DPRINTF((%s: %d: %s: 0x%08x -- 0x%010lx:%ld MB\n, __func__,
+ __LINE__, ECFG, r, base * 1024 * 1024, size));
+ if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
+ panic(%s: extent_alloc_region(%p, %#lx, %#lx, %#x)
+failed, __func__, ext, base, size, EX_NOWAIT);
+ }
+
+ r = RMIXL_IOREG_READ(RMIXL_SBC_PCIE_MEM_BAR);
+ if ((r RMIXL_PCIE_MEM_BAR_ENB) != 0) {
+ base = (u_long)(RMIXL_PCIE_MEM_BAR_TO_BA((uint64_t)r)
+ / (1024 * 1024));
+ size = (u_long)(RMIXL_PCIE_MEM_BAR_TO_SIZE((uint64_t)r)
+ / (1024 * 1024));
+ DPRINTF((%s: %d: %s: 0x%08x -- 0x%010lx:%ld MB\n, __func__,
+ __LINE__, MEM, r, base * 1024 * 1024, size));
+ if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
+ panic(%s: extent_alloc_region(%p, %#lx, %#lx, %#x)
+failed, __func__, ext, base, size, EX_NOWAIT);
+ }
+
+ r = RMIXL_IOREG_READ(RMIXL_SBC_PCIE_IO_BAR);
+ if ((r RMIXL_PCIE_IO_BAR_ENB) != 0) {
+ base = (u_long)(RMIXL_PCIE_IO_BAR_TO_BA((uint64_t)r)
+ / (1024 * 1024));
+ size = (u_long)(RMIXL_PCIE_IO_BAR_TO_SIZE((uint64_t)r)
+ / (1024 * 1024));
+ DPRINTF((%s: %d: %s: 0x%08x -- 0x%010lx:%ld MB\n, __func__,
+ __LINE__, IO, r, base * 1024 * 1024, size));
+ if (extent_alloc_region(ext, base, size, EX_NOWAIT) != 0)
+ panic(%s: extent_alloc_region(%p, %#lx, %#lx, %#x)
+failed, __func__, ext, base, size, EX_NOWAIT);
+ }
+}
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: cliff Date: Mon Mar 29 23:32:42 UTC 2010 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_pcievar.h Log Message: - add extern decl/prototype for rmixl_physaddr_init_pcie() To generate a diff of this commit: cvs rdiff -u -r1.1.2.4 -r1.1.2.5 src/sys/arch/mips/rmi/rmixl_pcievar.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixl_pcievar.h diff -u src/sys/arch/mips/rmi/rmixl_pcievar.h:1.1.2.4 src/sys/arch/mips/rmi/rmixl_pcievar.h:1.1.2.5 --- src/sys/arch/mips/rmi/rmixl_pcievar.h:1.1.2.4 Sun Mar 21 21:27:27 2010 +++ src/sys/arch/mips/rmi/rmixl_pcievar.h Mon Mar 29 23:32:42 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: rmixl_pcievar.h,v 1.1.2.4 2010/03/21 21:27:27 cliff Exp $ */ +/* $NetBSD: rmixl_pcievar.h,v 1.1.2.5 2010/03/29 23:32:42 cliff Exp $ */ #ifndef _MIPS_RMI_PCIE_VAR_H_ #define _MIPS_RMI_PCIE_VAR_H_ @@ -60,5 +60,8 @@ rmixl_pcie_link_intr_t sc_link_intr[RMIXL_PCIE_NLINKS_MAX]; } rmixl_pcie_softc_t; + +extern void rmixl_physaddr_init_pcie(struct extent *); + #endif /* _MIPS_RMI_PCIE_VAR_H_ */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: cliff Date: Mon Mar 29 23:34:09 UTC 2010 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_fmnvar.h Log Message: - logical station names are now chip-type-specific - RMIXL_FMN_NSTID is the max number of station for any RMIXL chip type To generate a diff of this commit: cvs rdiff -u -r1.1.2.1 -r1.1.2.2 src/sys/arch/mips/rmi/rmixl_fmnvar.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixl_fmnvar.h diff -u src/sys/arch/mips/rmi/rmixl_fmnvar.h:1.1.2.1 src/sys/arch/mips/rmi/rmixl_fmnvar.h:1.1.2.2 --- src/sys/arch/mips/rmi/rmixl_fmnvar.h:1.1.2.1 Sun Mar 21 20:41:43 2010 +++ src/sys/arch/mips/rmi/rmixl_fmnvar.h Mon Mar 29 23:34:09 2010 @@ -1,4 +1,4 @@ -/* $Id: rmixl_fmnvar.h,v 1.1.2.1 2010/03/21 20:41:43 cliff Exp $ */ +/* $Id: rmixl_fmnvar.h,v 1.1.2.2 2010/03/29 23:34:09 cliff Exp $ */ #ifndef _ARCH_MIPS_RMIXL_RMIXL_FMNVAR_H_ #define _ARCH_MIPS_RMIXL_RMIXL_FMNVAR_H_ @@ -199,21 +199,54 @@ } /* - * logical station IDs - * see Table 12.1 in the XLS PRM + * logical station IDs for RMI XLR + * see Table 13.2 Addressable Buckets in the XLR PRM */ -#define RMIXL_FMN_STID_CORE0 0 -#define RMIXL_FMN_STID_CORE1 1 -#define RMIXL_FMN_STID_CORE2 2 -#define RMIXL_FMN_STID_CORE3 3 -#define RMIXL_FMN_STID_GMAC_Q0 4 -#define RMIXL_FMN_STID_GMAC_Q1 5 -#define RMIXL_FMN_STID_DMA 6 -#define RMIXL_FMN_STID_CDE 7 -#define RMIXL_FMN_STID_PCIE 8 -#define RMIXL_FMN_STID_SAE 9 -#define RMIXL_FMN_NSTID (RMIXL_FMN_STID_SAE+1) -#define RMIXL_FMN_STID_RESERVED -1 +#define RMIXLR_FMN_STID_CORE0 0 +#define RMIXLR_FMN_STID_CORE1 1 +#define RMIXLR_FMN_STID_CORE2 2 +#define RMIXLR_FMN_STID_CORE3 3 +#define RMIXLR_FMN_STID_CORE4 4 +#define RMIXLR_FMN_STID_CORE5 5 +#define RMIXLR_FMN_STID_CORE6 6 +#define RMIXLR_FMN_STID_CORE7 7 +#define RMIXLR_FMN_STID_TXRX_0 8 +#define RMIXLR_FMN_STID_TXRX_1 9 +#define RMIXLR_FMN_STID_RGMII 10 +#define RMIXLR_FMN_STID_DMA 11 +#define RMIXLR_FMN_STID_FREE_0 12 +#define RMIXLR_FMN_STID_FREE_1 13 +#define RMIXLR_FMN_STID_SAE 14 +#define RMIXLR_FMN_NSTID (RMIXLR_FMN_STID_SAE+1) +#define RMIXLR_FMN_STID_RESERVED -1 + +/* + * logical station IDs for RMI XLS + * see Table 12.1 Stations and Addressable Buckets ... in the XLS PRM + */ +#define RMIXLS_FMN_STID_CORE0 0 +#define RMIXLS_FMN_STID_CORE1 1 +#define RMIXLS_FMN_STID_CORE2 2 +#define RMIXLS_FMN_STID_CORE3 3 +#define RMIXLS_FMN_STID_GMAC_Q0 4 +#define RMIXLS_FMN_STID_GMAC_Q1 5 +#define RMIXLS_FMN_STID_DMA 6 +#define RMIXLS_FMN_STID_CDE 7 +#define RMIXLS_FMN_STID_PCIE 8 +#define RMIXLS_FMN_STID_SAE 9 +#define RMIXLS_FMN_NSTID (RMIXLS_FMN_STID_SAE+1) +#define RMIXLS_FMN_STID_RESERVED -1 + +/* + * logical station IDs for RMI XLP + * TBD! + */ +#define RMIXLP_FMN_NSTID 0 /* XXX */ + + +#define RMIXL_FMN_NSTID \ + MAX(MAX(RMIXLR_FMN_NSTID, RMIXLS_FMN_NSTID), RMIXLP_FMN_NSTID) + #define RMIXL_FMN_INTR_IPL IPL_HIGH
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Mon Mar 29 23:34:32 UTC 2010
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_fmn.c
Log Message:
- use the new chip-type-specific names for logical station IDs
- dimension fmn_intrhand[] by max number of station for any RMIXL chip type
- add FMN station tables and info for XLR; these are untested.
- rmixl_fmn_init_core() now calls chip-type-specific init subfunctions
which just grab the appropriate station table and info strutures.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.1 -r1.1.2.2 src/sys/arch/mips/rmi/rmixl_fmn.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_fmn.c
diff -u src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.1 src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.2
--- src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.1 Sun Mar 21 20:41:43 2010
+++ src/sys/arch/mips/rmi/rmixl_fmn.c Mon Mar 29 23:34:32 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_fmn.c,v 1.1.2.1 2010/03/21 20:41:43 cliff Exp $ */
+/* $NetBSD: rmixl_fmn.c,v 1.1.2.2 2010/03/29 23:34:32 cliff Exp $ */
#include opt_ddb.h
@@ -31,68 +31,89 @@
*/
/* use this table for XLS6xx, XLS4xx */
static const int station_xls_4xx[] = {
- [0 ... 7] = RMIXL_FMN_STID_CORE0,
- [8 ... 15] = RMIXL_FMN_STID_CORE1,
- [16 ... 23] = RMIXL_FMN_STID_CORE2,
- [24 ... 31] = RMIXL_FMN_STID_CORE3,
- [32 ... 63] = RMIXL_FMN_STID_RESERVED,
- [64 ... 71] = RMIXL_FMN_STID_PCIE,
- [72 ... 79] = RMIXL_FMN_STID_RESERVED,
- [80 ... 87] = RMIXL_FMN_STID_GMAC_Q1,
- [88 ... 95] = RMIXL_FMN_STID_RESERVED,
- [96 ... 103] = RMIXL_FMN_STID_GMAC_Q0,
- [104 ... 107] = RMIXL_FMN_STID_DMA,
- [108 ... 109] = RMIXL_FMN_STID_CDE,
- [110 ... 119] = RMIXL_FMN_STID_RESERVED,
- [120 ... 127] = RMIXL_FMN_STID_SAE,
+ [0 ... 7] = RMIXLS_FMN_STID_CORE0,
+ [8 ... 15] = RMIXLS_FMN_STID_CORE1,
+ [16 ... 23] = RMIXLS_FMN_STID_CORE2,
+ [24 ... 31] = RMIXLS_FMN_STID_CORE3,
+ [32 ... 63] = RMIXLS_FMN_STID_RESERVED,
+ [64 ... 71] = RMIXLS_FMN_STID_PCIE,
+ [72 ... 79] = RMIXLS_FMN_STID_RESERVED,
+ [80 ... 87] = RMIXLS_FMN_STID_GMAC_Q1,
+ [88 ... 95] = RMIXLS_FMN_STID_RESERVED,
+ [96 ... 103] = RMIXLS_FMN_STID_GMAC_Q0,
+ [104 ... 107] = RMIXLS_FMN_STID_DMA,
+ [108 ... 109] = RMIXLS_FMN_STID_CDE,
+ [110 ... 119] = RMIXLS_FMN_STID_RESERVED,
+ [120 ... 127] = RMIXLS_FMN_STID_SAE,
};
/* use this table for XLS408Lite, XLS404Lite */
static const int station_xls_4xx_lite[] = {
- [0 ... 7] = RMIXL_FMN_STID_CORE0,
- [8 ... 15] = RMIXL_FMN_STID_CORE1,
- [16 ... 23] = RMIXL_FMN_STID_CORE2,
- [24 ... 31] = RMIXL_FMN_STID_CORE3,
- [32 ... 79] = RMIXL_FMN_STID_RESERVED,
- [80 ... 87] = RMIXL_FMN_STID_GMAC_Q1,
- [88 ... 95] = RMIXL_FMN_STID_RESERVED,
- [96 ... 103] = RMIXL_FMN_STID_GMAC_Q0,
- [104 ... 107] = RMIXL_FMN_STID_DMA,
- [108 ... 109] = RMIXL_FMN_STID_CDE,
- [110 ... 115] = RMIXL_FMN_STID_RESERVED,
- [116 ... 119] = RMIXL_FMN_STID_PCIE,
- [120 ... 127] = RMIXL_FMN_STID_SAE,
+ [0 ... 7] = RMIXLS_FMN_STID_CORE0,
+ [8 ... 15] = RMIXLS_FMN_STID_CORE1,
+ [16 ... 23] = RMIXLS_FMN_STID_CORE2,
+ [24 ... 31] = RMIXLS_FMN_STID_CORE3,
+ [32 ... 79] = RMIXLS_FMN_STID_RESERVED,
+ [80 ... 87] = RMIXLS_FMN_STID_GMAC_Q1,
+ [88 ... 95] = RMIXLS_FMN_STID_RESERVED,
+ [96 ... 103] = RMIXLS_FMN_STID_GMAC_Q0,
+ [104 ... 107] = RMIXLS_FMN_STID_DMA,
+ [108 ... 109] = RMIXLS_FMN_STID_CDE,
+ [110 ... 115] = RMIXLS_FMN_STID_RESERVED,
+ [116 ... 119] = RMIXLS_FMN_STID_PCIE,
+ [120 ... 127] = RMIXLS_FMN_STID_SAE,
};
/* use this table for XLS2xx */
static const int station_xls_2xx[] = {
- [0 ... 7] = RMIXL_FMN_STID_CORE0,
- [8 ... 15] = RMIXL_FMN_STID_CORE1,
- [16 ... 23] = RMIXL_FMN_STID_CORE2,
- [24 ... 31] = RMIXL_FMN_STID_CORE3,
- [32 ... 63] = RMIXL_FMN_STID_RESERVED,
- [64 ... 71] = RMIXL_FMN_STID_PCIE,
- [72 ... 95] = RMIXL_FMN_STID_RESERVED,
- [96 ... 103] = RMIXL_FMN_STID_GMAC_Q0,
- [104 ... 107] = RMIXL_FMN_STID_DMA,
- [108 ... 119] = RMIXL_FMN_STID_RESERVED,
- [120 ... 127] = RMIXL_FMN_STID_SAE,
+ [0 ... 7] = RMIXLS_FMN_STID_CORE0,
+ [8 ... 15] = RMIXLS_FMN_STID_CORE1,
+ [16 ... 23] = RMIXLS_FMN_STID_CORE2,
+ [24 ... 31] = RMIXLS_FMN_STID_CORE3,
+ [32 ... 63] = RMIXLS_FMN_STID_RESERVED,
+ [64 ... 71] = RMIXLS_FMN_STID_PCIE,
+ [72 ... 95] = RMIXLS_FMN_STID_RESERVED,
+ [96 ... 103] = RMIXLS_FMN_STID_GMAC_Q0,
+ [104 ... 107] = RMIXLS_FMN_STID_DMA,
+ [108 ... 119] = RMIXLS_FMN_STID_RESERVED,
+ [120 ... 127] = RMIXLS_FMN_STID_SAE,
};
/* use this table for XLS1xx */
static const int station_xls_1xx[] = {
- [0 ... 7] = RMIXL_FMN_STID_CORE0,
- [8 ... 15] = RMIXL_FMN_STID_CORE1,
- [16 ... 23] = RMIXL_FMN_STID_CORE2,
- [24 ... 31] = RMIXL_FMN_STID_CORE3,
- [32 ... 63] = RMIXL_FMN_STID_RESERVED,
- [64 ... 71] = RMIXL_FMN_STID_PCIE,
- [72 ... 95] = RMIXL_FMN_STID_RESERVED,
- [96 ... 101] = RMIXL_FMN_STID_GMAC_Q0,
- [102 ... 103] = RMIXL_FMN_STID_RESERVED,
- [104 ... 107] = RMIXL_FMN_STID_DMA,
- [108 ... 119] =
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Mon Mar 29 23:34:58 UTC 2010
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_cpu.c
Log Message:
- cpu_setup_trampoline_fmn() is #ifdef NOTYET until we make it work...
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.8 -r1.1.2.9 src/sys/arch/mips/rmi/rmixl_cpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_cpu.c
diff -u src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.8 src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.9
--- src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.8 Mon Mar 22 07:45:48 2010
+++ src/sys/arch/mips/rmi/rmixl_cpu.c Mon Mar 29 23:34:57 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_cpu.c,v 1.1.2.8 2010/03/22 07:45:48 cliff Exp $ */
+/* $NetBSD: rmixl_cpu.c,v 1.1.2.9 2010/03/29 23:34:57 cliff Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -38,7 +38,7 @@
#include locators.h
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_cpu.c,v 1.1.2.8 2010/03/22 07:45:48 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_cpu.c,v 1.1.2.9 2010/03/29 23:34:57 cliff Exp $);
#include sys/param.h
#include sys/device.h
@@ -326,7 +326,6 @@
}
#endif /* NOTYET */
-static uint64_t argv[4] = { 0x1234, 0x2345, 0x3456, 0x4567 }; /* XXX TMP */
static void
cpu_setup_trampoline_callback(struct device *self, struct cpu_info *ci)
@@ -398,9 +397,11 @@
static void
cpu_setup_trampoline_fmn(struct device *self, struct cpu_info *ci)
{
+#ifdef NOTYET
rmixl_fmn_msg_t msg;
intptr_t sp;
extern void rmixl_cpu_trampoline(void *);
+ static const uint64_t argv[4] = { 0x1234, 0x2345, 0x3456, 0x4567 }; /* XXX TMP */
sp = (intptr_t)malloc(4096, M_DEVBUF, M_NOWAIT);
if (sp == 0)
@@ -418,6 +419,7 @@
rmixl_fmn_msg_send(4, RMIXL_FMN_CODE_PSB_WAKEUP,
RMIXL_FMN_CORE_DESTID(ci-ci_cpuid, 0), msg); /* XXX FIXME */
+#endif
}
#ifdef DEBUG
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Mon Mar 29 23:35:25 UTC 2010
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_intr.c
Log Message:
- add IRT-based interrupt names for XLR
- rmixl_intr_string() calls chip-type-specific functions
to get appropriate names table
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.15 -r1.1.2.16 src/sys/arch/mips/rmi/rmixl_intr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_intr.c
diff -u src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.15 src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.16
--- src/sys/arch/mips/rmi/rmixl_intr.c:1.1.2.15 Sun Mar 21 21:25:30 2010
+++ src/sys/arch/mips/rmi/rmixl_intr.c Mon Mar 29 23:35:24 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_intr.c,v 1.1.2.15 2010/03/21 21:25:30 cliff Exp $ */
+/* $NetBSD: rmixl_intr.c,v 1.1.2.16 2010/03/29 23:35:24 cliff Exp $ */
/*-
* Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
@@ -64,7 +64,7 @@
*/
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.15 2010/03/21 21:25:30 cliff Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_intr.c,v 1.1.2.16 2010/03/29 23:35:24 cliff Exp $);
#include opt_ddb.h
#define __INTR_PRIVATE
@@ -120,6 +120,45 @@
*/
/*
+ * rmixl_irtnames_xlrxxx
+ * - use for XLRxxx
+ */
+static const char * const rmixl_irtnames_xlrxxx[NIRTS] = {
+ int 0 (watchdog), /* 0 */
+ int 1 (timer0), /* 1 */
+ int 2 (timer1), /* 2 */
+ int 3 (timer2), /* 3 */
+ int 4 (timer3), /* 4 */
+ int 5 (timer4), /* 5 */
+ int 6 (timer5), /* 6 */
+ int 7 (timer6), /* 7 */
+ int 8 (timer7), /* 8 */
+ int 9 (uart0), /* 9 */
+ int 10 (uart1), /* 10 */
+ int 11 (i2c0), /* 11 */
+ int 12 (i2c1), /* 12 */
+ int 13 (pcmcia), /* 13 */
+ int 14 (gpio), /* 14 */
+ int 15 (hyper), /* 15 */
+ int 16 (pcix), /* 16 */
+ int 17 (gmac0), /* 17 */
+ int 18 (gmac1), /* 18 */
+ int 19 (gmac2), /* 19 */
+ int 20 (gmac3), /* 20 */
+ int 21 (xgs0), /* 21 */
+ int 22 (xgs1), /* 22 */
+ int 23 (irq23), /* 23 */
+ int 24 (hyper_fatal), /* 24 */
+ int 25 (bridge_aerr), /* 25 */
+ int 26 (bridge_berr), /* 26 */
+ int 27 (bridge_tb), /* 27 */
+ int 28 (bridge_nmi), /* 28 */
+ int 29 (bridge_sram_derr), /* 29 */
+ int 30 (gpio_fatal), /* 30 */
+ int 31 (reserved), /* 31 */
+};
+
+/*
* rmixl_irtnames_xls1xx
* - use for XLS1xx, XLS2xx, XLS4xx-Lite
*/
@@ -282,6 +321,9 @@
#endif
+static const char *rmixl_intr_string_xlr(int);
+static const char *rmixl_intr_string_xls(int);
+static uint32_t rmixl_irt_thread_mask(int);
static void rmixl_irt_init(int);
static void rmixl_irt_disestablish(int);
static void rmixl_irt_establish(int, int,
@@ -329,7 +371,8 @@
{
uint32_t r;
- KASSERT(cpu_rmixls(mips_options.mips_cpu));
+ KASSERT(cpu_rmixlr(mips_options.mips_cpu)
+ || cpu_rmixls(mips_options.mips_cpu));
#ifdef IOINTR_DEBUG
printf(IPL_NONE=%d, mask %#PRIx64\n,
@@ -440,8 +483,6 @@
const char *
rmixl_intr_string(int irq)
{
- const char *name;
-
if (irq 0 || irq = NINTRVECS)
panic(%s: irq index %d out of range, max %d,
__func__, irq, NIRTS - 1);
@@ -449,6 +490,29 @@
if (irq = NIRTS)
return rmixl_vecnames_common[irq];
+ switch(cpu_rmixl_chip_type(mips_options.mips_cpu)) {
+ case CIDFL_RMI_TYPE_XLR:
+ return rmixl_intr_string_xlr(irq);
+ case CIDFL_RMI_TYPE_XLS:
+ return rmixl_intr_string_xls(irq);
+ case CIDFL_RMI_TYPE_XLP:
+ panic(%s: RMI XLP not yet supported, __func__);
+ }
+
+ return undefined; /* appease gcc */
+}
+
+static const char *
+rmixl_intr_string_xlr(int irq)
+{
+ return rmixl_irtnames_xlrxxx[irq];
+}
+
+static const char *
+rmixl_intr_string_xls(int irq)
+{
+ const char *name;
+
switch (MIPS_PRID_IMPL(mips_options.mips_cpu_id)) {
case MIPS_XLS104:
case MIPS_XLS108:
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: cliff Date: Wed Mar 24 19:14:09 UTC 2010 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixlreg.h Log Message: shift enable bits into correct field in RMIXL_PIC_CONTROL_TIMER_ENBn() macro To generate a diff of this commit: cvs rdiff -u -r1.1.2.9 -r1.1.2.10 src/sys/arch/mips/rmi/rmixlreg.h Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixlreg.h diff -u src/sys/arch/mips/rmi/rmixlreg.h:1.1.2.9 src/sys/arch/mips/rmi/rmixlreg.h:1.1.2.10 --- src/sys/arch/mips/rmi/rmixlreg.h:1.1.2.9 Sun Mar 21 21:30:35 2010 +++ src/sys/arch/mips/rmi/rmixlreg.h Wed Mar 24 19:14:09 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: rmixlreg.h,v 1.1.2.9 2010/03/21 21:30:35 cliff Exp $ */ +/* $NetBSD: rmixlreg.h,v 1.1.2.10 2010/03/24 19:14:09 cliff Exp $ */ /*- * Copyright (c) 2009 The NetBSD Foundation, Inc. @@ -453,7 +453,7 @@ #define RMIXL_PIC_CONTROL_GEN_NMIn(n) (((n) 1) RMIXL_PIC_CONTROL_GEN_NMI) #define RMIXL_PIC_CONTROL_RESa __BITS(7,3) #define RMIXL_PIC_CONTROL_TIMER_ENB __BITS(15,8) /* per-Timer enable bits */ -#define RMIXL_PIC_CONTROL_TIMER_ENBn(n) ((1 (n)) RMIXL_PIC_CONTROL_TIMER_ENB) +#define RMIXL_PIC_CONTROL_TIMER_ENBn(n) ((1 (8 + (n))) RMIXL_PIC_CONTROL_TIMER_ENB) #define RMIXL_PIC_CONTROL_RESb __BITS(31,16) #define RMIXL_PIC_CONTROL_RESV \ (RMIXL_PIC_CONTROL_RESa|RMIXL_PIC_CONTROL_RESb)
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: cliff Date: Mon Mar 22 07:45:19 UTC 2010 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_subr.S Log Message: - in rmixlfw_wakeup_cpu, properly nuke the upper half of sp before OR-ing in KSEG0_START. This is only needed in _LP64 case. - in rmixl_cpu_trampoline: trampoline args addr needs reconstructing the upper half only in _LP64 case. delete set of MIPS_SR_INT_IE bit. use REG_L instead of PTR_L to load trampoline args so we get 64 bit loads in both 32 and 64 bit kernels. To generate a diff of this commit: cvs rdiff -u -r1.1.2.5 -r1.1.2.6 src/sys/arch/mips/rmi/rmixl_subr.S Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixl_subr.S diff -u src/sys/arch/mips/rmi/rmixl_subr.S:1.1.2.5 src/sys/arch/mips/rmi/rmixl_subr.S:1.1.2.6 --- src/sys/arch/mips/rmi/rmixl_subr.S:1.1.2.5 Sun Mar 21 21:29:45 2010 +++ src/sys/arch/mips/rmi/rmixl_subr.S Mon Mar 22 07:45:19 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: rmixl_subr.S,v 1.1.2.5 2010/03/21 21:29:45 cliff Exp $ */ +/* $NetBSD: rmixl_subr.S,v 1.1.2.6 2010/03/22 07:45:19 cliff Exp $ */ #include opt_cputype.h #include opt_multiprocessor.h @@ -55,10 +55,14 @@ REG_S t0, CALLFRAME_SIZ+2*SZREG(sp) move s0, sp /* save sp */ - srl t0, sp, 0 /* nuke upper half */ +#ifdef _LP64 + dsll32 t0, sp, 0 /* nuke upper half */ + dsrl32 t0, t0, 0 /* */ li t1, MIPS_KSEG0_START + or sp, t0, t1 /* set MIPS_KSEG0_START */ +#endif jalr a3 /* callback to firmware */ - or sp, t0, t1 /* set MIPS_KSEG0_START */ + nop move sp, s0 /* restore sp */ REG_L t0, CALLFRAME_SIZ+2*SZREG(sp) @@ -77,13 +81,14 @@ NESTED(rmixl_cpu_trampoline, CALLFRAME_SIZ, ra) #ifdef _LP64 li t0, MIPS_SR_KX + li t1, MIPS_KSEG0_START /* reconstruct presumed upper half ... */ + or a0, a0, t1 /* ... of trampoline args addr */ #else li t0, 0 #endif mtc0 zero, $9, 7 /* disable all in MIPS_COP_0_EIMR */ - or t0, MIPS_SR_INT_IE mtc0 t0, MIPS_COP_0_STATUS /* ensure COP_0_EBASE field 'EBASE' is 0 */ @@ -91,26 +96,22 @@ and t0, t0, 0x3ff mtc0 t0, $15, 1 /* MIPS_COP_0_EBASE */ - /* XXX reconstruct presumed upper half of trampoline args addr */ - li t1, MIPS_KSEG0_START - or a0, a0, t1 - /* * load our stack pointer from trampoline args */ - PTR_L sp, 0*SZREG(a0) /* XXX ta_sp */ + REG_L sp, 0*SZREG(a0) /* XXX ta_sp */ /* * load our (idle) lwp from trampoline args * save in t8 reg dedicated as 'mips_curlwp' */ - PTR_L t8, 1*SZREG(a0) /* XXX ta_lwp */ + REG_L t8, 1*SZREG(a0) /* XXX ta_lwp */ /* * load our ta_cpuinfo from trampoline args and pass in a1 * jump to common mips cpu_trampoline */ - PTR_L a1, 2*SZREG(a0) /* XXX ta_cpuinfo */ + REG_L a1, 2*SZREG(a0) /* XXX ta_cpuinfo */ j cpu_trampoline mtc0 a1, $22, 0 /* MIPS_COP_0_OSSCRATCH */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: cliff Date: Mon Mar 22 07:45:49 UTC 2010 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_cpu.c Log Message: - in cpu_setup_trampoline_callback, add some DIAGNOSTIC checks, and make sure we get needed sign extension when storing 32 bit pointers into trampoline args structure. To generate a diff of this commit: cvs rdiff -u -r1.1.2.7 -r1.1.2.8 src/sys/arch/mips/rmi/rmixl_cpu.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixl_cpu.c diff -u src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.7 src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.8 --- src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.7 Sun Mar 21 22:03:16 2010 +++ src/sys/arch/mips/rmi/rmixl_cpu.c Mon Mar 22 07:45:48 2010 @@ -1,4 +1,4 @@ -/* $NetBSD: rmixl_cpu.c,v 1.1.2.7 2010/03/21 22:03:16 cliff Exp $ */ +/* $NetBSD: rmixl_cpu.c,v 1.1.2.8 2010/03/22 07:45:48 cliff Exp $ */ /* * Copyright 2002 Wasabi Systems, Inc. @@ -38,7 +38,7 @@ #include locators.h #include sys/cdefs.h -__KERNEL_RCSID(0, $NetBSD: rmixl_cpu.c,v 1.1.2.7 2010/03/21 22:03:16 cliff Exp $); +__KERNEL_RCSID(0, $NetBSD: rmixl_cpu.c,v 1.1.2.8 2010/03/22 07:45:48 cliff Exp $); #include sys/param.h #include sys/device.h @@ -338,6 +338,28 @@ struct rmixl_cpu_trampoline_args *ta = rmixl_cpu_trampoline_args; uintptr_t stacktop; +#ifdef DIAGNOSTIC + /* Ensure our current stack can be used by the firmware */ + uint64_t sp; + __asm__ volatile(move %0, $sp\n : =r(sp)); +#ifdef _LP64 + /* can be made into a KSEG0 addr */ + KASSERT(MIPS_XKPHYS_P(sp)); + KASSERT((MIPS_XKPHYS_TO_PHYS(sp) 32) == 0); +#else + /* is a KSEG0 addr */ + KASSERT(MIPS_KSEG0_P(sp)); +#endif /* _LP64 */ +#endif /* DIAGNOSTIC */ + +#ifndef _LP64 + /* + * Ensure 'ci' is a KSEG0 address for trampoline args + * to avoid TLB fault in cpu_trampoline() when loading ci_idlelwp + */ + KASSERT(MIPS_KSEG0_P(ci)); +#endif + /* * Ensure 'ta' is a KSEG0 address for trampoline args * to avoid TLB fault in trampoline when loading args. @@ -353,12 +375,14 @@ /* * marshall args for rmixl_cpu_trampoline, + * note for non-LP64 kernel, use of intptr_t + * forces sign extension of 32 bit pointers */ stacktop = (uintptr_t)l-l_addr + USPACE - sizeof(struct trapframe) - CALLFRAME_SIZ; - ta-ta_sp = (uint64_t)(uintptr_t)stacktop; - ta-ta_lwp = (uint64_t)(uintptr_t)l; - ta-ta_cpuinfo = (uint64_t)(uintptr_t)ci; + ta-ta_sp = (uint64_t)(intptr_t)stacktop; + ta-ta_lwp = (uint64_t)(intptr_t)l; + ta-ta_cpuinfo = (uint64_t)(intptr_t)ci; #if _LP64 wakeup_cpu = (void *)rmixl_configuration.rc_psb_info.wakeup;
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Sun Mar 21 19:28:01 UTC 2010
Added Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_intr.h
Log Message:
- added this file of RMI interrupt stuff
To generate a diff of this commit:
cvs rdiff -u -r0 -r1.1.2.1 src/sys/arch/mips/rmi/rmixl_intr.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Added files:
Index: src/sys/arch/mips/rmi/rmixl_intr.h
diff -u /dev/null src/sys/arch/mips/rmi/rmixl_intr.h:1.1.2.1
--- /dev/null Sun Mar 21 19:28:01 2010
+++ src/sys/arch/mips/rmi/rmixl_intr.h Sun Mar 21 19:28:01 2010
@@ -0,0 +1,68 @@
+/* $NetBSD: rmixl_intr.h,v 1.1.2.1 2010/03/21 19:28:01 cliff Exp $ */
+
+#ifndef _MIPS_RMI_RMIXL_INTR_H_
+#define _MIPS_RMI_RMIXL_INTR_H_
+
+/*
+ * An 'irq' is an EIRR bit numbers or 'vector' as used in the PRM
+ * - PIC-based irqs are in the range 0..31 and index into the IRT
+ * - IRT entry n always routes to vector n
+ * - non-PIC-based irqs are in the range 32..63
+ * - only 1 intrhand_t per irq/vector
+ */
+#define NINTRVECS 64 /* bit width of the EIRR */
+#define NIRTS 32 /* #entries in the Interrupt Redirection Table */
+
+/*
+ * reserved vectors =32
+ */
+#define RMIXL_INTRVEC_IPI 32
+#define RMIXL_INTRVEC_FMN 33
+
+typedef enum {
+ RMIXL_TRIG_NONE=0,
+ RMIXL_TRIG_EDGE,
+ RMIXL_TRIG_LEVEL,
+} rmixl_intr_trigger_t;
+
+typedef enum {
+ RMIXL_POLR_NONE=0,
+ RMIXL_POLR_RISING,
+ RMIXL_POLR_HIGH,
+ RMIXL_POLR_FALLING,
+ RMIXL_POLR_LOW,
+} rmixl_intr_polarity_t;
+
+
+/*
+ * iv_list and ref count manage sharing of each vector
+ */
+typedef struct rmixl_intrhand {
+int (*ih_func)(void *);
+void *ih_arg;
+int ih_irq; /* =32 if not-PIC-based */
+int ih_ipl; /* interrupt priority */
+int ih_cpumask; /* CPUs which may handle this irpt */
+} rmixl_intrhand_t;
+
+/*
+ * stuff exported from rmixl_spl.S
+ */
+extern const struct splsw rmixl_splsw;
+extern uint64_t ipl_eimr_map[];
+
+extern void *rmixl_intr_establish(int, int, int,
+ rmixl_intr_trigger_t, rmixl_intr_polarity_t,
+ int (*)(void *), void *);
+extern void rmixl_intr_disestablish(void *);
+extern void *rmixl_vec_establish(int, int, int,
+ int (*)(void *), void *);
+extern void rmixl_vec_disestablish(void *);
+extern const char *rmixl_intr_string(int);
+extern void rmixl_intr_init_cpu(struct cpu_info *);
+extern void *rmixl_intr_init_clk(void);
+#ifdef MULTIPROCESSOR
+extern void *rmixl_intr_init_ipi(void);
+#endif
+
+#endif /* _MIPS_RMI_RMIXL_INTR_H_ */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Sun Mar 21 20:41:43 UTC 2010
Added Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_fmn.c rmixl_fmnvar.h
Log Message:
add device driver for RMI Fast Message Network
To generate a diff of this commit:
cvs rdiff -u -r0 -r1.1.2.1 src/sys/arch/mips/rmi/rmixl_fmn.c \
src/sys/arch/mips/rmi/rmixl_fmnvar.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Added files:
Index: src/sys/arch/mips/rmi/rmixl_fmn.c
diff -u /dev/null src/sys/arch/mips/rmi/rmixl_fmn.c:1.1.2.1
--- /dev/null Sun Mar 21 20:41:43 2010
+++ src/sys/arch/mips/rmi/rmixl_fmn.c Sun Mar 21 20:41:43 2010
@@ -0,0 +1,1048 @@
+/* $NetBSD: rmixl_fmn.c,v 1.1.2.1 2010/03/21 20:41:43 cliff Exp $ */
+
+#include opt_ddb.h
+
+#include sys/cdefs.h
+#include sys/param.h
+#include sys/cpu.h
+#include mips/cpuregs.h
+#include mips/rmi/rmixlreg.h
+#include mips/rmi/rmixlvar.h
+#include mips/rmi/rmixl_intr.h
+#include mips/rmi/rmixl_fmnvar.h
+
+#ifdef FMN_DEBUG
+# define DPRINTF(x) do { printf x ; } while(0)
+#else
+# define DPRINTF(x)
+#endif
+
+#ifdef DIAGNOSTIC
+# define DIAG_PRF(x) do { printf x ; } while(0)
+#else
+# define DIAG_PRF(x)
+#endif
+
+
+
+/*
+ * index CPU-dependent table by (global) bucket ID to obtain logical Station ID
+ * see Table 12.1 in the XLS PRM
+ */
+/* use this table for XLS6xx, XLS4xx */
+static const int station_xls_4xx[] = {
+ [0 ... 7] = RMIXL_FMN_STID_CORE0,
+ [8 ... 15] = RMIXL_FMN_STID_CORE1,
+ [16 ... 23] = RMIXL_FMN_STID_CORE2,
+ [24 ... 31] = RMIXL_FMN_STID_CORE3,
+ [32 ... 63] = RMIXL_FMN_STID_RESERVED,
+ [64 ... 71] = RMIXL_FMN_STID_PCIE,
+ [72 ... 79] = RMIXL_FMN_STID_RESERVED,
+ [80 ... 87] = RMIXL_FMN_STID_GMAC_Q1,
+ [88 ... 95] = RMIXL_FMN_STID_RESERVED,
+ [96 ... 103] = RMIXL_FMN_STID_GMAC_Q0,
+ [104 ... 107] = RMIXL_FMN_STID_DMA,
+ [108 ... 109] = RMIXL_FMN_STID_CDE,
+ [110 ... 119] = RMIXL_FMN_STID_RESERVED,
+ [120 ... 127] = RMIXL_FMN_STID_SAE,
+};
+
+/* use this table for XLS408Lite, XLS404Lite */
+static const int station_xls_4xx_lite[] = {
+ [0 ... 7] = RMIXL_FMN_STID_CORE0,
+ [8 ... 15] = RMIXL_FMN_STID_CORE1,
+ [16 ... 23] = RMIXL_FMN_STID_CORE2,
+ [24 ... 31] = RMIXL_FMN_STID_CORE3,
+ [32 ... 79] = RMIXL_FMN_STID_RESERVED,
+ [80 ... 87] = RMIXL_FMN_STID_GMAC_Q1,
+ [88 ... 95] = RMIXL_FMN_STID_RESERVED,
+ [96 ... 103] = RMIXL_FMN_STID_GMAC_Q0,
+ [104 ... 107] = RMIXL_FMN_STID_DMA,
+ [108 ... 109] = RMIXL_FMN_STID_CDE,
+ [110 ... 115] = RMIXL_FMN_STID_RESERVED,
+ [116 ... 119] = RMIXL_FMN_STID_PCIE,
+ [120 ... 127] = RMIXL_FMN_STID_SAE,
+};
+
+/* use this table for XLS2xx */
+static const int station_xls_2xx[] = {
+ [0 ... 7] = RMIXL_FMN_STID_CORE0,
+ [8 ... 15] = RMIXL_FMN_STID_CORE1,
+ [16 ... 23] = RMIXL_FMN_STID_CORE2,
+ [24 ... 31] = RMIXL_FMN_STID_CORE3,
+ [32 ... 63] = RMIXL_FMN_STID_RESERVED,
+ [64 ... 71] = RMIXL_FMN_STID_PCIE,
+ [72 ... 95] = RMIXL_FMN_STID_RESERVED,
+ [96 ... 103] = RMIXL_FMN_STID_GMAC_Q0,
+ [104 ... 107] = RMIXL_FMN_STID_DMA,
+ [108 ... 119] = RMIXL_FMN_STID_RESERVED,
+ [120 ... 127] = RMIXL_FMN_STID_SAE,
+};
+
+/* use this table for XLS1xx */
+static const int station_xls_1xx[] = {
+ [0 ... 7] = RMIXL_FMN_STID_CORE0,
+ [8 ... 15] = RMIXL_FMN_STID_CORE1,
+ [16 ... 23] = RMIXL_FMN_STID_CORE2,
+ [24 ... 31] = RMIXL_FMN_STID_CORE3,
+ [32 ... 63] = RMIXL_FMN_STID_RESERVED,
+ [64 ... 71] = RMIXL_FMN_STID_PCIE,
+ [72 ... 95] = RMIXL_FMN_STID_RESERVED,
+ [96 ... 101] = RMIXL_FMN_STID_GMAC_Q0,
+ [102 ... 103] = RMIXL_FMN_STID_RESERVED,
+ [104 ... 107] = RMIXL_FMN_STID_DMA,
+ [108 ... 119] = RMIXL_FMN_STID_RESERVED,
+ [120 ... 127] = RMIXL_FMN_STID_SAE,
+};
+
+typedef struct fmn_station_info {
+ const char *si_name;
+ const u_int si_buckets_max;
+ const u_int si_stid_first;
+ const u_int si_stid_last;
+ const u_int si_bucket_size_dflt;
+ const u_int si_credits_min;
+ const u_int si_regbase;
+} fmn_station_info_t;
+
+/* use this table for XLS6xx, XLS4xx */
+static const fmn_station_info_t station_info_xls_4xx[RMIXL_FMN_NSTID] = {
+#if 1
+ [RMIXL_FMN_STID_CORE0] = { core0, 8, 0, 7, 32, 4, 0 },
+ [RMIXL_FMN_STID_CORE1] = { core1, 8, 8, 15, 32, 4, 0 },
+ [RMIXL_FMN_STID_CORE2] = { core2, 8, 16, 23, 32, 4, 0 },
+ [RMIXL_FMN_STID_CORE3] = { core3, 8, 24, 31, 32, 4, 0 },
+#else
+ [RMIXL_FMN_STID_CORE0] = { core0, 8, 0, 7, 32, 8, 0 },
+ [RMIXL_FMN_STID_CORE1] = { core1, 8, 8, 15, 32, 8, 0 },
+ [RMIXL_FMN_STID_CORE2] = { core2, 8, 16, 23, 32, 8, 0 },
+ [RMIXL_FMN_STID_CORE3] = { core3, 8, 24, 31, 32, 8, 0 },
+#endif
+ [RMIXL_FMN_STID_GMAC_Q0] = { gmac_q0, 3, 80, 87, 32, 0, RMIXL_IO_DEV_GMAC_0 },
+ [RMIXL_FMN_STID_GMAC_Q1] = { gmac_q1, 3, 96, 103, 32, 0, RMIXL_IO_DEV_GMAC_4 },
+ [RMIXL_FMN_STID_DMA] = { dma, 4, 104, 107, 64, 0, RMIXL_IO_DEV_DMA },
+ [RMIXL_FMN_STID_CDE] = { cde, 4, 108, 109, 128, 0, RMIXL_IO_DEV_CDE },
+ [RMIXL_FMN_STID_PCIE]= { pcie, 8, 64, 71, 32, 0, RMIXL_IO_DEV_PCIE_BE },
+
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Sun Mar 21 21:17:01 UTC 2010
Added Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_spl.S
Log Message:
add splswitch variant using RMI chip-specific EIRR/EIMR interrupt extensions
To generate a diff of this commit:
cvs rdiff -u -r0 -r1.1.2.1 src/sys/arch/mips/rmi/rmixl_spl.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Added files:
Index: src/sys/arch/mips/rmi/rmixl_spl.S
diff -u /dev/null src/sys/arch/mips/rmi/rmixl_spl.S:1.1.2.1
--- /dev/null Sun Mar 21 21:17:01 2010
+++ src/sys/arch/mips/rmi/rmixl_spl.S Sun Mar 21 21:17:01 2010
@@ -0,0 +1,383 @@
+/* $NetBSD: rmixl_spl.S,v 1.1.2.1 2010/03/21 21:17:01 cliff Exp $ */
+
+/*-
+ * Copyright (c) 2009, 2010 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Matt Thomas m...@3am-software.com.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include opt_cputype.h /* which mips CPU levels do we support? */
+
+#include sys/cdefs.h
+
+#include machine/param.h
+#include mips/asm.h
+#include mips/cpuregs.h
+
+RCSID($NetBSD: rmixl_spl.S,v 1.1.2.1 2010/03/21 21:17:01 cliff Exp $);
+
+#include assym.h
+
+#define PARANOIA /* XXX TMP FIXME */
+
+#define MAP_SCALESHIFT 3
+#define RMIXL_SOFT_INT_MASK_0 (MIPS_SOFT_INT_MASK_1 8)
+#define RMIXL_SOFT_INT_MASK (MIPS_SOFT_INT_MASK 8)
+#define RMIXL_INT_MASK_1 (MIPS_INT_MASK_1 8)
+#define RMIXL_INT_MASK_5 (MIPS_INT_MASK_5 8)
+#define RMIXL_COP_0_EIRR _(9), 6
+#define RMIXL_COP_0_EIMR _(9), 7
+
+
+/*
+ * Array of mask of bits to set in the EIMR when we go to a
+ * given hardware interrupt priority level.
+ */
+ .rdata
+ .globl _C_LABEL(ipl_eimr_map)
+ .type _C_LABEL(ipl_eimr_map),@object
+ .p2align MAP_SCALESHIFT
+_C_LABEL(ipl_eimr_map):
+ .dword ~0 /* IPL_NONE */
+ .dword ~RMIXL_SOFT_INT_MASK_0 /* IPL_SOFT{CLOCK,BIO} */
+ .dword ~RMIXL_SOFT_INT_MASK /* IPL_SOFT{NET,SERIAL} */
+ .dword RMIXL_INT_MASK_5 /* IPL_VM */
+ .dword 0 /* IPL_SCHED */
+#if IPL_SCHED != IPL_HIGH
+ .dword 0 /* IPL_HIGH */
+#endif
+
+ .text
+/*
+ * RMIXL processor interrupt control
+ *
+ * Used as building blocks for spl(9) kernel interface.
+ */
+_splraise:
+ /*
+ * a0 = EIMR bits to be set for this IPL
+ * a1 = this IPL (IPL_*)
+ * Can only use a0-a3 and v0-v1
+ */
+ PTR_L a3, L_CPU(MIPS_CURLWP)
+ INT_L v0, CPU_INFO_CPL(a3) # get current IPL from cpu_info
+ sltu v1, a1, v0 # newipl curipl
+ bnez v1, 2f# yes, don't change.
+ mfc0 a2, MIPS_COP_0_STATUS # load STATUS
+ and a2, ~MIPS_INT_MASK # clear STATUS[IM]
+ sll v1, a0, 8 # EIMR[7:0] to STATUS[15:8]
+ and v1, MIPS_INT_MASK #
+ or v1, a2# new STATUS value
+ mtc0 zero, MIPS_COP_0_STATUS ## disable all ints in STATUS
+ INT_S a1, CPU_INFO_CPL(a3) ## save IPL in cpu_info
+ dmtc0 a0, RMIXL_COP_0_EIMR ## set new EIMR
+ mtc0 v1, MIPS_COP_0_STATUS ## set new STATUS
+#ifdef PARANOIA
+ j ra
+ nop
+#endif /* PARANOIA */
+#ifdef PARANOIA
+ dmfc0 v0, RMIXL_COP_0_EIMR # get EIMR
+1: bne a0, v0, 1b # loop forever if not equal
+ nop
+#endif /* PARANOIA */
+2: j ra
+ nop
+
+STATIC_LEAF(_splsw_splx)
+STATIC_XLEAF(_splsw_splx_noprof) # does not get mcount hooks
+ PTR_L a3, L_CPU(MIPS_CURLWP) # get cpu_info
+ INT_L a2, CPU_INFO_CPL(a3) # get IPL from cpu_info
+ beq a0, a2, 2f # if same, nothing to do
+ nop
+#ifdef PARANOIA
+ sltu v0, a0, a2 # v0 = a0 a2
+99: beqz v0, 99b# loop forever if false
+ nop
+#endif /* PARANOIA */
+ #move a1, zero # avoid lookup on splx(IPL_NONE)
+ #beq a0, zero, 1f # skip load
+ PTR_LA v1, _C_LABEL(ipl_eimr_map) # get address of table
+
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Sun Mar 21 21:20:10 UTC 2010
Added Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_cpuvar.h
Log Message:
add include for RMI specific cpu stuff: softc and wakeup trampoline args
structures
To generate a diff of this commit:
cvs rdiff -u -r0 -r1.1.2.1 src/sys/arch/mips/rmi/rmixl_cpuvar.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Added files:
Index: src/sys/arch/mips/rmi/rmixl_cpuvar.h
diff -u /dev/null src/sys/arch/mips/rmi/rmixl_cpuvar.h:1.1.2.1
--- /dev/null Sun Mar 21 21:20:10 2010
+++ src/sys/arch/mips/rmi/rmixl_cpuvar.h Sun Mar 21 21:20:10 2010
@@ -0,0 +1,21 @@
+/* $NetBSD: rmixl_cpuvar.h,v 1.1.2.1 2010/03/21 21:20:10 cliff Exp $ */
+
+#ifndef _ARCH_MIPS_RMI_RMIXL_CPUVAR_H_
+#define _ARCH_MIPS_RMI_RMIXL_CPUVAR_H_
+
+struct rmixl_cpu_trampoline_args {
+ uint64_t ta_sp;
+ uint64_t ta_lwp;
+ uint64_t ta_cpuinfo;
+};
+
+struct rmixl_cpu_softc {
+ device_t sc_dev;
+ struct cpu_info *sc_ci;
+ void *sc_ih_clk;
+ void *sc_ih_fmn;
+ void *sc_ih_ipi;
+ struct evcnt sc_vec_evcnts[64];
+};
+
+#endif /* _ARCH_MIPS_RMI_RMIXL_CPUVAR_H_ */
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src Committed By: cliff Date: Sun Mar 21 21:23:32 UTC 2010 Modified Files: src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_com.c Log Message: - pass obio_tmsk to rmixl_intr_establish To generate a diff of this commit: cvs rdiff -u -r1.1.2.10 -r1.1.2.11 src/sys/arch/mips/rmi/rmixl_com.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. Modified files: Index: src/sys/arch/mips/rmi/rmixl_com.c diff -u src/sys/arch/mips/rmi/rmixl_com.c:1.1.2.10 src/sys/arch/mips/rmi/rmixl_com.c:1.1.2.11 --- src/sys/arch/mips/rmi/rmixl_com.c:1.1.2.10 Wed Jan 20 20:48:12 2010 +++ src/sys/arch/mips/rmi/rmixl_com.c Sun Mar 21 21:23:32 2010 @@ -1,4 +1,4 @@ -/* $Id: rmixl_com.c,v 1.1.2.10 2010/01/20 20:48:12 matt Exp $ */ +/* $Id: rmixl_com.c,v 1.1.2.11 2010/03/21 21:23:32 cliff Exp $ */ /*- * Copyright (c) 2006 Urbana-Champaign Independent Media Center. * Copyright (c) 2006 Garrett D'Amore. @@ -101,7 +101,7 @@ */ #include sys/cdefs.h -__KERNEL_RCSID(0, $NetBSD: rmixl_com.c,v 1.1.2.10 2010/01/20 20:48:12 matt Exp $); +__KERNEL_RCSID(0, $NetBSD: rmixl_com.c,v 1.1.2.11 2010/03/21 21:23:32 cliff Exp $); #include sys/param.h #include sys/systm.h @@ -119,9 +119,10 @@ #include mips/cpuregs.h +#include mips/rmi/rmixlvar.h +#include mips/rmi/rmixl_intr.h #include mips/rmi/rmixl_obiovar.h #include mips/rmi/rmixl_comvar.h -#include mips/rmi/rmixlvar.h #include opt_com.h @@ -284,8 +285,8 @@ com_attach_subr(sc); - rmixl_intr_establish(obio-obio_intr, IPL_SERIAL, - RMIXL_INTR_LEVEL, RMIXL_INTR_HIGH, comintr, sc); + rmixl_intr_establish(obio-obio_intr, obio-obio_tmsk, + IPL_SERIAL, RMIXL_TRIG_LEVEL, RMIXL_POLR_HIGH, comintr, sc); }
CVS commit: [matt-nb5-mips64] src/sys/arch/mips/rmi
Module Name:src
Committed By: cliff
Date: Sun Mar 21 21:23:54 UTC 2010
Modified Files:
src/sys/arch/mips/rmi [matt-nb5-mips64]: rmixl_cpu.c
Log Message:
- use different wakeup trampolines depending on firmware type
so far only RMI formware with callback wakeup method is tested.
- add a (chip-specific) softc structure, and cross link it
with struct cpu_info
- remove exception vectors mem allocation, it is now provided
by cpu_attach_common
- remove common cpu_info initialization, now provided
by cpu_attach_common
- use per-CPU bit in 'cpus_hatched' as handshake with the CPU
we just hatched
- call rmixl_intr_init_cpu for per-CPU interrupt initialization
- call cpu_attach_common() for common mips stuff
- cpu_rmixl_attach_once() groups together chip-specific initializations
that are only to be one once, i.e. by CPU#0
- cpu_rmixl_hatch() provides chip-specific hatch code called from
(mips-common) cpu_hatch() via lsw_cpu_init
- cpu_setup_trampoline_callback() provides method to wake up
subordinate CPUs using RMI firmware callback.
- rmixl_cpuinfo_print() can be called for debugging e.g. from DDB
should maybe evolve into DDB 'mach cpu n' ?
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.5 -r1.1.2.6 src/sys/arch/mips/rmi/rmixl_cpu.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/rmi/rmixl_cpu.c
diff -u src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.5 src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.6
--- src/sys/arch/mips/rmi/rmixl_cpu.c:1.1.2.5 Tue Feb 23 20:33:48 2010
+++ src/sys/arch/mips/rmi/rmixl_cpu.c Sun Mar 21 21:23:54 2010
@@ -1,4 +1,4 @@
-/* $NetBSD: rmixl_cpu.c,v 1.1.2.5 2010/02/23 20:33:48 matt Exp $ */
+/* $NetBSD: rmixl_cpu.c,v 1.1.2.6 2010/03/21 21:23:54 cliff Exp $ */
/*
* Copyright 2002 Wasabi Systems, Inc.
@@ -38,29 +38,55 @@
#include locators.h
#include sys/cdefs.h
-__KERNEL_RCSID(0, $NetBSD: rmixl_cpu.c,v 1.1.2.5 2010/02/23 20:33:48 matt Exp $);
+__KERNEL_RCSID(0, $NetBSD: rmixl_cpu.c,v 1.1.2.6 2010/03/21 21:23:54 cliff Exp $);
#include sys/param.h
#include sys/device.h
#include sys/systm.h
#include sys/cpu.h
#include sys/lock.h
+#include sys/lwp.h
+#include sys/cpu.h
+#include sys/user.h
+#include sys/malloc.h
#include uvm/uvm_pglist.h
#include uvm/uvm_extern.h
+#include mips/regnum.h
+#include mips/asm.h
#include mips/pmap.h
#include mips/rmi/rmixlreg.h
#include mips/rmi/rmixlvar.h
#include mips/rmi/rmixl_cpucorevar.h
+#include mips/rmi/rmixl_cpuvar.h
+#include mips/rmi/rmixl_intr.h
+#include mips/rmi/rmixl_fmnvar.h
+
static int cpu_rmixl_match(device_t, cfdata_t, void *);
static void cpu_rmixl_attach(device_t, device_t, void *);
+static void cpu_rmixl_attach_once(struct rmixl_cpu_softc * const);
+#ifdef NOTYET
+static int cpu_fmn_intr(void *, rmixl_fmn_rxmsg_t *);
+#endif
#ifdef MULTIPROCESSOR
-void cpu_trampoline_park(void);
-static void cpu_setup_trampoline(struct device *, struct cpu_info *);
+void cpu_rmixl_hatch(struct cpu_info *);
+#if 0
+static void cpu_setup_trampoline_ipi(struct device *, struct cpu_info *);
#endif
+static void cpu_setup_trampoline_callback(struct device *, struct cpu_info *);
+static void cpu_setup_trampoline_fmn(struct device *, struct cpu_info *);
+#ifdef DEBUG
+void rmixl_cpu_data_print(struct cpu_data *);
+struct cpu_info *
+ rmixl_cpuinfo_print(cpuid_t);
+#endif /* DEBUG */
+#endif /* MULTIPROCESSOR */
-CFATTACH_DECL_NEW(cpu_rmixl, 0, cpu_rmixl_match, cpu_rmixl_attach, NULL, NULL);
+CFATTACH_DECL_NEW(cpu_rmixl, sizeof(struct rmixl_cpu_softc),
+ cpu_rmixl_match, cpu_rmixl_attach, NULL, NULL);
+
+static struct rmixl_cpu_trampoline_args rmixl_cpu_trampoline_args;
static int
cpu_rmixl_match(device_t parent, cfdata_t cf, void *aux)
@@ -84,69 +110,145 @@
static void
cpu_rmixl_attach(device_t parent, device_t self, void *aux)
{
+ struct rmixl_cpu_softc * const sc = device_private(self);
struct cpucore_attach_args *ca = aux;
+ struct cpu_info *ci = NULL;
if (ca-ca_thread == 0 ca-ca_core == 0) {
- struct cpu_info * const ci = curcpu();
- ci-ci_dev = self;
- self-dv_private = ci;
+ ci = curcpu();
+ sc-sc_dev = self;
+ sc-sc_ci = ci;
+ ci-ci_softc = (void *)sc;
+
+ cpu_rmixl_attach_once(sc);
+
#ifdef MULTIPROCESSOR
+ mips_locoresw.lsw_cpu_init = cpu_rmixl_hatch;
} else {
struct cpucore_softc * const ccsc = device_private(parent);
rmixlfw_psb_type_t psb_type = rmixl_configuration.rc_psb_type;
- struct pglist pglist;
- int error;
+ cpuid_t cpuid;
+ int s;
+
+ s = splhigh();
+
+ KASSERT(ca-ca_core 8);
+ KASSERT(ca-ca_thread 4);
+ cpuid = (ca-ca_core 2) | ca-ca_thread;
+ ci = cpu_info_alloc(ccsc-sc_tlbinfo, cpuid);
+ KASSERT(ci != NULL);
+ sc-sc_dev = self;
+ sc-sc_ci = ci;
+ ci-ci_softc = (void *)sc;
switch (psb_type) {
case PSB_TYPE_RMI:
+ cpu_setup_trampoline_callback(self, ci);
break;
case PSB_TYPE_DELL:
- /* FALLTHROUGH */
+
