In my opinion it's worth spending an hour going over the footprint
file format and just making your footprints in an ASCII editor. Once
you know the file format it's very fast ( 10 min per footprint on
average) and you get the exact dimensions you need specified by the
datasheet. Making footprints
had any problems with footprints thus far
and I spent very little time making footprints compared with the rest
of the layout process.
On Tue, Apr 6, 2010 at 10:12 AM, Stefan Salewski m...@ssalewski.de wrote:
On Tue, 2010-04-06 at 09:41 -0700, Anthony Shanks wrote:
In my opinion it's worth
topic
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That worked perfect. Thanks!
On Thu, Mar 25, 2010 at 9:15 PM, DJ Delorie d...@delorie.com wrote:
Select all
cut
rotate buffer 90 degrees (shift-F7 I think)
paste
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geda-user@moria.seul.org
By default, when you issue a command in pcb (lets say the delete
button), pcb deletes whats over your mouse instead of whats selected.
I know you can shift-delete to delete whats selected, but is there
anyway to make it behave this way by default?
___
I'm using linux.
So the key point here is just to use backspace instead of delete?
I'll look into changing the keybindings if that's the case.
On Thu, Mar 11, 2010 at 9:59 AM, Stefan Salewski m...@ssalewski.de wrote:
On Thu, 2010-03-11 at 09:46 -0800, Anthony Shanks wrote:
By default, when
Is there a way to make a square polygon with round edges in pcb?
One more unrelated question. Is there a way to place vias with a
default soldermask clearance less than 0?
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Sorry that was a mis-statement.
Is there anyway to place vias that have a soldermask clearance MORE than 0?
By default, when I place a via, it has zero soldermask clearance.
On Mon, Mar 8, 2010 at 9:40 AM, Gabriel Paubert paub...@iram.es wrote:
On Mon, Mar 08, 2010 at 09:18:56AM -0800, Anthony
Why is that?
The board house I use (4pcb) requires soldermask clearance for vias.
I'm sure they are not the only ones.
On Mon, Mar 8, 2010 at 9:49 AM, DJ Delorie d...@delorie.com wrote:
Is there anyway to place vias that have a soldermask clearance MORE
than 0?
The code for inserting new
I just submitted a board to them a few weeks ago.
When I uploaded my gerbers I got hundreds of warnings for having no
soldermask clearance.
I added their minimum clearance and all of the warnings were gone.
Maybe technically since they were warnings its not required, but I
didn't want to take a
Boards came back yesterday and one of my footprints don't exactly
match the vendor. I used gEDA's 24-pin SSOP format for this IC as the
vendor said it was a 24 pin SSOP. I am not blaming gEDA as I should of
checked before the boards went out. I did check for the footprints I
made myself but did
components
and 6 different IC's.
On Wed, Mar 3, 2010 at 1:05 PM, Peter TB Brett pe...@peter-b.co.uk wrote:
On Wednesday 03 March 2010 20:51:25 Anthony Shanks wrote:
Boards came back yesterday and one of my footprints don't exactly
match the vendor. I used gEDA's 24-pin SSOP format for this IC
I am looking for a lower cost replacement for the 2:1 mux I am using
for video applications. I need a total of 6 muxes (RGB+Sync and L/R
audio). Right now I am using 2 of these for the 6 muxes I need.
Bandwidth is not a huge concern as I'm not using this for HDTV applications.
Would appretiate
Some parts have mounting brackets that are square, not round. Yes I
know I can make a equivalent circlular hole that would fit but it
wastes a lot of space doing that and it interferes with routing.
On Sun, Feb 21, 2010 at 3:26 AM, Duncan Drennan
duncan.dren...@gmail.com wrote:
Why exactly would
Is it possible to selected, say a group of 40 pins, and move them all,
say 100 mils to the left? I know I can use MoveObject to do this, but
it only does the pin at the crosshair, not all selected pins.
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Polygon keepout would also be nice too.
On Thu, Jan 28, 2010 at 2:16 PM, Dave N6NZ n...@arrl.net wrote:
On Jan 28, 2010, at 12:46 PM, DJ Delorie wrote:
I've done some hacks that
look for layers named cmask or paste and just appends those to the
gerbers, but nothing that can be committed.
I just screwed up big time and accidently overwrote a completeled
layout that took about 2 weeks to finish. I had absolutely no backup
of it. It's completely gone.
I do have a gerber export of it. Is there a tool to convert this back
into pcb? I really have no interest in redoing this. I really
and learning the
ins and outs of pcb.
Also for my next project I wanted to try a more modular design
(seperate layout blocks combined into one). I guess this gives me the
opprotuntiy to try it out now.
On Wed, Dec 30, 2009 at 8:58 AM, John Griessen j...@ecosensory.com wrote:
Anthony Shanks wrote:
I just
This worked! Thanks
On Sat, Dec 26, 2009 at 3:41 AM, Ineiev ine...@gmail.com wrote:
On 12/26/09, Anthony Shanks yamazak...@gmail.com wrote:
When loading up a netlist file, PCB complains if a single line is over
255 characters and cuts out the rest of the line. I have a net with
lots
When loading up a netlist file, PCB complains if a single line is over
255 characters and cuts out the rest of the line. I have a net with
lots of components connected to it (gnd) and the line ends up being
way over 255 characters. The workaround I have done is to split the
net into two nets with
Hi all, quick question
For the attacked gerber files, are these layers the soldermask keepout areas?
rgbconv.frontmask.gbr
Description: application/gerber
rgbconv.backmask.gbr
Description: application/gerber
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Hi all,
I have some questions about pcb.
1. I have the concept down of how pcb interacts with the components
you place on the board and the netlist you load and I have them
working properly, as I can properly highlight nets and components with
the netlist browser. However, from what I can tell,
Hi all,
Attaching the new version of the dsub15 hd footprint, instead of
drawing it with a mm grid I drew it with a mil grid and just made the
mm to mil conversions from the diagram of the footprint I have. I also
fixed the soldermask clearances, let me know if this symbol is good
enough now to
Hi
I am using PCB to make footprints and I'm having a problem with PCB
not saving the silkscreen along with the pins. Here is my proceedure
for making the footprints.
1. Draw the silkscreen and pins (drawn with vias in the component layer)
2. Select all objects
3. Copy selection to buffer
4.
Oh crap, thats it, I made the silk with polygons, not lines... whoops...
On Thu, Nov 26, 2009 at 5:13 PM, Kai-Martin Knaak k...@familieknaak.de wrote:
On Thu, 26 Nov 2009 16:04:35 -0800, Anthony Shanks wrote:
1. Draw the silkscreen and pins (drawn with vias in the component layer)
2. Select
the symbol a bit later but from what I can
tell it passes the default DRC except the min silk screen width. Which
is ok with the fab I'm going to be using.
On Thu, Nov 26, 2009 at 10:40 PM, Bert Timmerman
bert.timmer...@xs4all.nl wrote:
Hi Anthony,
Anthony Shanks wrote:
Finally getting the hang
What 2.1mm jack is this? This doesn't look like it matches the one I posted.
On Mon, Nov 23, 2009 at 7:41 PM, DJ Delorie d...@delorie.com wrote:
Element[ J? 0 0 18701 -13780 0 144 ]
(
Pin[-11811 0 14173 2000 14773 4300 1 edge2]
Pin[11811 0 14173 2000 14773 4300 2 edge2]
Sorry but can you give me a direct link? I can't find it on the site.
On Mon, Nov 23, 2009 at 7:41 PM, John Luciani jluci...@gmail.com wrote:
I should have the 2.1mm jack and the SC70-5 at [1]luciani.org
(* jcl *)
--
You can't create open hardware with closed EDA tools.
twitter:
Is there anyway to move a footprint beyond the boundary of the board?
For example I want to move this jack (J1) so the connectors are
sticking out the board, but it doesnt want to move the silkscreen
layer past the board boundaries. In this case do I have to just edit
the footprint?
...@familieknaak.de wrote:
On Tue, 24 Nov 2009 00:17:15 -0800, Anthony Shanks wrote:
Is there anyway to move a footprint beyond the boundary of the board?
For example I want to move this jack (J1) so the connectors are sticking
out the board, but it doesnt want to move the silkscreen layer past
Never, get rid of it.
On Tue, Nov 24, 2009 at 3:22 PM, Peter Clifton pc...@cam.ac.uk wrote:
Hi,
I just came across a proposal to remove the tear-off menu feature in
GTK. Whilst generally none of our business how up-stream tool-kits alter
their UI - outside of its programming interface, I was
Have a few questions about pcb...
1. So after drawing rat lines between two components, it gives a
default netname of ratdrawn. How do I rename the rat after playing it?
2. How do I move a refdes without moving the component?
3. How do I rotate or invert a component after placing it? I see how
On Mon, Nov 23, 2009 at 11:21 AM, DJ Delorie d...@delorie.com wrote:
1. So after drawing rat lines between two components, it gives a
default netname of ratdrawn. How do I rename the rat after playing it?
Save to file, edit the .pcb, reload. Or start with a schematic so you
can name all the
On Mon, Nov 23, 2009 at 11:58 AM, DJ Delorie d...@delorie.com wrote:
I'm not using gsch2pcb so the netnames in the schematic aren't
applicable (starting layout from scratch). There is no in-tool way to
edit the net names? I have to edit them in the .pcb file?
You might be able to use the 'n'
I've tried looking at some pcb docs and have played around with the
preferences but can't seem to find it. Is there anyway to have black
background and white grid for pcb?
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...@cam.ac.uk wrote:
On Wed, 2009-11-18 at 14:02 -0800, Anthony Shanks wrote:
I've tried looking at some pcb docs and have played around with the
preferences but can't seem to find it. Is there anyway to have black
background and white grid for pcb?
GTK HID?
File-Preferences-Colours
Hi all,
Does anybody know of a cheaper right angle component video terminal?
The only one I found on digikey was this one:
http://search.digikey.com/scripts/DkSearch/dksus.dll?WT.z_header=search_golang=ensite=uskeywords=CP-1446-NDx=0y=0
The unit price of 2.02 isn't all that attractive, looking
...@ben.com wrote:
On Mon, Nov 16, 2009 at 10:51:20AM -0800, Anthony Shanks wrote:
Hi all,
Does anybody know of a cheaper right angle component video terminal?
The only one I found on digikey was this one:
http://search.digikey.com/scripts/DkSearch/dksus.dll?WT.z_header=search_golang=ensite
resolution? Did you consider a HDMI interface instead
of component?
On Mon, Nov 16, 2009 at 2:16 PM, Ben Jackson b...@ben.com wrote:
On Mon, Nov 16, 2009 at 01:47:48PM -0800, Anthony Shanks wrote:
I see, I actually like the black frame, I was just interested if any
company sold them for cheaper. I'll
Hi all,
I've been working on a spice gui/testbench/front end program for the
past few months on and off and I'm finally really to release a VERY
alpha version of it to get some feedback. This should of been released
a few months ago but I have been really busy and have not had time to
work on it.
Wow another netlister, that makes 4 now?
gnetlist
spnet
gnetman
ynetlist
At least gEDA users have plenty of choices now.
On Fri, Jul 31, 2009 at 12:49 PM, A.Burinskiyalexb...@gmail.com wrote:
Dear gEDA community members,
I created yet another netlister for gschem. Netlister supports
I'm very interested in this also.
On Thu, Jul 23, 2009 at 1:15 PM, Svenn Are
Bjerkemsvenn.bjer...@googlemail.com wrote:
2009/7/23 al davis ad...@freeelectron.net:
Someone is working on a config file for ADMS to generate the
native gnucap interface which is more efficient, and supports
Change the value attribute to 2n and read up on spice syntax. Your
model file (the model of the 2n) needs to be included in the
netlist which in your case it isn't.
Also consider using my netlister at http://spnet.code-fusion.net/
(shameless plug) it warns about things like this and the
On Wed, Jul 1, 2009 at 2:39 PM, rnbs.pub...@gmail.com wrote:
On Wed, Jul 1, 2009 at 2:30 AM, Anthony Shanksyamazak...@gmail.com wrote:
Yes I know exactly what you mean now and I have seen (and have used)
that kind of hierarchy control present in very high end tools (like
cadence)
Sorry, I
http://spnet.code-fusion.net
More of a beta/trial release, but I've done considerable testing with
both my symbol libraries and the default gEDA libraries and everything
for the most part seems smooth. For those of you who aren't familar
with spNet, it's a spice netlister for gEDA that can
Oops, had the website disabled. It's back up now.
On Tue, Jun 30, 2009 at 1:04 AM, Anthony Shanksyamazak...@gmail.com wrote:
http://spnet.code-fusion.net
More of a beta/trial release, but I've done considerable testing with
both my symbol libraries and the default gEDA libraries and
On Tue, Jun 30, 2009 at 11:59 AM, Bill Gatliffb...@billgatliff.com wrote:
John P. Doty wrote:
Anthony Shanks wrote:
http://spnet.code-fusion.net
More of a beta/trial release, but I've done considerable testing with
both my symbol libraries and the default gEDA libraries and everything
2009 12:08:55 -0700, Anthony Shanks wrote:
Thanks I appreciate it. I'm also in the middle of writing a replacement
for gspiceui.
Are there any plans to reach a level of integration where I can select
some subcircuit in gschem and press a simulate button?
---(kaimartin)
--
Kai-Martin
, Jun 30, 2009 at 12:52 PM, John P. Dotyj...@noqsi.com wrote:
Anthony Shanks wrote:
On Tue, Jun 30, 2009 at 11:59 AM, Bill Gatliffb...@billgatliff.com wrote:
John P. Doty wrote:
Anthony Shanks wrote:
http://spnet.code-fusion.net
More of a beta/trial release, but I've done considerable
On Tue, Jun 30, 2009 at 2:06 PM, rnbs.pub...@gmail.com wrote:
On Tue, Jun 30, 2009 at 8:52 PM, John P. Dotyj...@noqsi.com wrote:
Agreed. But you if you thing gEDA is restricted to generating flat
netlists, you don't understand it. You can't improve what you don't
understand.
[...]
You're
simulation gui
(which I am writing) to replace gspicui since it is missing so many
feature and is not being updated.
On Tue, Jun 30, 2009 at 12:23 PM, Kai-Martin Knaakk...@familieknaak.de
wrote:
On Tue, 30 Jun 2009 12:08:55 -0700, Anthony Shanks wrote:
Thanks I appreciate it. I'm also
On Tue, Jun 30, 2009 at 2:39 PM, John P. Dotyj...@noqsi.com wrote:
Anthony Shanks wrote:
I suppose makefiles are a matter of perspective. What you call
flexibility I call a missing feature. In my opinion a robust spice
netlister includes hierarchical netlisting and other features I
included
I'm not going to go back and forth anymore about the topic because I'm
not sure anybody is benefiting from it but I'll say this:
I didn't mean to offend or insult anybodys work. If I came across as
such I apologize. I *personally* felt gnetlist itself (not the whole
gEDA flow or toolkit, the
Yes I know exactly what you mean now and I have seen (and have used)
that kind of hierarchy control present in very high end tools (like
cadence) but it is usually at the schematic capture level like you
stated rather at the netlister level. gschem would have to drastically
change to support that
I was looking through the default libraries that are shipped with gEDA
(newest git) and there are no jfet symbols. I looked through
gedasymbols.org and I saw user uploaded JFETS but all of them had
conflicting device attribues. Is there a official device attribute for
jfets in the gEDA flow? The
property for netlisting to decide what the device is
and leaving refdes open for choice.
-Anthony
On Fri, Jun 26, 2009 at 1:06 AM, Kai-Martin Knaakk...@familieknaak.de wrote:
On Fri, 26 Jun 2009 00:16:24 -0700, Anthony Shanks wrote:
Is there a official device attribute for jfets in the gEDA flow?
I
components and subckts this shouldn't be an issue. If people
are using spice models of the components they are using this is taken
care of with the value field.
On Fri, Jun 26, 2009 at 6:32 AM, John Dotyj...@noqsi.com wrote:
On Jun 26, 2009, at 4:02 AM, Anthony Shanks wrote:
The device property has
On Fri, Jun 26, 2009 at 3:43 PM, John Dotyj...@noqsi.com wrote:
On Jun 26, 2009, at 11:51 AM, Anthony Shanks wrote:
I see, I didn't know whats how spice-sdb works, never really used that
backend, just the spice one.
What do you mean by overloading? Nearly every symbol shipped with
gschem
Just curious, did you try spnet yet?
On Thu, Jun 25, 2009 at 4:15 AM, Christoph Lechnercl0...@l-mx.de wrote:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
John Doty wrote:
On Jun 24, 2009, at 3:22 PM, Christoph Lechner wrote:
I'm planning a stepper motor card for 4 motors, so I wanted to
corner=TYP
And v2i_2v.sym is real subcircuit.
After artificially adding this braces I've got (please note, that
(42300;44500) corresponds to connection point of gnd symbol pin)
$ spnet test_v2i.sch
spNet v0.9.1.2
gEDA/gschem Netlister
Copyright 2009 Anthony Shanks
-I- Starting Build
...@gmail.com wrote:
Hi Anthony,
If I add netname to the offended net, the spnet goes to the next net and
report next error. Does it mean that all nets should be named?
Thanks,
Alex.
On 06/24/2009 12:19 AM, Anthony Shanks wrote:
Hi Alex, please download the newest spnet on my site and let me know
how
net, the spnet goes to the next net and
report next error. Does it mean that all nets should be named?
Thanks,
Alex.
On 06/24/2009 12:19 AM, Anthony Shanks wrote:
Hi Alex, please download the newest spnet on my site and let me know
how it goes, it should be a bit more compatible.
Here
Sorry man if you were in Northern California I'd have no problem
helping you. Good luck with your search.
On Wed, Jun 24, 2009 at 5:04 PM, Michael
Sokolovmsoko...@ivan.harhan.org wrote:
Hello gEDA/PCB users,
I wonder, is there perchance a local user group in Southern California
similar to the
:
Hi Anthony,
Thanks a lot, now spNet compiles well.
When I run it I have following error:
$ spnet if.sch
spNet v0.9.1
gEDA/gschem Netlister
Copyright 2009 Anthony Shanks
-E- Invalid lib file. Syntax: library: PATH LibName
[al...@bazilik buck1]$ more ~/.spnetlibs
library: /home/username
not know which, but gschem knows where system libraries are.
Thanks,
Alex.
On 06/23/2009 01:10 AM, Anthony Shanks wrote:
Thats really odd, I copied your line directly in my spnetlibs file and
it worked fine. Maybe it's a gcc 4.4 issue? I really need to switch to
gcc4.4 since is is catching
. Do
you
support comment out in .spnetlibs? I will go ahead and try your new
code.
Thanks,
Alex
On 06/23/2009 03:03 AM, Anthony Shanks wrote:
Wow. I guess I have a lot to learn as far as releasing code and
compiling versions go because it works fine on my end
Copyright 2009 Anthony Shanks
-I- Starting Build of Cell: test_v2i
-I- Adding Library: sym
-I- Adding Library: power
-I- Combining Cells
-E- Fatal Error: Invalid Component attr C 42200 44200 1 0 0 gnd-1.sym.
$ more ~/.spnetlibs
library: /home/username/tsmc sym
library: /usr/local/share
0 -5 8 10 1 0 0 0 1
corner=TYP
And v2i_2v.sym is real subcircuit.
After artificially adding this braces I've got (please note, that
(42300;44500) corresponds to connection point of gnd symbol pin)
$ spnet test_v2i.sch
spNet v0.9.1.2
gEDA/gschem Netlister
Copyright 2009 Anthony Shanks
I have and am currently developing a advanced netlister called spNet
that does full hierarchical netlisting plus other features. Right now
I have released a version on my website that uses gnetlist as a
backend but I already completed a version that is it's own netlister
and does not need gnetlist
Download the latest spNet (0.9.1) here:
[1]http://spnet.code-fusion.net/
Completely ignore the FAQ/Documentation on the site it is out of date.
Download the symbols on the download page too and replace your current
gschem symbols with the new ones you downloaded (very
is wrong? I'm using F11, x86_64.
Thanks,
Alex.
On 06/22/2009 03:33 PM, Anthony Shanks wrote:
What is your end goal here? Just to have hierarchical schematics or do
be able to produce a hierarchical netlist? IMHO hierarchical
schematics in gschem work perfectly fine, it's netlisting them
(such as the case in your build). I'll try to fix this issue and
release another update tonight so it can compile with gcc 4.4.
-Anthony
On Mon, Jun 22, 2009 at 4:12 PM, A.Burinskiyalexb...@gmail.com wrote:
Hi Anthony,
Please find config.log attached.
Thanks,
Alex.
On 06/22/2009 04:03 PM, Anthony Shanks
.
-Anthony
On Mon, Jun 22, 2009 at 4:12 PM, A.Burinskiyalexb...@gmail.com wrote:
Hi Anthony,
Please find config.log attached.
Thanks,
Alex.
On 06/22/2009 04:03 PM, Anthony Shanks wrote:
Odd, I thought I did a configure/make/make install before I released
to to make sure it compiles
Just out of curiosity what is gnspice? or did you mean ngspice?
On Fri, May 29, 2009 at 12:12 PM, Jeffrey Seligman
selig...@u.arizona.edu wrote:
Warning - approaching max data size: current size = 16.458 kB, limit = 0 bytes
--
Jeffrey M. Seligman
U Cluster Email
University of Arizona
, 2009 at 5:49 AM, Stefan Salewski m...@ssalewski.de wrote:
On Tue, 2009-05-26 at 20:25 -0700, Anthony Shanks wrote:
spnet website is back up
http://spnet.code-fusion.net
Please excuse my ignorance:
How is this related to gnetman and the problem of file collision
(identical files in geda
Use spNet
http://spnet.code-fusion.net
Website is down right now because I just installed new hardware on my
server and I haven't got everything up 100% yet but if anybody has a
copy on it on the list maybe they can attach it. If not, I will make
sure the website is back up tonight after I get
spnet website is back up
http://spnet.code-fusion.net
On Tue, May 26, 2009 at 1:27 PM, Stefan Salewski m...@ssalewski.de wrote:
We had a file collision in Gentoo-Linux for latest gEDA 1.4.3
geda-symbols and old gnetman. A few identical symbols are installed to
the same location. See this bug
I know there is some kind of sch2pcb script (I haven't tried it myself
so I don't know good it works), but I think there does need to be some
kind of lvs flow in gEDA. I planned on working on some type of lvs
flow between pcb and gschem but I haven't got around to it.
On Tue, May 12, 2009 at 5:08
What kind oh work have you done? Were you planning to compare sch to
pcb files? What kind of flow were you thinking?
On Tue, May 12, 2009 at 1:04 PM, DJ Delorie d...@delorie.com wrote:
I know there is some kind of sch2pcb script (I haven't tried it myself
so I don't know good it works), but I
Where is the schematic?
On Tue, May 12, 2009 at 1:19 PM, Michael B Allen iop...@gmail.com wrote:
Hi,
What would be a good signal source setup for an electric guitar? I
thought I read somewhere an electric guitar could put out 1V so I used
the following:
* Source (V2 input 0 dc 0 ac 1)
Hi all,
Just annoncing that I am releasing an advanced netlister for
gEDA/gschem as an alternative to gnetlist. I mentioned this a few
months back and people seemed like they are interested but it wasnt
really ready for release yet. I think I have it to the point now where
its ready to be tested.
received, 100% packet loss, time 2006ms
-Mark S.
On Sat May 2 2009 05:46:42 am Anthony Shanks wrote:
Hi all,
Just annoncing that I am releasing an advanced netlister for
gEDA/gschem as an alternative to gnetlist. I mentioned this a few
months back and people seemed like they are interested
That is correct :)
On Sat, May 2, 2009 at 2:04 PM, Kai-Martin Knaak k...@familieknaak.de wrote:
On Sat, 02 May 2009 13:49:13 -0700, Anthony Shanks wrote:
It should be working now, try again.
cite:
/---
The main feature that distinguishes spNet from gnetlist
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