n
> > mainline.
> >
> > Switch to use the BSP-provided frequency 504MHz for DRAM.
> >
> > Thanks to Thomas Kaiser, who pointed out the frequency problem.
>
> What issue does this patch fix? BSPs have often been way underclocked
> in the past.
>
> Did you
Jens Kuske wrote:
> The H3 PLL5 used for DRAM barely manages to lock to the required
> frequency before DRAM controller starts, sometimes leading to wrong
> delay-line calibration results.
> This patch changes the PLL tuning parameters to the same values as
> boot0 used, which speeds up the lo
Jon Smirl wrote:
>
> Is there some way to manually poke the kernel and force the port to
> switch modes?
>
In case /sys/bus/platform/devices/sunxi_usb_udc/otg_role exists, setting it
to 2 should switch to OTG role (assumption based on similarities in
Allwinner's BSP legacy kernel for H3, A83T a
Hi,
Ondřej Jirman wrote:
>
> We have boards that have 1.1/1.3V switching, only 1.3V, fine tuned
> voltage regulation and every such board will need it's own set of
> operating points.
>
Yes, and Allwinner's current BSP kernel code might encourage board makers
to implement a forth variant: swi
Benjamin Henrion wrote:
> All Allwinner kernels rootable with an echo:
>
>
> https://olimex.wordpress.com/2016/05/10/how-to-root-any-allwinner-device-running-android-and-most-of-the-chinese-pi-clones-which-bet-on-allwinner-android-linux-kernel/
>
>
> Insane!
>
Wrong instead since it affects no
Siarhei Siamashka wrote:
>
> Having too much poorly structured information and too many SD card
> images to try actually does more harm than good.
Well, the unreviewer pointed out that he did what everyone would do: Go to
the download section on wiki.pine64.org and choose the OS images _feature
Just a try to save others some time. SinoVoip sent me a developer/review
sample yesterday and I did some testing.
Wiki stub: http://linux-sunxi.org/Sinovoip_Banana_Pi_M2%2B
Since BPi M2+ is more or less a 99% clone of Orange Pi Plus/PC it was
pretty easy to combine OPi PC/Plus stuff to a workin
Jon Smirl wrote:
> Pine 64 has an android/lichee Allwinner code drop from 1/13/16.
> http://wiki.pine64.org/index.php/Pine_A64_Software_Release
>
> Is these anything interesting in it?
>
I don't think the Android image the Pine64 folks provide is based on this.
They might get support from All
Jon Smirl wrote:
>
> I was looking for H3.
>
What about dolphin then?
https://github.com/friendlyarm/h3_lichee/tree/master/tools/pack/chips/sun8iw7p1/configs
Thomas
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Siarhei Siamashka wrote:
So does anyone have any good ideas about how to move forward?
> Or is anyone willing to step up as the 3.4 kernel maintainer for Allwinner
> H3?
>
Neither/nor. Just to save others some time. On top of your branch here and
there a lot of additional patches were collect
Hi,
on the website http://linux-sunxi.org/SATA#Caveats there is stated "Cheap
> port multipliers like JMB321/JMB393", Im just wondering what are the
> good esata multiplier, could you please suggest some?
>
Nope, since using PMs with A20 is no good idea at all (low performance,
risk that p
Benjamin Henrion wrote:
> The naming convention (OrangePi 2, Plus, Minus, etc...) is just a
> nightmare, especially to understand which image is compatible with
> which, considering that the SOC is the same for all.
And it won't get better with the new H3 based Orange Pi One/Lite ;)
But loboris'
Benjamin Henrion wrote:
The few images I tested were full of bugs and needed a kernel update
> to get latest Loboris.eu version.
>
Maybe it's a good idea to point out that while loboris' images/settings fix
many things they're also responsible for worsening the overheating problems
the H3 is b
Siarhei Siamashka wrote:
> It's likely that the credit for "unlocking" the 1.5 GHz clock speed
> actually belongs to third-party modders.
Thanks for clarifying this (and all the additional informations). I'll
try to correct this where I spread wrong "informations"/assumptions
asapissimo.
> As th
Martin wrote:
>
> I know this is a quite old thread, but I would like to implement jpeg
> thumbnail encoding in XMBC (since jpeg HW decoding is working now), but
> gitorious has closed down and therefore the link
> https://gitorious.org/recedro/jepoc
> is no longer working.
> Is this proof of
Siarhei Siamashka wrote:
> Unless we get more test results in a few days which radically change
> the statistics, probably using 624 MHz for DRAM on Orange Pi PC would
> be reasonable.
I second that while also asking the overclocker community for help:
http://www.orangepi.org/orangepibbsen/f
Hi,
Hans de Goede wrote:
>
> ? if I understand things correctly your patch make lima-memtester pass
> at 672 MHz (which is our current configured speed) on both your
> and Siarhei's boards, to me that seems that it fixes things.
>
A few more boards were tested but 672 MHz seem still questionab
Siarhei Siamashka:
> Extracted from the Lubuntu_1404_For_OrangePiPC_v0_8_0_.img.xz image:
>
> http://www.orangepi.org/downloadresources/orangepipc/oragepipc_4a0e8d960f7f0a52606dfaba58.html
>
>
> Not necessarily the best one
>
This is the worst one since it's the origin of all thermal problems
Thomas Kaiser wrote:
>
> I have no multimeter that would be precise enough so I rely on the thermal
> sensors in the 2 SoCs I used to show the difference the clockspeed makes
> depending on dvfs settings.
I bought a powermeter in the meantime and get a difference of ~250mW idle
m.silentcr...@gmail.com wrote:
>
> 1) If the performance governor is the default, it means that a lot of
> boards will run constantly at overvolted out-of-spec settings by default.
> Now, I haven't heard of any issues with boards running at 1.425 or 1.45
> volts. Nevertheless, we don't allow tha
Hello,
to justify the switch from interactive/ondemand to performance as default
cpufreq governor the following 2 year old sources are cited again and
again:
https://www.mail-archive.com/linux-sunxi@googlegroups.com/msg00492.html
https://www.mail-archive.com/linux-sunxi@googlegroups.com/msg0
Siarhei Siamashka wrote:
>
> This patch changes defconfigs to have the following set of governors:
> 1. 'performance' (default)
[...]
> One more reason not to use the 'ondemand' governor by default is
> that the power saving provided by it is not particularly good:
>
> https://www.mail-
Luc Verhaegen wrote:
>Keep it
Nope, this device is completely useless (at least for me). I already
finished my "review" (a severe warning regarding the board's manufacturer
combined with a few technical details I was able to collect).
http://forum.armbian.com/index.php/topic/474-quick-review-of-
Hi,
Maxime Ripard wrote:
>Quite the opposite actually, it would allow people that want to
>deviate from the standard to do so while allowing people that
>want to follow that standard to do so as well.
Well, the majority of people that buy boards because of this specific
26/40 pin header can't do
Hi,
currently it's not possible to edit anything in the wiki. Authentication
problems due to "Warning: Unknown: write failed: No space left on device
(28) in Unknown on line 0"
Best regards,
Thomas
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Luc Verhaegen wrote:
>Keep it, you're doing good work.
Thx, but I don't have any use for such a device (lacks I/O bandwidth
compared to processing power). The only thing I'm really curious about
A83T is the performance. Allwinner's weird press-release is still online:
http://www.allwinnertec
Hi,
anyone interested in one of SinoVoip's Banana Pi M3 to improve A83T
support?
I've been selected to receive a free sample by SinoVoip due to being their
most active forum member (a bit weird since most of the times I advise
there against choosing SinoVoip products due to worst software/support
Hi,
Hans de Goede:
> The Lamobo-R1 has a gpio header idententical to the one found
> on the Banana Pi, i2c2 is routed to pins there.
One thing I forgot to mention before. Please have a look into our Wiki at
the second right picture:
http://linux-sunxi.org/Lamobo_R1#GPIO_header
The Add-On i
Hi,
Hans de Goede wrote:
> The Lamobo-R1 has a gpio header idententical to the one found
> on the Banana Pi, i2c2 is routed to pins there.
That's the reason this header exists in this form and that's the reason
customers buy these boards that expose an 'RPi compatible' 26/40 pin GPIO
header. Tha
Hi,
Hans de Goede wrote:
> On 22-11-15 20:59, Maxime Ripard wrote:
> >> +&cpu0 {
> >> +cpu-supply = <®_dcdc2>;
> >> +operating-points = <
> >> +/* kHz uV */
> >> +96140
> >> +912000140
> >>
Stefan Monnier wrote:
>
> When I looked for a DTS file for this board, I was told that the
> bananapi DTS works just fine
Nope, there are some differences already outlined in the wiki (eg. powering
of a connected SATA disk is AXP209's job -- unless you pull pin PB3 the PMU
won't supply the dis
Ivan Kozic wrote:
> I didn't know if anyone would complain about it being not so structured,
> as I've never updated any public wiki pages
>
You could start summarizing/editing the stuff below
http://linux-sunxi.org/index.php?title=User_talk:Ikozic&action=edit&redlink=1
as long as it's early "
lion wang wrote:
>
> BPI team have test linux kernel 4.1.6 on BPI-M1,BPI-M1+,BPI-M2,BPI-M3
>
Where's the M3 stuff?
And I would assume the only bit of interest inside your forked kernel is
one single file (since everything else already worked before and you didn't
change a single line of code).
Hi,
Maxime Ripard wrote:
>
> So any mechanical change is not something that can be done. Especially
> for something that might blow up your board.
>
Thanks for the warning. I already started to prepare to blow away the
Lamobo R1 I've here by applying the cubietruck device tree settings (for
t
Hi,
Timo wrote:
>
> I think what Maxime was trying to say is, that while all of your boards
> support Cpufreq, only the Cubietruck supports voltage scaling because only
> Cubietruck has the power regulator nodes defined in it's dts file (just
> have a look at the last lines of the Cubitruck dts
Hi,
Maxime Ripard wrote:
> On Fri, Jul 24, 2015 at 04:36:57AM -0700, Thomas Kaiser wrote:
>
> > And this was the kernel config I used:
> >
> https://github.com/igorpecovnik/lib/blob/429867a80c85011b6d31048481c0beb1c7bc76fa/config/linux-sunxi-next.config
>
>
>
Hi,
Hans de Goede wrote:
>
> Is the debian kernel building the axp209 mfd driver, and also
> the axp20x regulator drive, and do these get loaded properly on the
> cubietruck ?
>
Unfortunately I've no idea since i fetch the kernel sources directly from
git.kernel.org/pub/scm/linux/kernel/git/s
Leonardo Canducci wrote:
>
> I've submitted a bug [0] in the Debian BTS and tried kernel 4.0 and 4.1
> from unstable and experimental branches with no success
>
I can confirm that it's neither working with 4.0.4 and 4.1 on cubietruck
(always tried Wheezy):
http://forum.armbian.com/index.ph
And in the meantime somewhere on baidu.com Sinovoip put their Android
sources (using kernel 3.3) for the M2
online: https://github.com/BPI-SINOVOIP/BPI-Kernel4.0/issues/1
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In the meantime someone reverse engineered some stuff for the M2 and saud
to send patches upstream:
http://www.bananapi.com/index.php/forum/general-discussion-for-bpi-m2/995-working-wifi-on-modern-kernels-4-1-tested#2747
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Stefan Monnier wrote:
>
> Could someone comment on the mutual compatibility between these board
> and other systems (e.g. the new Raspberry Pi, which also moved to using
> a TRRS), or even point to cables that they know work?
>
The guy called "answer" seems to be an LeMaker employee:
http://www
Hi,
schroete wrote on 18. Juni 2015 18:02:44 UTC+2:
>
> just seen that Hans did a temperature readout in sunxi-next in the
> sun4i-ts module.
>
If this is responsible for the value reported by
/sys/devices/virtual/thermal/thermal_zone0/temp then the output seems to be
wrong.
Steps to reprodu
Hi,
I added the ressources I use with the Lamobo R1 to its wiki
page: http://linux-sunxi.org/Lamobo_R1#Mainline_U-Boot
Both defconfig/dts file work like a charm after several issues have been
discovered and resolved:
- SATA power definition was missing in manufacturer's fex file:
SATAPWR=SUNX
The board is now on its way to Hans and I just took some pictures before
and created an early wiki stub for
M2: http://linux-sunxi.org/Sinovoip_Banana_Pi_M2
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Hi,
Hans de Goede wrote:
>
> On 18-06-15 08:53, Thomas Kaiser wrote:
> > Anyone interested in a chinese A31s SBC called Banana Pi M2?
>
> I'm interested, so that I can add upstream u-boot and kernel (dts file)
> support for it. If you're ok with donating it to m
Anyone interested in a chinese A31s SBC called Banana Pi M2?
The board works, UART is accessible but the software the vendor provides
(and his attitude) really suck:
http://www.bananapi.com/index.php/forum/general-discussion-for-bpi-m2/895-status-quo-of-m2-regarding-software-support#2538
If any
m.silentcr...@gmail.com wrote:
> Sound interesting. How did your test runs work out?
I found a couple of settings for the Lamobo R1 that might work slightly better
than the default 3/0 TX/RX delay settings. But on Banana Pi and Olimex Lime2
the defaults (3/0 and 0/0) provided the best results.
Hello,
since modifying/setting CONFIG_GMAC_TX_DELAY in u-boot seems to be necessary to
get GMAC work reliable on some boards I wonder whether GMAC_RX_DELAY isn't
worth a look (with many A20 based boards we've here we experience big
differences in TX and RX throughput).
The background is outlin
Small follow-up: I'm refering to GMAC send/receive clock delay chain. For
Banana Pi/Pro it was necessary to set bit 10-12 of the gmac clk register to 3
to get decent network throughput (for Cubietruck it's set to 1 currently).
http://lists.denx.de/pipermail/u-boot/2014-September/190239.html
Th
Benjamin Henrion wrote:
> http://www.pc-magazin.de/ratgeber/banana-pi-r1-router-anleitung-openwrt-bananian-3021511.html
>
> Anyone has ever tested this router? I heard they had problems to make
> the BCM switch working properly.
I have it here and Igor Pečovnik already added support for Mainline
thomas.kai...@phg-online.de wrote:
> In the meantime I realized that it's bit 7 of the touchpanel's TP_CTRL1
> register so when sunxi-dbgreg.ko is loaded I should succeed with
>
> echo 'f1c25004' > /sys/devices/virtual/misc/sunxi-dbgreg/rw/read;
>
> Corentin's code in this module as well as
Christian Ege wrote:
> Am 05.11.2014 12:44 schrieb :
>> Does anyone have a clue how the A20's CHOP_TEMP_EN register (according to
>> the A20's
>> user manual: "Chop temperature calibration enable: 0: Disable, 1: Enable")
>> can be read/set?
>
> For read write access from user space you can try t
clabbe.montjoie wrote:
> For the temperature value, I cannot found any document on how to transform
> the raw value in °C.
> [...]
> Under heavy loads, the temperature of both sensors rise linearly.
But based on a series of tests with and without heatsinks applied to the A20 I
came to the conclu
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