Hi Sean
> On 9/9/20 3:50 AM, Rick Chen wrote:
> > Hi Sean
> >
> >> Clearing MIP doesn't do anything. Whoops. The following commits should
> >> tackle this problem in a more robust manner.
> >
> > I still not catch your points about that this commit 947263033 really
> > help to fix pending IPIs n
Hi Stefan,
On Thu, Sep 10, 2020 at 10:53 AM Stefan Roese wrote:
>
> Hi Rayagonda,
>
> On 09.09.20 19:15, Rayagonda Kokatanur wrote:
> > Hi Stefan,
> >
> > On Wed, Sep 9, 2020 at 1:57 PM Stefan Roese wrote:
> >>
> >> On 09.09.20 10:14, Priyanka Jain wrote:
> >>> This is required to fix
> >>> "Err
Hi,
On 9/1/20 5:57 PM, Yangbo Lu wrote:
> This patch-set is to support eMMC HS200 and HS400 speed modes for
> eSDHC, and enable them on LX2160ARDB board.
looks good to me.
Reviewed-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
>
> CI build link
> https://travis-ci.org/github/yangbolu1991/u-
Hi Rayagonda,
On 09.09.20 19:15, Rayagonda Kokatanur wrote:
Hi Stefan,
On Wed, Sep 9, 2020 at 1:57 PM Stefan Roese wrote:
On 09.09.20 10:14, Priyanka Jain wrote:
This is required to fix
"Error binding driver 'gic-v3': -96"
on lx2160a platforms.
Signed-off-by: Priyanka Jain
---
arch/arm
On 09.09.20 18:10, Ralph Siemsen wrote:
The bitflip test uses two equal sized memory buffers. This is achieved
by splitting the range of memory into two pieces. The address of the
second buffer, as well as the length of each buffer, were not correctly
calculated. This caused bitflip test to acces
On 09/09/2020 14:14, Baruch Siach wrote:
Only set the fdtfile environment variable when not already set.
Fixes: 867572f09ebe6 ("ARM: mvebu: clearfog: run-time selection of DT file")
Cc: Joel Johnson
Reported-by: Andre Heider
Signed-off-by: Baruch Siach
Reviewed-by: Andre Heider
Hi Sean
> Without these fences, it is perfectly valid for an out-of-order core to
> re-order memory accesses to outside of the available_harts_lock critical
> section.
>
> Signed-off-by: Sean Anderson
> ---
>
> arch/riscv/cpu/start.S | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
On Thu, Sep 10, 2020 at 11:52:37AM +0900, AKASHI Takahiro wrote:
> On Wed, Sep 09, 2020 at 12:56:28PM -0400, Tom Rini wrote:
> > On Wed, Sep 09, 2020 at 04:48:30PM +0200, Heinrich Schuchardt wrote:
> > > On 07.09.20 07:34, AKASHI Takahiro wrote:
> > [snip]
> > > > required and partly because there
On Wed, Sep 09, 2020 at 12:56:28PM -0400, Tom Rini wrote:
> On Wed, Sep 09, 2020 at 04:48:30PM +0200, Heinrich Schuchardt wrote:
> > On 07.09.20 07:34, AKASHI Takahiro wrote:
> [snip]
> > > required and partly because there is a problem with virt-make-fs.
> >
> > What problem with virt-make-fs exi
On Wed, Sep 09, 2020 at 04:48:30PM +0200, Heinrich Schuchardt wrote:
> On 07.09.20 07:34, AKASHI Takahiro wrote:
> > Summary
> > ===
> > 'UpdateCapsule' is one of runtime services defined in UEFI specification
> > and its aim is to allow a caller (OS) to pass information to the firmware,
> > i.
On Thu, Sep 10, 2020 at 10:54:18AM +0900, AKASHI Takahiro wrote:
> On Wed, Sep 09, 2020 at 02:30:53PM +0200, Heinrich Schuchardt wrote:
> > On 07.09.20 07:34, AKASHI Takahiro wrote:
> > > This function is essentially independent from tftp, and will also be
> > > utilised in implementing UEFI capsul
On Wed, Sep 09, 2020 at 02:30:53PM +0200, Heinrich Schuchardt wrote:
> On 07.09.20 07:34, AKASHI Takahiro wrote:
> > This function is essentially independent from tftp, and will also be
> > utilised in implementing UEFI capsule update in a later commit.
> > So just give it a more generic name.
> >
mmc_of_parse() can populate the 'f_max' and 'host_caps' fields of
struct mmc_config from devicetree.
The same logic is duplicated in stm32_sdmmc2_probe(). Use
mmc_of_parse(), which is more generic.
Signed-off-by: Alexandru Gagniuc
---
drivers/mmc/stm32_sdmmc2.c | 18 ++
1 file ch
On Tue, Sep 08, 2020 at 05:56:06PM -0600, Simon Glass wrote:
> HI Heinrich,
>
> On Tue, 8 Sep 2020 at 04:29, Heinrich Schuchardt wrote:
> >
> > After removing leading zeros the RSA modulus may be unaligned. On
> > architectures like ARM 32bit unaligned access may lead to a data abort,
> > e.g. wh
This adds the necessary bindings. Most of them are already there.
Signed-off-by: Sean Anderson
Acked-by: Rick Chen
---
(no changes since v2)
Changes in v2:
- Move watchdog enable to k210.dtsi as it does not depend on anything
board-specific.
arch/riscv/dts/k210.dtsi | 1 -
1 file changed,
This enables the necessary config options.
Signed-off-by: Sean Anderson
Reviewed-by: Simon Glass
---
(no changes since v3)
Changes in v3:
- Note dependency on "time: Fix get_ticks being non-monotonic"
- Add a few signed-off-bys which were sent for version 1
board/sipeed/maix/Kconfig | 2 ++
The clock subsystem requires that clk_free be called on clocks obtained via
clk_get_*.
Signed-off-by: Sean Anderson
Reviewed-by: Simon Glass
---
Changes in v4:
- Fix build error without CONFIG_CLK
drivers/watchdog/designware_wdt.c | 18 +-
1 file changed, 13 insertions(+), 5 d
The watchdog won't work if the clock isn't enabled.
Fixes: cf89ef8d10f240554541c20b2e1bdcdd58d1d7e6
Signed-off-by: Sean Anderson
Reviewed-by: Simon Glass
---
(no changes since v1)
drivers/watchdog/designware_wdt.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/watchdog/design
The clock subsystem returns clock rates in Hz. We need to divide by 1000 so
the rate is in kHz.
Fixes: cf89ef8d10f240554541c20b2e1bdcdd58d1d7e6
Signed-off-by: Sean Anderson
Reviewed-by: Simon Glass
---
(no changes since v1)
drivers/watchdog/designware_wdt.c | 2 +-
1 file changed, 1 insertion
log_2_n_round_up is only found in arm. fls performs the same job and is
generic.
Signed-off-by: Sean Anderson
Reviewed-by: Simon Glass
---
(no changes since v2)
Changes in v2:
- Fix fls being off-by-one when compared to log_2_n_round_up
drivers/watchdog/designware_wdt.c | 3 +--
1 file chang
This is preferred over #if because the compiler can check syntax even if
the feature is disabled. This cannot be used for CONFIG_CLK because
CONFIG_DW_WDT_CLOCK_KHZ is not defined on all platforms.
Signed-off-by: Sean Anderson
Reviewed-by: Heinrich Schuchardt
---
(no changes since v1)
drivers
This series depends on
https://patchwork.ozlabs.org/project/uboot/list/?series=200642
Changes in v4:
- Fix build error without CONFIG_CLK
Changes in v3:
- Note dependency on "time: Fix get_ticks being non-monotonic"
- Add a few signed-off-bys which were sent for version 1
Changes in v2:
- Fix fl
On 9/1/20 4:07 PM, Sean Anderson wrote:
> The clock subsystem requires that clk_free be called on clocks obtained via
> clk_get_*.
>
> Signed-off-by: Sean Anderson
> Reviewed-by: Simon Glass
> ---
>
> (no changes since v1)
>
> drivers/watchdog/designware_wdt.c | 17 -
> 1 file
On 6/24/20 6:47 AM, Sean Anderson wrote:
> For clocks not in the CCF, their parents will not have UCLASS_CLK, so we
> just enable them as normal. The enable count is local to the struct clk,
> but this will never result in the actual en-/dis-able op being called
> (unless the same struct clk is ena
On 6/30/20 5:55 AM, Sean Anderson wrote:
> On 3/20/20 3:10 AM, Lukasz Majewski wrote:
>> On Fri, 20 Mar 2020 01:53:16 -0400
>> Sean Anderson wrote:
>>
>>> Some of the debug messages in the clock subsystem can be made more
>>> informative by adding the clock name or adding the explicit error.
>>>
>
On 9/1/20 4:07 PM, Sean Anderson wrote:
> This series depends on
> https://patchwork.ozlabs.org/project/uboot/patch/20200901195548.542737-1-sean...@gmail.com/
A note for those following along at home: after further investigation,
this series depends on [1]. It works with v1 of the above patch (as
On 09/09/2020 02:56, Simon Glass wrote:
> On Tue, 8 Sep 2020 at 10:37, Alper Nebi Yasak
> wrote:
>>
>> result = {}
>> tag = None
>> for line in my_data.decode('utf-8').splitlines():
>> m_tag = re_tag.match(line)
>> if line.startswith('#'):
>> continue
>>
On 09/09/2020 02:56, Simon Glass wrote:
> On Tue, 8 Sep 2020 at 11:33, Alper Nebi Yasak
> wrote:
>> I might be too late to say this but the SEQ thing looks ugly to me.
>> Maybe there could be some generic control-flow-like nodes that could
>> generate and insert things in their own place. If it m
get_ticks does not always succeed. Sometimes it can be called before the
timer has been initialized. If it does, it returns a negative errno.
This causes the timer to appear non-monotonic, because the value will
become much smaller after the timer is initialized.
No users of get_ticks which I chec
The interrupt controller property is removed from the clint binding because
the clint is not an interrupt-controller. That is, no other devices have an
interrupt which is controlled by the clint.
Signed-off-by: Sean Anderson
---
Changes in v4:
- Remove clock-frequency property from k210 clint bi
We currently do this in a u-boot specific dts, but hopefully we can get
these bindings added in Linux in the future.
Signed-off-by: Sean Anderson
Reviewed-by: Pragnesh Patel
---
This patch builds but has NOT been tested.
Changes in v4:
- Both the Andes PMLT and Sifive CLINT now fall back on tim
The riscv-timer driver currently serves as a shim for several riscv timer
drivers. This is not too desirable because it bypasses the usual timer
selection via the driver model. There is no easy way to specify an
alternate timing driver, or have the tick rate depend on the cpu's
configured frequency
This converts the PLMT driver from the riscv-specific timer interface to be
a DM-based UCLASS_TIMER driver.
The clock-frequency/clocks properties are preferred over timebase-frequency
for two reasons. First, properties which affect a device should be located
near its binding in the device tree. Us
This function is designed to be used when a timer used to be initialized by
the cpu (e.g. RISC-V timers), but now is initialized by dm_timer_init. In
such a case, the timer may prefer to use the clocks and clock-frequency
properties, but should be able to fall back on using the cpu's
timebase-frequ
Another "virtual" clock (in the sense that it isn't configurable). This
could possibly be done as a clock in the device tree, but I think this is a
bit cleaner.
Signed-off-by: Sean Anderson
---
checkpatch still complains about this one, but I don't see any reason to
break it up even further. It d
This converts the clint driver from the riscv-specific interface to be a
DM-based UCLASS_TIMER driver. In addition, the SiFive DDR driver previously
implicitly depended on the CLINT to select REGMAP.
Unlike Andes's PLMT/PLIC (which AFAIK never have anything pass it a dtb),
the SiFive CLINT is part
This series cleans up the timer drivers in RISC-V and converts them to DM.
This series needs to be tested! I have only tested it on QEMU and the K210.
Notably, this means that the HiFive and anything Andes is completely untested.
Changes in v4:
- Both the Andes PMLT and Sifive CLINT now fall back
This merges the PLIC initialization code from two functions into one.
Signed-off-by: Sean Anderson
Reviewed-by: Bin Meng
---
This patch builds but has NOT been tested.
(no changes since v1)
arch/riscv/lib/andes_plic.c | 58 -
1 file changed, 25 insertions(+
https://gitlab.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/4631
>
> Thanks,
> Patrick
>
> git request-pull origin/master
> https://gitlab.denx.de/u-boot/custodians/u-boot-stm.git u-boot-stm32-20200909
>
> The following changes since commit 96d66a9b8ce11aae9f8bef52
On Wed, 9 Sep 2020 10:13:50 +0200
Matthias Brugger wrote:
> Hi Tom,
>
> Please have a look at the second round of patches for the RPi. Two patches
> fixes
> the network driver of the RPi4 which didn't work reliable. Another patch
> enables
> USB keyboard for 32 bit RPi4.
>
> Petr tested the
On 9/9/20 11:07 AM, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias"
>
> This fixes some build issues with large (> 1MB) PIE U-Boot setups.
> We also document the 4K aligned load address requirement and
> add an early run-time check for it.
>
> As requested by reviewers, I've also added a ru
Hi Jasper,
On Wed, Sep 09, 2020 at 07:03:58PM +0200, Jasper van Santen wrote:
I am sorry to ask such a basic question, but i really can't find any
documentation on the commands possible in scripting.
Documentation of Hush and its commands i can't find.
The hush shell gives you the ability to
Hi Stefan,
On Wed, Sep 9, 2020 at 1:57 PM Stefan Roese wrote:
>
> On 09.09.20 10:14, Priyanka Jain wrote:
> > This is required to fix
> > "Error binding driver 'gic-v3': -96"
> > on lx2160a platforms.
> >
> > Signed-off-by: Priyanka Jain
> > ---
> > arch/arm/lib/gic-v3-its.c | 5 +
> > 1
Hi,
I am sorry to ask such a basic question, but i really can't find any
documentation on the commands possible in scripting.
Documentation of Hush and its commands i can't find.
I am working with the script in u-boot env below.
I can read it, but just because i am guessing.
Any help is apprecia
From: "Edgar E. Iglesias"
Trap non-PIE builds early if the start address doesn't match
between run-time and link-time. This will trap the startup
sequence rather than letting it run into obscure errors.
Signed-off-by: Edgar E. Iglesias
---
arch/arm/cpu/armv8/start.S | 13 +
1 file
From: "Edgar E. Iglesias"
PIE requires a 4K aligned load address. If this is not met, trap
the startup sequence in a WFI loop rather than running into obscure
failures.
Tested-by: Michal Simek
Suggested-by: André Przywara
Signed-off-by: Edgar E. Iglesias
---
arch/arm/cpu/armv8/start.S | 17 +
From: "Edgar E. Iglesias"
Linking a U-Boot larger than 1MB fails with PIE enabled:
u-boot/arch/arm/cpu/armv8/start.S:71:(.text+0x3c): relocation
truncated to fit: R_AARCH64_ADR_PREL_LO21 against symbol `__rel_dyn_end'
defined in .bss_start section in u-boot.
This extends the supported range by u
From: "Edgar E. Iglesias"
Mention the requirement of 4K aligned load addresses in the
help section for the POSITION_INDEPENDENT option.
Suggested-by: Michal Simek
Signed-off-by: Edgar E. Iglesias
---
arch/arm/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch
From: "Edgar E. Iglesias"
This fixes some build issues with large (> 1MB) PIE U-Boot setups.
We also document the 4K aligned load address requirement and
add an early run-time check for it.
As requested by reviewers, I've also added a runtime check for
non-PIE builds to trap the startup sequence
On Wed, Sep 09, 2020 at 04:48:30PM +0200, Heinrich Schuchardt wrote:
> On 07.09.20 07:34, AKASHI Takahiro wrote:
[snip]
> > required and partly because there is a problem with virt-make-fs.
>
> What problem with virt-make-fs exists? How will this be solved?
This I suspect is related to the diffic
Add tests for SCMI reset controllers. A test device driver
sandbox-scmi_devices.c is used to get reset resources, allowing further
resets manipulation.
Change sandbox-smci_agent to emulate 1 reset controller exposed through
an agent. Add DM test scmi_resets to test this reset controller.
Signed-o
This change introduces a reset controller driver for SCMI agent devices.
When SCMI agent and SCMI reset domain drivers are enabled, SCMI agent
binds a reset controller device for each SCMI reset domain protocol
devices enabled in the FDT.
SCMI reset driver is embedded upon CONFIG_RESET_SCMI=y. If
Add tests for SCMI clocks. A test device driver sandbox-scmi_devices.c
is used to get clock resources, allowing further clock manipulation.
Change sandbox-smci_agent to emulate 3 clocks exposed through 2 agents.
Add DM test scmi_clocks to test these 3 clocks.
Update DM test sandbox_scmi_agent with
This change introduces a clock driver for SCMI agent devices. When
SCMI agent and SCMI clock drivers are enabled, SCMI agent binds a
clock device for each SCMI clock protocol devices enabled in the FDT.
SCMI clock driver is embedded upon CONFIG_CLK_SCMI=y. If enabled,
CONFIG_SCMI_AGENT is also ena
Dump SCMI DT bindings documentation from Linux kernel source
tree v5.8-rc1.
Signed-off-by: Etienne Carriere
Reviewed-by: Simon Glass
---
No change in v4.
No change in v3.
Changes in v2:
- No change but added R-b tag.
- Yet a question: do we need to add this binding doc in U-Boot
since alrea
This change implements a SMCCC transport for SCMI exchanges. This
implementation follows the Linux kernel as references implementation
for SCMI message processing, using the SMT format for communication
channel meta-data.
Use of SMCCC transport in SCMI FDT bindings are defined in the Linux
kernel
This change implements a mailbox transport using SMT format for SCMI
exchanges. This implementation follows the Linux kernel and
SCP-firmware [1] as references implementation for SCMI message
processing using SMT format for communication channel meta-data.
Use of mailboxes in SCMI FDT bindings are
This change introduces SCMI agent uclass to interact with a firmware
using the SCMI protocols [1].
SCMI agent uclass currently supports a single method to request
processing of the SCMI message by an identified server. A SCMI message
is made of a byte payload associated to a protocol ID and a mess
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay
---
drivers/net/dwc_eth_qos.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index
Move the variables definition at the beggining of the function
gpio_stm32_probe().
Signed-off-by: Patrick Delaunay
---
drivers/gpio/stm32_gpio.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/gpio/stm32_gpio.c b/drivers/gpio/stm32_gpio.c
index 5bff27f75b.
Add test on the size of ofnode_phandle_args result to avoid access
to uninitialized elements in args[] field.
This patch avoids the issue when gpio-ranges cell size is not 3 as
expected, for example:
gpio-ranges = <&pinctrl 0>;
instead of
gpio-ranges = <&pinctrl 0 112 16>;
Signed-
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay
---
drivers/gpio/gpio-uclass.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c
index
The bitflip test uses two equal sized memory buffers. This is achieved
by splitting the range of memory into two pieces. The address of the
second buffer, as well as the length of each buffer, were not correctly
calculated. This caused bitflip test to access beyond the end of range.
This patch fixe
Cosmetics: Add header with SPDX licence
Signed-off-by: Patrick Delaunay
---
drivers/pinctrl/pinctrl_stm32.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c
index 24ed83dd46..dbea99532c 100644
--- a/drivers/pinctrl/pinctr
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay
---
drivers/pinctrl/pinctrl_stm32.c | 43 ++---
1 file changed, 23 insertions(+), 20 deletions(-)
diff --git a/drivers/pinctrl/pinctrl_s
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay
---
drivers/mailbox/stm32-ipcc.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/mailbox/stm32-ipcc.c b/drivers/mailbox/stm32-ip
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay
---
drivers/video/stm32/stm32_ltdc.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm
Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the
driver can support live DT.
Signed-off-by: Patrick Delaunay
---
drivers/video/stm32/stm32_dsi.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/video/stm32/stm32_dsi.c b/drivers/video/stm32/stm32
The bitflip test uses two equal sized memory buffers. This is achieved
by splitting the range of memory into two pieces. The address of the
second buffer, as well as the length of each buffer, were not correctly
calculated. This caused bitflip test to access beyond the end of range.
This patch fixe
On 09.09.20 17:21, Ralph Siemsen wrote:
The bitflip test uses two equal sized memory buffers. This is achieved
by splitting the range of memory into two pieces. The address of the
second buffer, as well as the length of each buffer, were not correctly
calculated. This caused bitflip test to acces
The bitflip test uses two equal sized memory buffers. This is achieved
by splitting the range of memory into two pieces. The address of the
second buffer, as well as the length of each buffer, were not correctly
calculated. This caused bitflip test to access beyond the end of range.
This patch fixe
/master
https://gitlab.denx.de/u-boot/custodians/u-boot-stm.git u-boot-stm32-20200909
The following changes since commit 96d66a9b8ce11aae9f8bef5244b83b4740b37644:
Prepare v2020.10-rc4 (2020-09-07 14:17:33 -0400)
are available in the Git repository at:
https://gitlab.denx.de/u-boot
Hi Stefan,
On Wed, Sep 09, 2020 at 05:13:49PM +0200, Stefan Roese wrote:
Usually the RB is only added, when not too many further changes are
made by the committer. There is no strict rule here AFAIK.
In that case I'll omit your RB on v3 as the change is somewhat larger,
and includes the "unr
Hi Ralph,
On 09.09.20 17:07, Ralph Siemsen wrote:
Hi Stefan,
On Wed, Sep 09, 2020 at 03:53:08PM +0200, Stefan Roese wrote:
Hi Ralph,
On 09.09.20 15:49, Ralph Siemsen wrote:
Very good, I will send a separate patch that adds a Kconfig option.
As it turns out, doing a separate patch for this
Hi Stefan,
On Wed, Sep 09, 2020 at 03:53:08PM +0200, Stefan Roese wrote:
Hi Ralph,
On 09.09.20 15:49, Ralph Siemsen wrote:
Very good, I will send a separate patch that adds a Kconfig option.
As it turns out, doing a separate patch for this gets messy, and also
would introduce a dependency
Patrick DELAUNAY would like to recall the message, "[PULL] Pull request:
u-boot-stm32 for v2020.10= u-boot-stm32-20200909".
/master
https://gitlab.denx.de/u-boot/custodians/u-boot-stm.git u-boot-stm32-20200909
The following changes since commit 96d66a9b8ce11aae9f8bef5244b83b4740b37644:
Prepare v2020.10-rc4 (2020-09-07 14:17:33 -0400)
are available in the Git repository at:
https://gitlab.denx.de/u-boot
On Wed, 9 Sep 2020 at 16:35, Simon Glass wrote:
>
> Hi Etienne,
>
> On Wed, 9 Sep 2020 at 03:58, Etienne Carriere
> wrote:
> >
> > On Tue, 8 Sep 2020 at 17:21, Simon Glass wrote:
> > >
> > > Hi Etienne,
> > >
> > > On Mon, 7 Sep 2020 at 08:50, Etienne Carriere
> > > wrote:
> > > >
> > > > Add t
On 07.09.20 07:34, AKASHI Takahiro wrote:
> Summary
> ===
> 'UpdateCapsule' is one of runtime services defined in UEFI specification
> and its aim is to allow a caller (OS) to pass information to the firmware,
> i.e. U-Boot. This is mostly used to update firmware binary on devices by
> instruct
On Wed, 9 Sep 2020 at 06:33, Wolfgang Wallner
wrote:
>
> Currently, the calculation for the length of the DSDT table includes any
> bytes that are added for alignment, but those bytes are not initialized.
>
> This is because the DSDT length is calculated after a call to
> acpi_inc_align(). Split t
Hi Pratyush,
On Tue, 8 Sep 2020 at 21:53, Pratyush Yadav wrote:
>
> On 08/09/20 05:56PM, Simon Glass wrote:
> > On Mon, 7 Sep 2020 at 23:40, Pratyush Yadav wrote:
> > >
> > > From: Jean-Jacques Hiblot
> > >
> > > Add a test to verify that GPIOs can be acquired/released using the managed
> > > A
Hi Etienne,
On Wed, 9 Sep 2020 at 03:41, Etienne Carriere
wrote:
>
> On Tue, 8 Sep 2020 at 17:21, Simon Glass wrote:
> >
> > Hi Etienne,
> >
> > On Mon, 7 Sep 2020 at 08:50, Etienne Carriere
> > wrote:
> > >
> > > This change implements a SMCCC transport for SCMI exchanges. This
> > > implement
On Wed, 9 Sep 2020 at 06:33, Wolfgang Wallner
wrote:
>
> Add a missing memset to acpi_create_spcr().
>
> The other acpi_create_() functions perform a memset on their
> structures, acpi_create_spcr() does not and as a result the contents of
> this table are partly uninitialized (and thus random
Hi Etienne,
On Wed, 9 Sep 2020 at 03:58, Etienne Carriere
wrote:
>
> On Tue, 8 Sep 2020 at 17:21, Simon Glass wrote:
> >
> > Hi Etienne,
> >
> > On Mon, 7 Sep 2020 at 08:50, Etienne Carriere
> > wrote:
> > >
> > > Add tests for SCMI clocks. A test device driver sandbox-scmi_devices.c
> > > is u
On Wed, Sep 09, 2020 at 10:13:50AM +0200, Matthias Brugger wrote:
> Hi Tom,
>
> Please have a look at the second round of patches for the RPi. Two patches
> fixes the network driver of the RPi4 which didn't work reliable. Another
> patch enables USB keyboard for 32 bit RPi4.
>
> Petr tested the
On 9/9/20 4:05 PM, Bin Meng wrote:
> On Wed, Sep 9, 2020 at 10:02 PM Marek Vasut wrote:
>>
>> On 9/9/20 3:46 PM, Bin Meng wrote:
>>> On Wed, Sep 9, 2020 at 7:05 PM Marek Vasut wrote:
On 9/9/20 3:55 AM, Bin Meng wrote:
> Hi Marek,
Hi,
> On Wed, Sep 9, 2020 at 12:15
On Wed, Sep 09, 2020 at 10:05:42PM +0800, Bin Meng wrote:
> On Wed, Sep 9, 2020 at 10:02 PM Marek Vasut wrote:
> >
> > On 9/9/20 3:46 PM, Bin Meng wrote:
> > > On Wed, Sep 9, 2020 at 7:05 PM Marek Vasut wrote:
> > >>
> > >> On 9/9/20 3:55 AM, Bin Meng wrote:
> > >>> Hi Marek,
> > >>
> > >> Hi,
>
On Wed, Sep 9, 2020 at 10:02 PM Marek Vasut wrote:
>
> On 9/9/20 3:46 PM, Bin Meng wrote:
> > On Wed, Sep 9, 2020 at 7:05 PM Marek Vasut wrote:
> >>
> >> On 9/9/20 3:55 AM, Bin Meng wrote:
> >>> Hi Marek,
> >>
> >> Hi,
> >>
> >>> On Wed, Sep 9, 2020 at 12:15 AM Marek Vasut wrote:
>
> O
On 9/9/20 3:46 PM, Bin Meng wrote:
> On Wed, Sep 9, 2020 at 7:05 PM Marek Vasut wrote:
>>
>> On 9/9/20 3:55 AM, Bin Meng wrote:
>>> Hi Marek,
>>
>> Hi,
>>
>>> On Wed, Sep 9, 2020 at 12:15 AM Marek Vasut wrote:
On 9/8/20 5:45 PM, Bin Meng wrote:
> Hi Marek,
Hi,
> O
Hi Ralph,
On 09.09.20 15:49, Ralph Siemsen wrote:
Hi Stefan,
On Wed, Sep 09, 2020 at 03:34:35PM +0200, Stefan Roese wrote:
I agree that it's too time consuming (usually) for a manufacturing test.
Either you are okay with disabling CONFIG_SYS_ALT_MEMTEST on your board,
which will also disable
Hi,
I found that there is a change in building U-Boot for Raspberry pi 4.
1. Kernel address space is increased.
2. Need to add respective *.dtb files to the /boot.
3. boot.src and boot.txt files were added to the /boot.
Please refer to the following links for more information.
https://github.com/
On 9/8/20 6:59 PM, Frank Wunderlich wrote:
[...]
> +static u32 xhci_td_remainder(struct xhci_ctrl *ctrl, int transferred,
> + int trb_buff_len, unsigned int td_total_len,
> + int maxp, bool more_trbs_coming)
> {
> - int packets_transferred;
> +
Hi Stefan,
On Wed, Sep 09, 2020 at 03:34:35PM +0200, Stefan Roese wrote:
I agree that it's too time consuming (usually) for a manufacturing test.
Either you are okay with disabling CONFIG_SYS_ALT_MEMTEST on your board,
which will also disable this bitflip test. Or please continue adding a
new K
On Wed, Sep 9, 2020 at 7:05 PM Marek Vasut wrote:
>
> On 9/9/20 3:55 AM, Bin Meng wrote:
> > Hi Marek,
>
> Hi,
>
> > On Wed, Sep 9, 2020 at 12:15 AM Marek Vasut wrote:
> >>
> >> On 9/8/20 5:45 PM, Bin Meng wrote:
> >>> Hi Marek,
> >>
> >> Hi,
> >>
> >>> On Tue, Sep 8, 2020 at 7:13 PM Marek Vasut
On 09.09.20 15:02, Ralph Siemsen wrote:
The bitflip test uses two equal sized memory buffers. This is achieved
by splitting the range of memory into two pieces. The address of the
second buffer, as well as the length of each buffer, were not correctly
calculated. This caused bitflip test to acces
Hi Ralph,
On 09.09.20 15:06, Ralph Siemsen wrote:
Hi Stefan,
On Wed, Sep 09, 2020 at 10:49:29AM +0200, Stefan Roese wrote:
Hi Ralph,
Thanks for finding and fixing this:
I've sent a v2 with the suggested changes.
Yes, thanks.
Have also noticed that mtest takes considerably longer when doi
From: Jean-Philippe ROMAIN
Enable the fastboot oem command format and set the variable
"partitions" with default eMMC partitions list.
Signed-off-by: Patrick Delaunay
Signed-off-by: Jean-Philippe ROMAIN
---
configs/stm32mp15_basic_defconfig | 1 +
configs/stm32mp15_trusted_defconfig | 1
Enable the fastboot oem command bootbus, used to configure the eMMC
boot behavior, with same format than 'mmc bootbus'
and with parameter: boot_bus_width reset_boot_bus_width boot_mode
On stm32mp1 boards the expected command is
$> fastboot oem partconf:0 0 0
Signed-off-by: Patrick Delaunay
---
From: Jean-Philippe ROMAIN
Activate fastboot support on boot partition for eMMC, mmc1 device
on STMicroelectronics board (EV1).
Signed-off-by: Jean-Philippe ROMAIN
Signed-off-by: Patrick Delaunay
---
configs/stm32mp15_basic_defconfig | 5 +
configs/stm32mp15_trusted_defconfig | 5 +
Enable the fastboot oem command partconf, used to select the correct
eMMC boot partition, with same format than 'mmc partconf'
with parameter: boot_ack boot_partition
On stm32mp1 family:
- boot_ack = 1 (Boot Acknowledge is needed by ROM code)
- boot_partition = 1 or 2 (Boot partition 1 / 2 enabled
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