Yes.
You are welcome to email patches for Greg to integrate to this mailing
list.
--
Michael
On 2015-12-04 (W49) 10:51 AM, Lennart Sorensen wrote:
On Fri, Dec 04, 2015 at 10:37:15AM -0500, Michael wrote:
Andrew the CVS died the death about 5 years ago. Mike Frysinger and
others from ADI
Andrew the CVS died the death about 5 years ago. Mike Frysinger and
others from ADI had already converted it to a GIT repo .. but no one
provided
a copy of the new repo(s) back for uClinux.org to host for them.
On 2015-12-04 (W49) 9:48 AM, Andrew Cagney wrote:
Hi,
The link to the CVS reposit
Hi uClinux hackers,
A question just triggered by interest, because I am using this chip -
not with Linux but with a homebrew preemptive multitasking OS.
Does anybody use 68 K uCLinux on a Fido ?
-Michael
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Ted,
I notice your gcc is set to a default Coldfire -m5307 .. but you are making use
of a MCF5329 processor. I think it is more correct to use -mcpu=5329 for the
MCF532x CPUs.
Regards,
Michael
mdurr...@uclinux.org
On 11/15/2013 08:27 PM, Ted Victorio wrote:
I compiled Openswan user apps
Doug,
They did reorganize a few things. Best to look at the top level
for hardware projects:
http://blackfin.uclinux.org/doku.php?id=projects
Regards,
Michael
mdurr...@uclinux.org
On 12/04/2013 01:07 PM, Doug Wellington wrote:
Hi!
I searched the web site a bit and downloaded the last few
a
or perhaps
turn hardware flow control on.
Michael
On 11/06/2013 04:40 AM, Raju B wrote:
Hi Michael,
The ColdFire is 523x and using UART serial interface.
Thanks & regards,
Raju B
On Tue, Nov 5, 2013 at 10:47 PM, Michael Durrant mailto:mdurr...@uclinux.org>> wrote:
Raj,
Which ColdFire are you using?
Which serial interface are you seeing this with (UART/SPI/I2C/..)?
Michael
On 11/05/2013 07:40 AM, Raju B wrote:
whenever i am trying to receive data from serial communication continuously in
uClinux, I am getting every 10th byte is overwrite by 11 byte
regions on the fly.
Thanks again,
-Michael
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I found that this
https://access.redhat.com/site/solutions/15482
answers a lot of questions on that behalf.
It's about Readhat. Maybe something similar is available for Debian, too...
-Michael
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see.
(I just don't know where to ask embedded "non uCLinux" questions, so I
thought here would be the best place for strictly embedded Linux
questions, even with MMU involved.)
Thanks a lot !
-Michael
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"very hard realtime" program on same, that of course
needs hardware interrupts. On top of this, the article will help to
implement communication between Linux and this processor/program.
Thanks,
-Michael
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uClinux-
ISRs run
there only dedicatedly interrupting the "main loop" and not ever being
blocked by any Linux activity ?
- what about MMU issues ?
For example I (e.g.) would like a (now rather cheap) standard quadcore
ARM Cortex A9 processor chip and modify a Debian distribution in a way
that support
e binary a second time
might be inappropriate due to loading time and memory hogging. Thus
using threads might be a better idea.
-Michael
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This m
" also includes creating threads (parent and child
share memory, open files and other stuff). But this is better achieved
using Posix Threads provided by ptheradlib. I suppose pthreadlib is
available for nearly all archs.
-Michael
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On 08/08/2012 04:04 PM, Michael Schnell wrote:
With "volatile" the code is a lot worse, I don't understand this, as
the "normal" code not only fulfills what is necessary to volatile ...
In fact the compiler might be right that "volatile" also includes
list
or a guarantee.
-Michael
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ought to do that.
In fact I found that the compiler does create decent code for
non-volatile variables but when specifying volatile the code gets a lot
worse, even though the normal code already fulfills all specs necessary
for volatile variables.
-Mi
but even
is "thread-atomic", as a thread switch does not do an interrupt within a
single instruction, not even with the Fido that provides _hardware_ threads.
Thanks a lot for discussing this with me.
-Michael
On 08/03/2012 03:34 PM, Luis Alves wrote:
Hi Michael,
Here is the res
ost work
is done within registers (thus "RISC-friendly").
-Michael
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nto a completely different instruction sequence than when optimizing
for CPU32.
-Michael
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ing memory in a not
explicitly volatile way).
thanks,
-Michael
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le.
I did not intend to define the volatile variables within the function
(thus on the stack) but outside (as global memory based variables).
-Michael
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mpiler :-[ .
I'll check this out with my compiler version.
Thanks a lot !
-Michael
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0x80; yx |= 0x0x8000;
should create
BSET 7, xx+3 and BSET 7, xy
and
if (xy & 0x4000)
should create BTST 6, xy+2
and xy=xx
should create MOVE.L xx, xy
-Michael
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On 08/03/2012 11:48 AM, Luis Alves wrote:
At the moment I'm still using gcc 4.2.x
In fact I have been provided with a 4.4.x version.
So I am slightly better off.
-Michael
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ly dare to consider) .
-Michael
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My very old MRI compiler for the 332 is a lot better on that behalf.
Is there any chance to find a more decent 68 K GNU C compiler ?
Thanks a lot,
-Michael
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I have unsubscribed Mr Kim manually.
For those who would like to unsubscribe the link is in the mailing list's email
footer.
To unsubscribe see:
http://mailman.uclinux.org/mailman/options/uclinux-dev
Regards,
Michael
On 04/26/2012 03:13 PM, kkim1...@yahoo.com wrote:
> I unsubscri
them of the site as
well.
Regards,
Michael Durrant
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On 08/17/2011 12:17 PM, Philipp Brejcha wrote:
I did not really find some descriptions concerning SLIP an uClinux.
Obviously you need a "description concerning SLIP and UBoot.
Maybe you'd better ask in a Denx forum.
-Michael
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dware and driver
dependencies that are not available on a PC. here sometimes simulation
might help.
-Michael
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Ken,
I think the bootloader Phil is using does not setup nor load a splash
image into the frame buffer.I believe he is making use of Kernel to
initiate the LCD driver for the MCF5328.
Michael Durrant
www.arcturusnetworks.com
On 07/19/2010 07:54 AM, Sallings, Kenneth (STRT) wrote:
> P
Phillip
Back in April, 7th 2010 Alessandro Guerra and Bruce Christensen
had a short thread on using the 20090618 distribution with the
20100217 patch with a few MCF5329 based boards.
Which tool chain and distro source versions are you using?
Regards
Michael Durrant
Philip Mason wrote
Hello,
i have a problem by compiling the kernel 2.6.33.1 with gcc-3.4.3 for an
ARM7TDMI.
In the linking step i get the message:
arch/arm/mm/dma-mapping.c:433: undefiened reference to
'cpu_arm7tdmi_set_pte_ext'
Maybe someone can help me ?
Thanks
The company I work for has long-stable software implementation based on uCLinux
Coldfire.
Some of our apps are approaching a size limit that I believe is caused by the
use of -msep-data (which I believe is used for XIP support - which we don't
use). Here's a typical link error from this chang
NIXes) was created as a
version of fork that does not copy and thus is less expensive. But
AFAIK, in Linux fork always does lazy copy and so copying is avoided in
the "fork...exec" case. In Linux fork is not provided with (no-MMU)
systems that c
re obsolete and the source code of
the appropriate program should be changed.
-Michael
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Thanks for the feed back.
--
Michael
On 10-03-08 3:05 PM, Roger Thornblad wrote:
Hi,
FYI, I noticed that when I tried the download link on uclinux.org
I got a not found error. Had to get the tools using the links in some
of Gregs posts.
-Roger
tate of 5K/7K Linux ?
-Michael
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Great :)
is this just a hobby or do you plan any application for this ?
-Michael
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To
I will be out of the office starting 02/06/2010 and will not return until
02/19/2010.
I will respond to your message when I return.
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This messa
Mike Frysinger wrote:
> On Tuesday 19 January 2010 10:52:15 Michael Durrant wrote:
>
>> a page such as www.uclinux.org/bFLT as well as add the link to the
>> side bar.
>>
>
> the new page says "uClinus
n.uclinux.org/doku.php?id=toolchain:elf2flt
>
>> i'll probably start a FLAT page as well using this as a base:
>> http://www.beyondlogic.org/uClinux/bflt.htm
>>
>
> Need to check with Craig Peacock first. (craig.peac...@beyondlogic.org)
>
I have already
and 32 (and more) with automatic multiplexing/demultiplexing. But
AFAIK, there is a bug (in older Quartus software) that creates erroneous
multiple identical write accesses in some of these cases.
-Michael
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RAM bus.
I feel that some 4 MB of internal RAM, 2MB of FLASH or no internal FLASH
(very unusual for Microchip) but a serial bus for booting from a 8 pin
FLASH device would be a really great chip !
-Michael
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FastCGI)
or a propriety way.
In fact Extpascal comes with such a gateway that creates FastCGI
communication from the web server's CGI requests. Maybe I can use same,
but I'd like to avoid the complexity by using an FCGI aware webserver.
-Michael
__
Martin Mensch wrote:
>
>
> PIC32?
I heard rumors that Microchip is going to offer a PIC32 chip that can do
Linux. I don't know if this chip will have enough internal memory or if
external memory chips needs top be used.
-Michael
_
that Lighttpd might be usable. Did
anybody use same on uClinux-dist ?
-Michael
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thiago wrote:
> Is there a tool that simulates platforms that I can use to test my
> kernel build?
>
I suppose this depends on the hardware you are intending to have the
Kernel run on. (X86: VMWare, Virtual Box,... ; ARM: Armulator, ...; ...)
ow
how much developing effort this asks for.
> This electronic transmission is strictly confidential...
Please don't use multiline footers in a public mailing list. this is
highly impolite.
-Michael
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OOps:
... standard http server
-Michael
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Jamie Lokier wrote:
> Look up comet/long-poll/long-get/reverse-ajax
> (all names for the same thing). I'm implementing it now for a board.
Do you do so on top of - or working through - boa or some other standard
browser ?
I might be interested in using this, too
ation
stuff (e.g. to files) via command line programs.
Boa and haserl do come with my community based uClinux distribution.
-Michael
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This messag
"make menuconfig" if
additional builtin functions should be enabled.
-Michael
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Thanks for answering.
I found it "unfortunate" that hush did not have built-in cat, when doing
haserl scripts (otherwise much better with hush than with the
depreciated msh).
Do others agree that it's desirable ?
If yes I might plan to add this feature some day
IIRC, cat is not built-in with hush (unfortunately !).
-Michael
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Cappelletti Fabio wrote:
> hush: cannot exec '`cat': No such file or directory
Either you did not create the cat executable in /bin or the $PATH is not
set correctly.
-Michael
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Arthur Wong wrote:
> and msh have a limitless
> cycle as the original init program.
Please do switch to hush, as msh is phased out.
-Michael
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Arthur Wong wrote:
>
> I have write a small c program (only use the "system()" function to run
> /etc/rc), and build as "init".
AFAIK, not necessary thus not recommended.
The init program (or script) of course should not return (stop), as it's
the
preciated since some time, you should use hush instead.
-Michael
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stribution uses gcc 4. I do suppose that gcc4 can do a better
optimization but most important for me is that gcc4 supports TLS
("Thread Local Storage") and thus the "__thread" keyword and NPTL.
-Michael
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ome complexity in other areas.
Within the FPGA, the MMU does introduce considerable additional coast in
terms of needed gates and internal memory blocks.
-Michael
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sharing memory), IMHO, you should use pthreadlib instead of
fork() anyway).
-Michael
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linx only), you can configure it to include
an MMU or not. There are Linux ports for both processors in both
configurations (NIOS-MMU upcoming right now).
-Michael
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If you are looking for support for the Arcturus uC53281 / Freescale
MCF53281 VoIP hardware you should contact Arcturus Networks Inc. for
direct support.
You can register for support at http://www.arcturusnetworks.com/support/
--
Michael Durrant
mdurr...@arcturusnetworks.com
zhghua0321 wrote
anyone can post without signing up
> and
> everyone is welcome.
> linux-ker...@vger.kernel.org
OK. See you there.
Thanks,
-Michael
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Thi
ks for the pointer. What exactly is lkml ? Will I be welcome there ?
-Michael
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ht
r might not be advantageous,
but of course not possible with Blackfin.
-Michael
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he MMU *
* seems to be in User mode configuration *
* So when / how does the Kernel use it ? *
Any pointers ?
Thanks,
-Michael
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This message was resent
Jamie,
BTW. I am going to open a new thread here on implementing the Futex. I'd
be happy if you could join.
-Michael
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This message was rese
nce between the two
implementations (unless one in fact is wrong for some reason I don't see
yet.)
-Michael
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ed"
instruction. (I'm not very fluent with ARM.)
But this seems to be not true for NIOS2, Microblaze and Blackfin.
-Michael
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This message wa
" that creates a
dedicated Futex that can be used to protect atomic code sequences.)
Thanks for jumping in here,
-Michael
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This message was re
the uClinux-dist wish
success. That said we do eventually end up changing the configuration,
install path etc to keep the compiler, C library and Kernel in sync.
Regards,
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Philippe De Muyter wrote:
> Hi all,
>
> I need to install (uc)lin
Jamie Lokier wrote:
> In Ulrich's
> version, all threads are guaranteed to run because there's a FIFO
> queue on the futex, modified only by desired scheduling policies.
Great argument !
I'll convert to Ulrich's vers
Jim Donelson wrote:
>
> I wonder why (on an SP machine) you don't just disable interrupts for a
> few instructions and give yourself an atomic dec?
With many archs it's not possible to disable/enable interrupts in
user-space.
-Michael
s on a dual core.
What do you think ?
-Michael
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to issue interrupts), creating a Kernel driver, and
decent software (and maybe hardware) considerations (e.g. using some
kind of Mutex to protect shared memory regions).
-Michael
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Using Bit 31 for cache-bypassing is a specific non portable feature of
the no-MMU variant of the NIOS2 processor.
So this should be discussed in a NIOS2 forum (niosforum.com or
uclinux-nios mailing list).
-Michael
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Thanks for the pointers !
-Michael
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eed to implement it by some pure software tricks (i.e.
special provisions in the general ISR entry code) or by implementing a
dedicated custom instruction.
-Michael
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eed of the
thread very slow.
I did a testing program (see another message in this thread) that times
several different user space Mutex algorithms. A simple one of them is
this kind of spinnlock. Of course the said behavior is shown.
-Michael
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Jim Donelson wrote:
> I'd like to see the code for compare_exchange and the lock function.
Best Read: "Futexes Are Tricky" by Ulrich Drepper, Redhat.
-Michael
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"best" user space implementation for the X86 I found (in
"Futexes are Tricky") uses both "atomic_compare_and_exchange" and
"atomic_exchange" for the lock part and "atomic_dec" for the unlock part.
-Michael
I forgot to mention, that the test calculates the overhead imposed by
the Mutex code in terms of "Wall clock" and "usage time" seconds.
-Michael
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t yet done for NIOS)
6) using Linux System V semaphore. (On the PC, some 10 times slower than
anything else, on NIOS performing very similar to pthread_mutex)
If anybody wants to try it I can post it somewhere.
-Michael
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hotmail wrote:
> Make sure the irq of dm9000a is high enough not to have a conflict with
> WATCHDOG.
I suppose conflicts between *any* IRQs need to be avoided. I don't
suppose there is any support for shared interrupts in this system
Michael Schnell wrote:
> disables the global interrupt for the next three
> instructions.
True for the NIOS, that does not use "Flags" - but register compares -
for conditional jumps, with an architecture that uses flags, I suppose
you need a lock for four instruc
read-modify write instruction to the ISA, while it's no big
problem to have such an instruction do with the data whatever is
appropriate.
-Michael
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) or not. So it needs to check if the PC was before or after the
store instruction and have the user space function either redo the
critical section or just proceed.
-Michael
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. of the address if
the memory based Futex as an "address" of the hardware Futex. I suppose
this will relax the stress on a certain hardware Futex.
> Yes, other variations on 'nasty' hacks in the ISR entry/exit path include: ...
Thanks !
I'll be considering these.
-Mic
hy custom instructions are restricted to resources offered by
the NIOS2 design (the two "read" registers given in the instruction.
I.e. the single "write" registers given in the instruction, bus
interface ("behind" the cache).
-Michael
_
n would
be either access to the said memory location or the occurrence of an
interrupt. Neither can be detected by the "hardware" that implements the
custom instruction. (OK, you can use an additional custom instruction
that sets the flag you mention, and execute same it in the general ISR.)
-Mi
uot; instruction is found (a premature lock instruction before
- say - three more instructions are executed would be ignored).
In a multi-Core environment this lock instruction could be enhanced to
additionally do an inter-processor bus lock (cache syncing is something
else
cated system call). The kernel will store
> the address in per-task state.
AFAIK, with NIOS2, on non-MMU designs, you can deactivate/activate the
Interrupt in User space, so no problem here anyway. But I am planing for
an MMU-enabled design.
-Michael
the interrupt be possible in user mode
(especially when running MMU enabled "full" Linux ?
-Michael
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Thanks for pointing me there,
-Michael
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glibC sources for ARM yet, nor other hints on doing atomic operation
with the help of the vsyscall page (that is described as a memory area
that all processes can access, so it seems atomic operations are
required here, not provided).
I'd be happy if you could giv
nd
> with/without permission to disable interrupts in userspace. It's fast
> too. I recommend reading the code. It's only a few instructions.
>
I'll do so.
Does the "vsyscall trick" not force a trap and thus Kernel interaction ?
Thanks !
-Michael
disable and re-enable the global Interrupt in a userland
application (at least with NIOS2-noMMU this is possible. But I suppose
you need to recompile your glibC for this.
-Michael
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