I will test this.
Original Message
Subject:[PATCH][LM32] Fix bootstrap for lm32 target
Date: Wed, 26 Feb 2014 22:46:16 -
From: Jon Beniston j...@beniston.com
To: sebastien.bourdeaud...@lekernel.net
HiSebastien,
I’m forwarding you this as
Original Message
Subject:Re: [M-Labs devel] Error In Simulation Implementation
Date: Mon, 3 Feb 2014 17:24:36 -0500
From: Brian McLaughlin bjmclaugh...@gmail.com
To: Sébastien Bourdeauducq sebastien.bourdeaud...@lekernel.net,
y...@minet.net
If I may ask one
Hi,
Please use the mailing list for such matters instead of private emails.
On 02/03/2014 11:24 PM, Brian McLaughlin wrote:
Problem is, I am getting an assertion failure
What assertion?
when I try to simulate the ripple carry and it looks like it is trying
to execute the do_simulate method
On 02/03/2014 11:39 PM, Brian McLaughlin wrote:
File /home/brian/Dropbox/code/migen_play/FullAdder.py, line 34, in
do_simulation
selfp.A_in = self.test_cases[self.test_counter % 8][0]
File
/usr/local/lib/python3.3/dist-packages/migen-unknown-py3.3.egg/migen/sim/upper.py,
line 44, in
Hi!
Today we are pleased to announce the first confirmed talks of the
EHSM-2014 conference on the frontiers of open source and DIY (Hamburg
June 27-29 2014).
OPEN SOURCE VERILOG HDL SYNTHESIS WITH YOSYS
Yosys is the first full-featured open source software for Verilog HDL
synthesis. It supports
Hi,
I changed the simulation API recently (unfortunately, about at the same
time as hackaday posted about Migen):
https://ssl.serverraum.org/lists-archive/devel/2014-January/003660.html
So you should write instead:
def __init__(...led...):
self.led = led
def do_simulation(self, selfp):
On 01/31/2014 06:12 PM, Salman Sheikh wrote:
Does the MiSoC have debugging capabilities like single stepping the code...
LM32 does, but this feature is currently not implemented in MiSoC. You
can have a look at the code in the old SoC, and feel free to send a patch :)
On 01/22/2014 06:06 PM, Salman Sheikh wrote:
then it still gives an error about misclib not being Importedis the
above path correct?
It is obviously incorrect, you need to remove misoclib. Please read up
on the way Python import modules.
___
On 01/19/2014 09:24 PM, Khobatha Setetemela wrote:
Just for interest's sake - why is Migen's formal modeling system called
fragmented hardware description language (FHDL)? That is, how is it a
fragmented HDL?
Initially, Migen prominently used fragments to store logic, instead of
having a
On 01/15/2014 11:08 PM, Salman Sheikh wrote:
Does some of the migen, migen get installed in the Python install
directories? I can start from scratch then...
Yes. My guess is you installed some old version of Migen (or Mibuild)
into your Python library directories, and that old version gets
On 01/15/2014 05:49 PM, Salman Sheikh wrote:
ssheikh@gs-560g2333030n /cygdrive/d/GMSAG/CPU_TESTING/misoc
$ ./make.py -p papilio_pro -t simple
platform.add_verilog_include_path(os.path.join(verilog, lm32))
AttributeError: 'Platform' object has no attribute
'add_verilog_include_path'
Works
Hi,
Thanks for the heads-up and for sharing this! And cool device. I'll
certainly consider getting one if I'm brave enough to touch USB again
someday :)
Cheers,
Sébastien
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Hi,
Have you tried MiSoC and did you have problems with it?
Sébastien
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On 01/10/2014 04:50 PM, Salman Sheikh wrote:
lm32-elf-objcopy -O verilog %.elf %.vh
lm32-elf-objcopy: %.vh: Invalid bfd target
How did you get your lm32 binutils? I recommend you compile a recent
version yourself instead of using the binaries from Lattice.
On 01/10/2014 05:08 PM, Yann Sionneau wrote:
issues with your lm32 objcopy not supporting the -O verilog backend
Do those issues manifest themselves with a fresh binutils, or the
outdated Lattice binaries?
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On 12/09/2013 04:15 PM, Salman Sheikh wrote:
/cygdrive/c/Python33/python setup.py install
Traceback (most recent call last):
File setup.py, line 4, in module
from setuptools import setup
ImportError: No module named 'setuptools'
I am having problems installing setuptools...
On 12/09/2013 04:44 PM, Salman Sheikh wrote:
$ make
./build.py
/usr/bin/env: python3: No such file or directory
Makefile:4: recipe for target 'build/top.bit' failed
make: *** [build/top.bit] Error 127
Can you successfully run python3 on the Cygwin shell? And env
python3? If not then either
On 12/09/2013 04:44 PM, Salman Sheikh wrote:
$ make
./build.py
/usr/bin/env: python3: No such file or directory
Also I would recommend that at some point you adapt this port to the new
MiSoC build system (https://github.com/m-labs/misoc) which reduces code
duplication across ports. The author
On 12/09/2013 05:41 PM, Salman Sheikh wrote:
I have linked /usr/bin/python to python in c:\Python3.3\
Have you noticed that make.py attempts to run python3, not python?
...I can run it on command line shell only if I add '-i' to it...
And what happens otherwise?
Hi,
I can reproduce the problem with your sieve.vh. Note that it does not
actually use the barrel shift instruction - instead GCC emits calls to
the software implementation __ashlsi3 which is in in libgcc.
The gateware barrel shifter is however enabled in lm32_config.v. I have
added the
Hi,
merged your very nice patches, thanks! What is the target board (if it's
real) in examples/cordic/cordic_impl.py? Would it make any sense to put
it into mibuild/platforms?
Sebastien
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Hi,
Good news :)
On 12/02/2013 04:14 PM, Victor Lyuboslavsky wrote:
(http://www.edaplayground.com/s/example/453). It would be good to have a
Migen example on EDA Playground that is both synthesizable and has a
simple testbench
I have written a quick testbench code for the divider, it's
On 12/02/2013 05:59 PM, Sébastien Bourdeauducq wrote:
elif self.state == WAIT0:
self.state = WAIT
elif self.state == WAIT:
s.wr(self.divider.start_i, 0) = this should be moved up 2 lines
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The whole thing is also quite ugly. I guess the divider should use DF
(and be moved to actorlib in Migen) so that the testbench can use the
Token transaction objects instead of this little mess :)
Sebastien
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On 11/30/2013 03:36 PM, Victor Lyuboslavsky wrote:
Sebastien,
Can you add a link to Migen documentation? Something like: EDA
Playground -- run Migen simulations online
Sure:
http://milkymist.org/3/migen.html
https://twitter.com/Milkymist_Labs/status/406825848226848769
By the way I found
Hi,
On 11/29/2013 05:38 PM, Adrian Byszuk wrote:
All boards tested. There were a few minor errors in mounting of PCB
that we corrected.
All HDMI inputs work, VGA and DVI outputs work. Ethernet works.
Excellent news :)
DDC channel wasn't tested.
Which one? On the HDMI input ports, or on
We are invited to present at Hardware Freedom Day at FabLab Amersfoort:
https://twitter.com/HFDNL/status/405815687748534272
Sebastien
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On 11/27/2013 11:52 PM, Victor Lyuboslavsky wrote:
2. Ask the user to enter the top level Module class and the list of
ports. And then I simply run print(verilog.convert(UserModule(),
ios{ports})) on the server.
I would be in favor of that. You can pre-fill the list of modules by
analyzing the
Hi,
merged and added some clarification of what happens when you attempt to
load the FIFO when writable=0 (this is useful e.g. when you are pushing
data continuously from one clock domain - you can tie we to 1).
Do you know how to make the Python module index section more useful,
or disable it
Hi,
On 11/27/2013 08:03 AM, David Carne wrote:
If mibuild is to be merged into / maintained with migen - could we
consider removing the platforms/ tree from migen (and moving it into
misoc)? It seems to me that most of the contents of the platforms
folder is milkymist-specific.
Not really,
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Hi,
On 11/27/2013 01:44 PM, Adrian Byszuk wrote:
With the soc-mixxeo-ports23 bitstream I get something like this in console
when connecting to port HDMI3:
dvisampler1: PLL locked
IDELAY busy timeout
dvisampler1: delays calibrated
dvisampler1: phase init OK
dvisampler1: ph: 000
On 11/27/2013 04:27 AM, Robert Jördens wrote:
That sounds good! It makes reusing the soc components much simpler.
But I think misoclib and make.py should become a python package. Then,
one could separate one's own history from that of misoc.
A project using misoc would comprise only the custom
On 11/27/2013 03:55 PM, Adrian Byszuk wrote:
Does it keep printing that (it should repeat at ~1Hz), or does it go
into the disconnected state immediately after?
It goes into disconnected state immediately after. Basically screen is
flooded with these messages.
That could be the Spartan-6
Hi,
can we take this discussion to the developer mailing list? You may need
to subscribe at http://lists.milkymist.org so your messages do not go
into the moderation queue and you'll get the possible answers from other
people.
On 11/27/2013 05:49 PM, Victor Lyuboslavsky wrote:
I tried migen,
On 11/27/2013 05:49 PM, Victor Lyuboslavsky wrote:
This would help with having a more streamlined synthesis flow.
Have you tried the Migen tutorial with Mibuild?
http://milkymist.org/3/migen-tutorial.pdf
Do you see improvements for it?
Sebastien
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Hi,
On 11/26/2013 01:03 PM, Adrian Byszuk wrote:
However, with no luck so far. Are the instructions at wiki complete?
Particularly, what about this TFTP server that is mentioned? Shouldn't I
upload some additional firmware via netboot?
The board will download that firmware from the TFTP
Hi Robert,
On 11/15/2013 11:47 PM, Robert Jordens wrote:
what are your plans for the LX9 microboard? I don't know if you want
full support for it merged into MiSoC (which would perhaps require some
changes to the code organization).
I am using it as a portable testbed for a few fpga ideas.
Hi,
On 10/23/2013 09:08 PM, Gabriel Shalom wrote:
This would be contingent on being able to modify a Milkymist to accept
my second monitor output so that Ableton's HD video (in my case, the material
I am using is 1920x1080) preview signal is routed through
the Milkymist to a digital HD
On 08/24/2013 01:26 AM, Werner Almesberger wrote:
sebastien.bourdeaud...@lekernel.net wrote:
Any comments on that?
The pinout seems to be quite different ...
Found a better one. Same series, same pinout, smaller density, a little
faster.
On 05/20/2013 06:03 PM, Yann Sionneau wrote:
Next step would be to try to serialboot a small application (small
enough to fit into the 4 kB SRAM).
Be careful that the BIOS uses that SRAM for the stack and some variables
already.
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On 05/20/2013 06:23 PM, Werner Almesberger wrote:
Did the output actually work ?
Could not test, I don't have a 7 series board around yet.
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On 05/20/2013 12:33 AM, Florent Kermarrec wrote:
While it supposed to be up to 4X faster than alternative solution,
2013.1 version takes 80 minutes to generate the bitstream where ISE
takes only 10 minutes...
I tried implementing a LED blinker with one of the first Vivado
versions, and
On 05/13/2013 11:29 PM, Sébastien Bourdeauducq wrote:
Please send me an email before May 23 if you are interested!
Due to the design files taking longer than I had thought, this is
extended until June 5th.
Check out the Swedish VJ Union article posted today:
http://www.vjunion.se/2013/05
On 05/15/2013 12:08 PM, toby @ tobyz wrote:
Which leads to the questions - is the present M1 implementation limited to 1:1
pixel mapping between inputs and output, and is there an alternative route you
were intending to implement that doesn't have the pixel shader with sampler
approach?
On 05/15/2013 12:45 PM, toby @ tobyz wrote:
If you have / find / want to code the dynamic generation of EDIDs, thats
something I could concretely collaborate around.
Cool, thanks for proposing. Will think of that!
It is much simpler than good resizing with bilinear filtering, which could
Hi,
On 05/13/2013 06:31 AM, Larry Doolittle wrote:
I have nosed around the Milkymist SoC code. I can't claim to have
grasped it all yet. There's some very impressive technology in there!
Thanks! I'm curious, what are you planning to do with it?
I'm working mostly on milkymist-ng those days
Hi,
After the first developments based on the Milkymist One
(https://twitter.com/Milkymist_Labs/status/333568451216031745) it is
time to make better prototypes of the Mixxeo digital video mixer. Here
is the chance for you to get one, and make each board more
cost-efficient thanks to the
Just see the picture:
https://twitter.com/Milkymist_Labs/status/333568451216031745
There are some bugs left, but things start to work now :)
Sebastien
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Added it, thanks!
On 05/07/2013 12:22 AM, Florent Kermarrec wrote:
Ok it's done (I just want to keep user_btn_c, user_btn_n, etc... since I
find it easier for the KC705 than using user_btn(0) -- user_btn(N))
Florent
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Hi Brandon,
committed it, thanks!
Does anyone else on this list have Migen/Mibuild patches that can be
merged? Please send them in :)
Sebastien
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Hi,
could you use the same signal names as the other boards? e.g.
gpio_led - user_led, gpio_sw - user_btn, sys_clk/user_clk -
clk[frequency] etc.
This makes porting designs across boards a bit easier.
Thanks,
Sebastien
On 05/06/2013 10:53 PM, Florent Kermarrec wrote:
Hi,
if you are
Hi,
since everyone seemed to agree that it was a good idea, Migen is now
licensed under 2-clause BSD.
Sebastien
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On 04/12/2013 12:06 PM, Khobatha Setetemela wrote:
-I have confirmed that migensim.vpi installation path is visible in
python3 sys.path
Python's sys.path has nothing to do with the VPI module installation
path. sys.path just where Python looks for Python modules. VPI modules
are something
Committed, thanks Werner!
On 04/12/2013 10:38 PM, Werner Almesberger wrote:
Possibly due to SCL rising fairly slowly (in the 0.5-1 us range),
bouncing has been observed while crossing the forbidden region
between Vil(max) and Vih(min).
By lowering the sample rate from once per system clock to
On 04/03/2013 10:33 PM, Florent Kermarrec wrote:
do you plan to use tmu, pfpu on milkymist-ng? maybe recode it entirely
using migen?
Besides experimenting, my main plan for milkymist-ng is to use it in the
video mixer, which will not need a PFPU or TMU. It will have a picture
scaling core
Hi,
thanks for the files, I have merged them. Here are comments and things I
changed:
* use Unix end-of-line characters (eg run dos2unix on the files after
editing them on a Windows machine)
* renamed rst_level to rst_invert and made it boolean to be
consistent with
Hi,
Attached is a build script that does two things:
1) instantiates the new DDC/EDID core from milkymist-ng
2) blinks a LED using the DVI/HDMI pixel clock - basically this makes a
xrandr-controlled LED blinker :)
It is useful for tracking down EDID problems on the video mixer (faster
to
Hi,
Here are some pre-built milkymist-ng images that have the MMU:
http://milkymist.org/mng_mmu-20130224.tar.bz2
I have not tested the MMU functionality, only that the system meets
timing and still boots (without using the MMU).
I noticed two problems:
* synthesis fails with CFG_MMU_ENABLED
On 02/18/2013 02:00 PM, Florent Kermarrec wrote:
The De0-Nano design is now using mibuild! (The altera_quartus platform
has still some missing functionalities but generates a valid fpga).
Great! Please submit a Mibuild patch when you feel it's ready. Thanks!
Sébastien
Hi,
Here are pictures of the assembled HDMI mixer extension:
https://twitter.com/Milkymist_Labs/status/303535201139703809/photo/1
https://twitter.com/Milkymist_Labs/status/303535092825989123/photo/1
https://twitter.com/Milkymist_Labs/status/303534968381001729/photo/1
I have a few extra PCBs,
Hi,
thanks for your patches, good to hear from you!
On 02/17/2013 05:24 PM, Florent Kermarrec wrote:
_bug:_
- in structure.py, assert(min max) should be assert(min = max) -- ex
: Signal(max=1) (fhdl.patch)
Such a signal would only be capable of having the value 0 (remember that
min is
On 02/17/2013 05:57 PM, Sébastien Bourdeauducq wrote:
--- a/migen/fhdl/tools.py
+++ b/migen/fhdl/tools.py
@@ -136,7 +136,7 @@ def is_variable(node):
def insert_reset(rst, sl):
targets = list_targets(sl)
-resetcode = [t.eq(t.reset) for t in sorted(targets, key=lambda x:
x.huid
On 02/17/2013 09:30 PM, Florent Kermarrec wrote:
In fact the issue I had was in the ASMICON/bankmachine.py l45: self.tag =
Signal(max=self.nslots), with self.nslots=1.
I will have a look at the generated code to see what is generated with migen.
Hmm, indeed, ASMI isn't really meant to be used
Original Message
Subject: Patch - add CFG_* instructions to FPGA description files
Date: Fri, 15 Feb 2013 18:42:33 +0100
From: Sébastien Bourdeauducq sebastien.bourdeaud...@lekernel.net
To: urjtag-developm...@lists.sourceforge.net
Hi,
the attached patch adds the CFG_IN
Hi,
I'd recommend you focus your efforts on milkymist-ng
(https://github.com/milkymist/milkymist-ng /
http://milkymist.org/3/migen.html). Since PSRAM is slow, I don't think
you could go much further than CPU + framebuffer - both are working
today on -ng.
Sébastien
On 02/08/2013 09:43 PM,
Hi,
I have written an intro tutorial to FPGA design with Migen, for people
with some knowledge of Unix commands, Python and logic design:
http://milkymist.org/3/migen-tutorial.pdf
(LaTeX sources here: https://github.com/milkymist/migen-extradoc)
Let me know how it goes, all feedback welcome.
Hi,
Thanks for your suggestion, but I'm trying to create the most simple
device possible now. Also, I already have the parts for the other
solution (and don't overestimate Farnell Germany, some - paid - items
from my October 24th order are still missing).
Sébastien
On 02/06/2013 12:37 AM,
Hi,
I'm done with a first, not fully verified, layout for that 2-channel
HDMI/DVI board for M1
(http://lists.milkymist.org/pipermail/devel-milkymist.org/2012-October/003156.html).
Comments/review welcome, will send to fab soon!
Schematics:
On 01/07/2013 12:20 AM, JP Bonn wrote:
The latest updates did include some minor tblgen related changes but
everything's working for me. I can try doing a clean rebuild of everything
tomorrow.
Strangely enough, this bug manifests itself only when building with
cmake. The compilation goes
Since that SDRAM part on that board might operate at up to 200MHz (check
which speed grade you have), I'd recommend you use milkymist-ng and its
memory controller (ASMIcon) with a 1:2 frequency ratio, e.g. run the SoC
at 83MHz and the SDRAM at 166MHz.
Original Message
Subject: UBB-JTAG: proof of concept with M1
Date: Fri, 4 Jan 2013 16:02:58 -0300
From: Werner Almesberger wer...@almesberger.net
Reply-To: English Qi Hardware mailing list - support, developers, use
cases and fun discuss...@lists.en.qi-hardware.com
To:
Hi,
On 12/14/2012 06:48 PM, Błażej Krajczewski wrote:
Could you tell me whether this box has possibility to programmed 10-15
presets and play them on f.e. 1h loop?
Yes, the simple performance mode can be configured to do that.
How Milkymist cooparate on small videomapping projections? If I
Hi,
thanks for getting in touch. Obviously I'll be at http://ehsm.eu all the
time, but maybe someone else on the list who might go to 29C3 could do it.
Sébastien
On 12/13/2012 12:36 PM, Jens Ohlig wrote:
Hey there,
we're organizing an assembly (
Hi Michael,
thank you for the patches. I have applied them to both the legacy SoC
and to -ng without the Verilog test bench.
Sébastien
On 11/12/2012 07:36 PM, Michael Walle wrote:
This patchset adds support for simulating the LatticeMico32 core in Icarus
Verilog. Additionally, various
Hi,
On 10/23/2012 12:31 PM, Lucas Russo wrote:
Is there a way to debug an embedded LM32 software (no OS), by means
of JTAG and GDB? If there is, how to integrate them in a custom open design?
We're not using JTAG anymore (due to problems with OpenOCD). Instead
Michael developed a system that
Hi,
I've been working on a M1 daughterboard that can turn it into a simple
video mixer. It has two HDMI ports, one crossfade linear
potentiometer, and one fade to black knob.
Draft schematics are here:
http://milkymist.org/vmixext-20121010.pdf
Connection with the M1
==
Hi,
quick update on the EHSM conference in Berlin, we recently announced
three new speakers:
* Harald Welte will present the Osmocom project he founded. In
particular, there will be OsmocomBB, a free software GSM stack evolved
enough to actually make phone calls and send SMS (plus all the
def gen_list(n):
s = [Signal() for i in range(n)]
return s
def gen_2list(n):
s = [Signal(BV(2)) for i in range(n)]
return s
class Foo:
def __init__(self):
la = gen_list(3)
lb = gen_2list(2)
self.sigs = la +
Hi,
sorry for the delayed answer, I'm traveling and have limited time and
access to internet.
The first part of your patch (...SYMBOL_REF_FLAGS (x) |=
SYMBOL_FLAG_SMALL;) actually resolves the infinite recursion problem I
encountered. Now I get the same ICE in var-tracking.c as you.
I'm
This looks better.
Original Message
Subject: RFA: LM32: Fix building libgcc
Date: Fri, 17 Aug 2012 11:21:32 +0100
From: Nick Clifton ni...@redhat.com
To: sebast...@milkymist.org
CC: gcc-patc...@gcc.gnu.org
Hi Sebastien,
Currently the lm32-elf target fails to configure
1. Migen/milkymist-ng progress
==
The first dataflow designs are now working correctly on hardware,
including dataflow access to system SDRAM via the new ASMIcon controller.
ASMIcon provides several features to improve memory performance:
* it runs the SDRAM at a
On 07/20/2012 12:31 PM, Florent Kermarrec wrote:
- I have to code an FSM, but keep fine control of others parts of my code,
let's use migen only for my FSM!
Can you give an explicit example of how you'd do this?
As I understand it, the Migen code for the FSM has to assign to external
, Sébastien Bourdeauducq
sebast...@milkymist.org
On Tue, 10 Jul 2012, Jia Liu wrote:
Hi all,
When I build lm32-elf-gcc, it failed at libgcc configure due to
lm32-elf-cc1 segment fault when compile conftest.c:
void bar ();
void clean (int *);
void foo ()
{
int i __attribute__ ((cleanup (clean
Hi,
this file is provided by Icarus Verilog. Please see the Installing the
VPI module section of the Migen documentation:
http://milkymist.org/Migen.pdf
Also make sure to build Icarus Verilog from source (using a fresh
checkout from the official repository) because releases contain a bug
On 07/12/2012 04:32 PM, Pierre BARRE wrote:
PS : votre nom est français, parlez-vous français ?
yes, but this mailing list is English speaking.
By the way, may I ask what you are planning to do with Migen? (just curious)
Sébastien
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On 07/12/2012 07:22 PM, Pierre BARRE wrote:
I have a new idea for a paralel additionner, may be i will test this in
a fpga.
I don't think you can easily beat the carry chains...
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On 07/12/2012 07:28 PM, Pierre BARRE wrote:
What do you propose ?
Modern FPGAs have dedicated structures called carry chains that
accelerate arithmetic operations like additions and subtractions. The
synthesizer uses them automatically when it encounters + and - operators
in the
Just use -ng.
On 07/11/2012 06:05 AM, p...@kristianpaul.org wrote:
From: Cristian Paul Peñaranda Rojas p...@kristianpaul.org
This way there is no need to sacrifice csr devices in order to add other
controls to current SoC.
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Congratulations! Is there any other patch except the one you have
already sent me?
Also, have you tried compiling the whole software (RTEMS+FN) and does it
work?
Thanks,
Sébastien
On 07/11/2012 05:37 PM, Jia Liu wrote:
hi all
Sorry for my careless on trunk.
I've make gcc-4.6.3 works OK,
Hi,
just to let you know about the latest version of the Migen documentation:
http://milkymist.org/Migen.pdf
The change is mostly the addition of the dataflow system (chapter 4).
Sébastien
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http://ehsm.eu
Despite all the discussions about open hardware, it appears obvious that
many techniques and technologies remain highly proprietary. Ubiquitous
Some new pictures and videos of the M1 in action (mixed with/processing
something else at times - DOS demos I think):
http://www.youtube.com/playlist?list=PL181AAD8063FCC9DC
http://www.falsebit.com/bit-stream/bit-stream-articles/114-blip-festival-2012-up-now-burnkit2600-m-no-carrier.html
Thanks, merged!
Sébastien
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Original Message
Subject: Re: Statistics: May 2012
Date: Sat, 2 Jun 2012 03:22:07 +0200
From: Wolfgang Spraul wolfg...@sharism.cc
Reply-To: English Qi Hardware mailing list - support, developers, use
cases and fun discuss...@lists.en.qi-hardware.com
To: English Qi Hardware
Hi,
do you have any concerns about renaming the LLVM target name from
Mico32 to LM32?
Binutils use lm32, and this discrepancy is particularly problematic
when clang attempts to find programs like mico32-elf-as (instead of
the correct lm32-elf-as).
Right now we work around this by using
Hi Michael,
thanks for your patch. Looks good, if you have tested it and it works
it's almost good for merging.
There are two minor style/indentation problems (I_set = 1'b1; and I_r =
I;).
More importantly, some combinatorial always blocks generate latches and
this is not OK. This happens
On 03/20/2012 01:55 AM, Werner Almesberger wrote:
- the DRAM data sheet [1] says the -5B version (which is what we
have) needs Vdd = VddQ = 2.6 ± 0.1 V for DDR400 operation. If
operating at a lower speed, it is content with 2.5 ± 0.2 V.
Do we plan to operate the DRAM in M1r4 at DDR400
On 03/16/2012 09:21 AM, Lars-Peter Clausen wrote:
On 03/16/2012 09:08 AM, Sergey Koulik wrote:
One more issue in Theobroma's signals implementation. This one was hard to
spot...
I think you can actually blame that bug on me. Nice catch :)
Applied - thanks!
On 03/16/2012 02:44 AM, Werner Almesberger wrote:
- should we connect SOG/SOY ?
From my understanding, this pin is only needed so the chip can detect
the application of a video signal and interrupt the CPU while it is in
low-power (standby) mode. And since we do not use this mode ...
S.
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