to master mode.
Any ideas please?
Thank you!
Best regards,
Marek Vasut
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Dear Trent Piepho,
On Thu, Oct 17, 2013 at 9:33 PM, Marek Vasut ma...@denx.de wrote:
Dear Mark Brown,
On Tue, Oct 01, 2013 at 01:14:25PM -0700, Trent Piepho wrote:
There are two bits which control the CS line in the CTRL0 register:
LOCK_CS and IGNORE_CRC. The latter would be better
Hi Mark,
On Fri, Oct 18, 2013 at 08:23:21AM +0200, Marek Vasut wrote:
SPI flashes are the most significant users of this IP block on the
MX23/MX28, that's why I'm unhappy patches that might break them were
pulled in without any Tested-by/Reviewed-by/Acked-by .
If the patches aren't
Dear Trent Piepho,
On Thu, Oct 17, 2013 at 11:23 PM, Marek Vasut ma...@denx.de wrote:
Dear Trent Piepho,
On Thu, Oct 17, 2013 at 9:33 PM, Marek Vasut ma...@denx.de wrote:
Dear Mark Brown,
On Tue, Oct 01, 2013 at 01:14:25PM -0700, Trent Piepho wrote:
There are two bits which
Dear Mark Brown,
On Fri, Oct 18, 2013 at 04:38:52PM +0200, Marek Vasut wrote:
I don't quite understand this, is it OK to merge untested patches? I have
them in my review queue, but I was simply busy so I didn't get to them
for a while. Fabio is unfortunatelly also N/A now, so things
of testing? I was busy so I couldn't even
review them yet, sorry.
Best regards,
Marek Vasut
--
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to the hardware
FIFO fill level.
The code can be simplified by just setting LOCK_CS once and then not
needing to deal with it at all in the PIO and DMA transfer functions.
Signed-off-by: Trent Piepho tpie...@gmail.com
Cc: Marek Vasut ma...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
up if you want to do this, as the hardware doesn't appear to do
this in any sane manner.
The code can be simplified by just setting LOCK_CS once and then not
needing to deal with it in the PIO and DMA transfer functions.
Signed-off-by: Trent Piepho tpie...@gmail.com
Cc: Marek Vasut ma
Dear Trent Piepho,
On Wed, Mar 20, 2013 at 4:35 PM, Marek Vasut ma...@denx.de wrote:
On Thu, Aug 23, 2012 at 7:42 PM, Marek Vasut
+ - The DMA has to wait indefinitelly for the arriving
data.
Is there a reason that this must be done? I'd guess that after the
SSP
Dear Trent Piepho,
On Apr 2, 2013 7:27 PM, Marek Vasut ma...@denx.de wrote:
The only useful thing mxs_spi_setup_transfer() (which
is no longer called) did in this instance was make that check.
btw. I was under the impression the MXS SSP block can handle other
word-widths than 8
Dear Trent Piepho,
On Mon, Apr 1, 2013 at 9:22 PM, Marek Vasut ma...@denx.de wrote:
On Mon, Apr 1, 2013 at 4:11 PM, Marek Vasut ma...@denx.de wrote:
+#define TXRX_WRITE 1 /* This is a write */
+#define TXRX_DEASSERT_CS 2 /* De-assert CS at end of txrx
with it in the PIO and DMA transfer functions.
Signed-off-by: Trent Piepho tpie...@gmail.com
Cc: Marek Vasut ma...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Shawn Guo shawn@linaro.org
---
drivers/spi/spi-mxs.c |8 ++--
1 file changed, 2 insertions(+), 6
is the last we need to know
but rather the transfers which after which CS should be de-asserted.
This also extends the driver to not ignore cs_change when setting the
DEASSERT_CS nee last flag.
Signed-off-by: Trent Piepho tpie...@gmail.com
Cc: Marek Vasut ma...@denx.de
Cc: Fabio Estevam
that worked and one for DMA that didn't.
Change the code to set the CS bits in the message transfer function
once. Now the DMA and PIO txrx functions don't need to care about CS
at all.
Signed-off-by: Trent Piepho tpie...@gmail.com
Cc: Marek Vasut ma...@denx.de
Cc: Fabio Estevam fabio.este
will corrupt those
transfers.
So fix mxs_spi_setup() to not call mxs_spi_setup_transfer().
Signed-off-by: Trent Piepho tpie...@gmail.com
Cc: Marek Vasut ma...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Shawn Guo shawn@linaro.org
---
drivers/spi/spi-mxs.c | 11
fills it in from the spi_device. However, the spi
core does not check if spi_device's speed is zero so we have to do
that still.
Signed-off-by: Trent Piepho tpie...@gmail.com
Cc: Marek Vasut ma...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Shawn Guo shawn@linaro.org
Ok
KB/sec.
Signed-off-by: Trent Piepho tpie...@gmail.com
Cc: Marek Vasut ma...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Shawn Guo shawn@linaro.org
---
drivers/spi/spi-mxs.c | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/spi
Dear Trent Piepho,
On Tue, Apr 2, 2013 at 3:32 AM, Marek Vasut ma...@denx.de wrote:
Don't see anything in CodingStyle that one should be preferred over
the other.
There ain't any I'm aware of, but to paraphrase you, let's keep the
format that's already used in the driver
Dear Trent Piepho,
On Tue, Apr 2, 2013 at 4:31 PM, Marek Vasut ma...@denx.de wrote:
static int mxs_spi_setup(struct spi_device *dev)
{
- int err = 0;
-
if (!dev-bits_per_word)
dev-bits_per_word = 8;
if (dev-mode ~(SPI_CPOL
works, getting the CS to automatically turn off
when a different slave is addressed might not work.
Signed-off-by: Trent Piepho tpie...@gmail.com
Cc: Marek Vasut ma...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Shawn Guo shawn@linaro.org
---
drivers/spi/spi-mxs.c | 86
on each turn? Did you actually test this?
Signed-off-by: Trent Piepho tpie...@gmail.com
Cc: Marek Vasut ma...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Shawn Guo shawn@linaro.org
---
drivers/spi/spi-mxs.c | 40 +++-
1 file changed, 15
-ssp.c then?
Signed-off-by: Trent Piepho tpie...@gmail.com
Cc: Marek Vasut ma...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Shawn Guo shawn@linaro.org
---
drivers/spi/spi-mxs.c |1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/spi/spi-mxs.c b/drivers/spi/spi
are not clear.
Please clean up and resubmit with only the relevant changes.
Signed-off-by: Trent Piepho tpie...@gmail.com
Cc: Marek Vasut ma...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Shawn Guo shawn@linaro.org
---
drivers/spi/spi-mxs.c | 54
Dear Trent Piepho,
On Mon, Apr 1, 2013 at 4:13 PM, Marek Vasut ma...@denx.de wrote:
Change the code to set the CS bits in the message transfer function
once. Now the DMA and PIO txrx functions don't need to care about CS
at all.
Ok, lemme ask this one more time -- will the DMA work
Dear Trent Piepho,
On Mon, Apr 1, 2013 at 4:16 PM, Marek Vasut ma...@denx.de wrote:
The ssp struct has a clock rate field, to provide the actual value, in
Hz, of the SSP output clock (the rate of SSP_SCK) after
mxs_ssp_set_clk_rate() is called. It should be read-only, except
Dear Trent Piepho,
On Mon, Apr 1, 2013 at 4:30 PM, Marek Vasut ma...@denx.de wrote:
-static uint32_t mxs_spi_cs_to_reg(unsigned cs)
+static u32 mxs_spi_cs_to_reg(unsigned cs)
{
- uint32_t select = 0;
+ u32 select = 0;
I'll make it a separate patch
Dear Trent Piepho,
On Mon, Apr 1, 2013 at 4:37 PM, Marek Vasut ma...@denx.de wrote:
On Mon, Apr 1, 2013 at 4:16 PM, Marek Vasut ma...@denx.de wrote:
The ssp struct has a clock rate field, to provide the actual value,
in Hz, of the SSP output clock (the rate of SSP_SCK) after
Dear Trent Piepho,
On Mon, Apr 1, 2013 at 4:11 PM, Marek Vasut ma...@denx.de wrote:
+#define TXRX_WRITE 1 /* This is a write */
+#define TXRX_DEASSERT_CS 2 /* De-assert CS at end of txrx */
New flags? I'm sure the GCC can optimize function parameters pretty
Dear Trent Piepho,
On Thu, Aug 23, 2012 at 7:42 PM, Marek Vasut
marex-ynqeqjns...@public.gmane.org wrote:
This allows user to select the slave mode of operation of the controller.
This is by no means standard, see the binding documentation for details,
there is plenty of them. Sadly
(SSP_TIMEOUT) to happen in the processing of the last
DMA descriptor, and thus reads and writes were failing.
This is a fix for the problem, by clearing XFER_COUNT bytes in ctrl0 before
setting the new XFER_COUNT for DMA descriptor.
Cc: Marek Vasut ma...@denx.de
Cc: Fabio Estevam fabio.este
for the issue.
, by clearing the XFER_LEN bytes always
before reading the new size for XFER_LEN.
before setting new XFER_COUNT into the ctrl0 field of DMA control transfer.
Cc: Marek Vasut ma...@denx.de
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Shawn Guo shawn@linaro.org
Signed-off
Dear Mark Brown,
On Sun, Oct 14, 2012 at 04:32:55AM +0200, Marek Vasut wrote:
In the current code implementing the MXS SPI driver, every transferred
message had assigned status = 0, which is not correct. Properly assign
status returned from the I/O functions.
Applied both, thanks
Dear Mark Brown,
On Fri, Oct 26, 2012 at 02:31:53PM +0200, Marek Vasut wrote:
Dear Mark Brown,
Applied both, thanks.
Will they hit 3.7 please?
I hadn't been going to do that, no - nothing about them seemed
especially urgent?
They're fixes, I'd be glad if you could slip them
In the current code implementing the MXS SPI driver, every transferred
message had assigned status = 0, which is not correct. Properly assign
status returned from the I/O functions.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chris Ball c...@laptop.org
Cc: Fabio Estevam fabio.este
In case the SPI DMA times out, the DMA might still be in some kind of
inconsistent state. Issue dmaengine_terminate_all() on the particular
channel to kill off all operations before continuing.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chris Ball c...@laptop.org
Cc: Fabio Estevam fabio.este
Dear Wolfram Sang,
On Fri, Aug 24, 2012 at 05:44:31AM +0200, Marek Vasut wrote:
This patch implements DMA support into mxs-i2c. DMA transfers are now
enabled via DT. The DMA operation is enabled by default.
Signed-off-by: Marek Vasut ma...@denx.de
Thanks, applied to -next.
I am
Dear Wolfram Sang,
[...]
Didn't you claim you're adding this DMA patch into next some time ago finally?
;-)
Subject: Re: I2C_FUNC_SMBUS_QUICK on i2c-mxs
Message-ID: 20120830135612.gj27...@pengutronix.de
Best regards,
Marek Vasut
Dear Wolfram Sang,
On Fri, Aug 24, 2012 at 05:44:31AM +0200, Marek Vasut wrote:
This patch implements DMA support into mxs-i2c. DMA transfers are now
enabled via DT. The DMA operation is enabled by default.
Signed-off-by: Marek Vasut ma...@denx.de
Unsurprisingly, I also couldn't get
simply forget to add the binding, you'd need to
print a warning.
? It is on by default because of the entry in the dtsi. And the status
of DMA will be printed.
+ dev_info(dev, registered. DMA: %s\n, i2c-dma_mode ? on : off);
dev_debug() ?
Yup.
Best regards,
Marek Vasut
Dear Mark Brown,
On Tue, Sep 04, 2012 at 04:40:14AM +0200, Marek Vasut wrote:
I humbly present fixes for further issues found in the SPI driver
for i.MX23/i.MX28.
Applied all, thanks.
Thanks Mark, sorry for pulling the bugs in.
Best regards,
Marek Vasut
pointless.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chris Ball c...@laptop.org
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Mark Brown broo...@opensource.wolfsonmicro.com
Cc: Shawn Guo shawn@linaro.org
---
drivers/spi/spi-mxs.c | 20
flash clocked at 40MHz.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chris Ball c...@laptop.org
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Mark Brown broo...@opensource.wolfsonmicro.com
Cc: Shawn Guo shawn@linaro.org
---
drivers/spi/spi-mxs.c
and fixes
for minor details.
Marek Vasut (4):
mxs/spi: Fix issues when doing long continuous transfer
mxs/spi: Increment the transfer length only if transfer succeeded
mxs/spi: Decrement the DMA/PIO border
mxs/spi: Rework the mxs_ssp_timeout to be more readable
drivers/spi/spi-mxs.c
again.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chris Ball c...@laptop.org
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Mark Brown broo...@opensource.wolfsonmicro.com
Cc: Shawn Guo shawn@linaro.org
---
drivers/spi/spi-mxs.c | 141
The transfer function incremented (struct spi_message)-actual_length
unconditionally, even if the transfer failed. Rectify this by incrementing
this only if transfer succeeded.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chris Ball c...@laptop.org
Cc: Fabio Estevam fabio.este...@freescale.com
Cc
driver data to NULL. Remove the unnecessaary calls
to platform_set_drvdata().
Cc: Marek Vasut ma...@denx.de
Signed-off-by: Guenter Roeck li...@roeck-us.net
Damn, I thought this was fixed, apparently not. Thanks!
Reviewed-by: Marek Vasut ma...@denx.de
---
Applies to -next (as of 8/24/12
Dear Guenter Roeck,
On Fri, Aug 24, 2012 at 10:10:12PM +0200, Marek Vasut wrote:
Dear Guenter Roeck,
The call sequence
spi_alloc_master/spi_register_master/spi_unregister_master is complete;
it reduces the device reference count to zero, which results in device
memory being
the
mxs_spi_txrx_dma(), since whole this section is protected by mutex in SPI core.
This by no means allows this issue to exit though.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chris Ball c...@laptop.org
Cc: Shawn Guo shawn@linaro.org
Cc: Mark Brown broo...@opensource.wolfsonmicro.com
Cc: Fabio Estevam
Restart the SSP block in case the SSP transfer failed in any way.
The block hung in some cases otherwise.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chris Ball c...@laptop.org
Cc: Shawn Guo shawn@linaro.org
Cc: Mark Brown broo...@opensource.wolfsonmicro.com
Cc: Fabio Estevam fabio.este
for
people who do know very well what they are doing, otherwise this should
never be touched.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chris Ball c...@laptop.org
Cc: Shawn Guo shawn@linaro.org
Cc: Mark Brown broo...@opensource.wolfsonmicro.com
Cc: Fabio Estevam fabio.este...@freescale.com
Dear Chris Ball,
Hi Marek,
On Thu, Aug 23 2012, Marek Vasut wrote:
The init_completion() call does reinit not only the variable carrying
the flag that the completion finished, but also initialized the
waitqueue associated with the completion. On the contrary, the
INIT_WAITQUEUE() call
the
mxs_spi_txrx_dma(), since whole this section is protected by mutex in SPI core.
This by no means allows this issue to exit though.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chris Ball c...@laptop.org
Cc: Shawn Guo shawn@linaro.org
Cc: Mark Brown broo...@opensource.wolfsonmicro.com
Cc: Fabio Estevam
Add this SSP pin multiplexing configuration into the imx28.dtsi file.
This covers pinmux for all four SSP ports available on the i.MX28.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chris Ball c...@laptop.org
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Mark Brown broo
Update the mach-mxs machine by removing the enet_clkout(). The new
revision of the board doesn't need that. Also, update the DTS file
with all the new drivers pulled in the mainline recently, that is,
SPI, LRADC, USB. Also, remove bogus AUART3.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chris
This patch implements DMA support into mxs-i2c. DMA transfers are now enabled
via DT. The DMA operation is enabled by default.
Signed-off-by: Marek Vasut ma...@denx.de
CC: Fabio Estevam fabio.este...@freescale.com
Cc: linux-...@vger.kernel.org
CC: Shawn Guo shawn@linaro.org
Cc: Wolfram Sang
Add clock-frequency property, which allows configuring the SPI block's
base speed.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chris Ball c...@laptop.org
Cc: Shawn Guo shawn@linaro.org
Cc: Mark Brown broo...@opensource.wolfsonmicro.com
---
Documentation/devicetree/bindings/spi/mxs-spi.txt
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chris Ball c...@laptop.org
Cc: Shawn Guo shawn@linaro.org
Cc: Mark Brown broo...@opensource.wolfsonmicro.com
Cc: Fabio Estevam fabio.este...@freescale.com
---
drivers/spi/spi-mxs.c |4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff
Dear Chris Ball,
Hi,
On Wed, Aug 22 2012, Marek Vasut wrote:
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chris Ball c...@laptop.org
Cc: Shawn Guo shawn@linaro.org
Cc: Mark Brown broo...@opensource.wolfsonmicro.com
Cc: Fabio Estevam fabio.este...@freescale.com
with submission :)
I'll fix it in a bit and resubmit in the evening.
Thanks,
Fabio Estevam
Best regards,
Marek Vasut
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the chip-select lines (nCS pins).
*/
I hope it'll suffice. Recycling bits in registers is really crazy practice and
I'd like to avoid these getting out of scope of this flaw's location.
Thanks,
Fabio Estevam
Best regards,
Marek Vasut
This patchset adds SPI master support for Freescale i.MX233/i.MX28.
This is rebased on top of next-20120713. Please consider applying,
bugs shall now be squashed during the previous two review rounds.
Marek Vasut (10):
mmc: spi: Move SSP register definitions into separate file
mmc: spi
-by: Marek Vasut ma...@denx.de
Cc: Attila Kinali att...@kinali.ch
Cc: Chris Ball c...@laptop.org
CC: Dong Aisheng b29...@freescale.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Linux ARM kernel linux-arm-ker...@lists.infradead.org
Cc: Mark Brown broo...@opensource.wolfsonmicro.com
CC: Shawn Guo
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Attila Kinali att...@kinali.ch
Cc: Chris Ball c...@laptop.org
CC: Dong Aisheng b29...@freescale.com
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Linux ARM kernel linux-arm-ker...@lists.infradead.org
Cc
This is slightly reworked version of the SPI driver.
Support for DT has been added and it's been converted
to queued API.
Based on previous attempt by:
Fabio Estevam fabio.este...@freescale.com
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
Signed-off-by: Marek Vasut ma...@denx.de
Cc
Since the SSP controller can act as both SPI and MMC host,
renaming the enum to properly reflect the naming seems
appropriate.
Based on previous attempt by:
Fabio Estevam fabio.este...@freescale.com
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
Signed-off-by: Marek Vasut ma...@denx.de
Add missing register bits and registers into mxs-spi.h .
These will be used by the SPI driver.
Based on previous attempt by:
Fabio Estevam fabio.este...@freescale.com
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Attila Kinali att
Pull out the MMC clock configuration function and make it
into SSP clock configuration function, so it can be used by
the SPI driver too.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Attila Kinali att...@kinali.ch
Cc: Chris Ball c...@laptop.org
CC: Dong Aisheng b29...@freescale.com
Cc: Fabio
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Attila Kinali att...@kinali.ch
Cc: Chris Ball c...@laptop.org
CC: Dong Aisheng b29...@freescale.com
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Linux ARM kernel linux-arm-ker...@lists.infradead.org
Cc
These parts will be used by the MXS SPI driver too.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Attila Kinali att...@kinali.ch
Cc: Chris Ball c...@laptop.org
CC: Dong Aisheng b29...@freescale.com
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Linux
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Attila Kinali att...@kinali.ch
Cc: Chris Ball c...@laptop.org
CC: Dong Aisheng b29...@freescale.com
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Linux ARM kernel linux-arm-ker...@lists.infradead.org
Cc
Dear Mark Brown,
Thanks for the review!
On Mon, Jul 23, 2012 at 10:40:48PM +0200, Marek Vasut wrote:
This is slightly reworked version of the SPI driver.
Support for DT has been added and it's been converted
to queued API.
Looks reasonable overall.
+ bits_per_word = dev
Dear Mark Brown,
On Mon, Jul 23, 2012 at 10:40:50PM +0200, Marek Vasut wrote:
+ /*
+* Small blocks can be transfered via PIO.
+* Measured by empiric means:
+*
+* dd if=/dev/mtdblock0 of=/dev/null bs=1024k count=1
Dear Mark Brown,
On Thu, Aug 02, 2012 at 04:58:38PM +0200, Marek Vasut wrote:
It'd be nice to only keep the clocks enabled while doing transfers but
again totally non-essential.
Hm, this is spread across mxs. Shawn, is there any plan for PM
implementation for MXS ?
Take a look
we only need to have spi_master_get and
spi_master_put matched.
Naw, spi_master_get() does refcounting, spi_alloc_master() doesnt. You don't
need to match spi_alloc_master() with spi_master_put()
Regards,
Shawn
Best regards,
Marek Vasut
Dear Marek Vasut,
[...]
-out_host_free:
+out_free_dma:
+ dma_release_channel(ssp-dmach);
clk_disable_unprepare(ssp-clk);
+out_host_free:
spi_master_put(host);
kfree(host);
+
Please remove this newline.
return ret;
}
Missing dma_release_channel
. And spi_master_put() is not always called, meaning there is either a
memory leak or I am completely confused.
I'll poke through the stuff later if you won't get your answers (later ==
around
tomorrow)
Thanks,
Guenter
Best regards,
Marek Vasut
Dear Guenter Roeck,
On Wed, Aug 01, 2012 at 11:16:15AM +0530, Shubhrajyoti Datta wrote:
On Wed, Aug 1, 2012 at 10:59 AM, Guenter Roeck li...@roeck-us.net wrote:
On Wed, Aug 01, 2012 at 07:00:54AM +0200, Marek Vasut wrote:
Dear Shawn Guo,
On Tue, Jul 31, 2012 at 08:35:59PM -0700
Dear Guenter Roeck,
On Wed, Aug 01, 2012 at 08:10:37AM +0200, Marek Vasut wrote:
Dear Shawn Guo,
On Tue, Jul 31, 2012 at 10:42:28PM -0700, Guenter Roeck wrote:
On Wed, Aug 01, 2012 at 01:58:56PM +0800, Shawn Guo wrote:
On Tue, Jul 31, 2012 at 10:29:47PM -0700, Guenter Roeck
a nasty kernel crash.
It seems the spi_master class takes care of that kfree() in
spi.c:spi_master_release() . Good catch, thanks!
Thanks,
Guenter
Best regards,
Marek Vasut
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like that to me ...
Regards,
Shawn
Best regards,
Marek Vasut
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Dear Shawn Guo,
On Tue, Jul 24, 2012 at 09:43:48PM +0200, Marek Vasut wrote:
This is actually not the first place I was curious about in the imx28 DTS
... yes, the size is 0x2000, but 2000 as is is used in multiple places
across imx28. Shawn?
It seems that I overlooked the problem when
Dear Sergei Shtylyov,
Hello.
On 07/24/2012 12:40 AM, Marek Vasut wrote:
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Attila Kinali att...@kinali.ch
Cc: Chris Ball c...@laptop.org
CC: Dong Aisheng b29...@freescale.com
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Grant Likely
Abstract out the common part of private data shared between MMC
and SPI. These shall later allow to use common clock configuration
function.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Attila Kinali att...@kinali.ch
Cc: Chris Ball c...@laptop.org
CC: Dong Aisheng b29...@freescale.com
Cc: Fabio
-by: Marek Vasut ma...@denx.de
Cc: Attila Kinali att...@kinali.ch
Cc: Chris Ball c...@laptop.org
CC: Dong Aisheng b29...@freescale.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Linux ARM kernel linux-arm-ker...@lists.infradead.org
Cc: Mark Brown broo...@opensource.wolfsonmicro.com
CC: Shawn Guo
Add missing register bits and registers into mxs-spi.h .
These will be used by the SPI driver.
Based on previous attempt by:
Fabio Estevam fabio.este...@freescale.com
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Attila Kinali att
Pull out the MMC clock configuration function and make it
into SSP clock configuration function, so it can be used by
the SPI driver too.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Attila Kinali att...@kinali.ch
Cc: Chris Ball c...@laptop.org
CC: Dong Aisheng b29...@freescale.com
Cc: Fabio
These parts will be used by the MXS SPI driver too.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Attila Kinali att...@kinali.ch
Cc: Chris Ball c...@laptop.org
CC: Dong Aisheng b29...@freescale.com
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Linux
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Attila Kinali att...@kinali.ch
Cc: Chris Ball c...@laptop.org
CC: Dong Aisheng b29...@freescale.com
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Linux ARM kernel linux-arm-ker...@lists.infradead.org
Cc
Dear Attila Kinali,
Good morning Marek,
On Tue, 17 Jul 2012 23:48:34 +0200
Marek Vasut ma...@denx.de wrote:
There is a EXPORT_SYMBOL_GPL(mxs_ssp_set_clk_rate); missing here.
What for?
To be able to compile mxs-mmc as a module
Argh, good point.
Attila
Dear Shubhrajyoti Datta,
On Mon, Jul 16, 2012 at 5:56 AM, Marek Vasut ma...@denx.de wrote:
Dear Shubhrajyoti Datta,
Hello,
On Sat, Jun 30, 2012 at 8:45 AM, Marek Vasut ma...@denx.de wrote:
Hello,
is there currently any ongoing effort to support SPI slave mode in
Linux
Dear Attila Kinali,
On Mon, 16 Jul 2012 14:09:52 +0200
Marek Vasut ma...@denx.de wrote:
Pull out the MMC clock configuration function and make it
into SSP clock configuration function, so it can be used by
the SPI driver too.
diff --git a/drivers/clk/mxs/clk-ssp.c b/drivers/clk/mxs
Dear Mark Brown,
On Mon, Jul 16, 2012 at 02:09:47PM +0200, Marek Vasut wrote:
This patchset adds SPI master support for Freescale i.MX233/i.MX28.
This is rebased on top of next-20120713. Please consider applying,
bugs shall now be squashed during the previous two review rounds.
Always
version, so can these be applied? I'll
post
the rebased version again if necessary.
Best regards,
Marek Vasut
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Live Security Virtual Conference
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threat
Since the SSP controller can act as both SPI and MMC host,
renaming the enum to properly reflect the naming seems
appropriate.
Based on previous attempt by:
Fabio Estevam fabio.este...@freescale.com
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
Signed-off-by: Marek Vasut ma...@denx.de
-by: Marek Vasut ma...@denx.de
Cc: Chris Ball c...@laptop.org
Cc: Detlev Zundel d...@denx.de
CC: Dong Aisheng b29...@freescale.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Linux ARM kernel linux-arm-ker...@lists.infradead.org
Cc: Rob Herring rob.herr...@calxeda.com
CC: Shawn Guo shawn
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chris Ball c...@laptop.org
Cc: Detlev Zundel d...@denx.de
CC: Dong Aisheng b29...@freescale.com
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Linux ARM kernel linux-arm-ker...@lists.infradead.org
Cc: Rob
Add missing register bits and registers into mxs-spi.h .
These will be used by the SPI driver.
Based on previous attempt by:
Fabio Estevam fabio.este...@freescale.com
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chris Ball c...@laptop.org
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chris Ball c...@laptop.org
Cc: Detlev Zundel d...@denx.de
CC: Dong Aisheng b29...@freescale.com
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: Linux ARM kernel linux-arm-ker...@lists.infradead.org
Cc: Rob
This patchset adds SPI master support for Freescale i.MX233/i.MX28.
This is rebased on top of next-20120713. Please consider applying,
bugs shall now be squashed during the previous two review rounds.
This is a repost (rebased) of the patchset from Jul 6, 2012.
Marek Vasut (10):
mmc: spi
Pull out the MMC clock configuration function and make it
into SSP clock configuration function, so it can be used by
the SPI driver too.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Chris Ball c...@laptop.org
Cc: Detlev Zundel d...@denx.de
CC: Dong Aisheng b29...@freescale.com
Cc: Fabio Estevam
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